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AJvYcCVcmwqVQJoRqb7FdOZeUrTxfmAP5WaZnBcJACGj5Ydw6q1B2ZhvFHK4xqhbwzWIGNv28rkopt/kEXjYaf8=@vger.kernel.org X-Gm-Message-State: AOJu0YzlstFHdH4s7OVg73ghzKPUS/jVATg3DN951hSKpHhNbJPrsxuH GyEIgKQ/vtiq2iz8olq5/Wc49Wf/myrGTcTb3j7DHLMvhs1KUVs87F0t/AOJC9w7EfApoc+JZhr /2ImAuw== X-Google-Smtp-Source: AGHT+IGnAWR1Ge5/kNVjom0UceZOieMbcvP7V10C2KnBUEzzCVxlhXi3O6dwFOIaCRRkmy7JIN59ucCqu8k= X-Received: from pfbcd23.prod.google.com ([2002:a05:6a00:4217:b0:736:7120:dd05]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a05:6a00:e0e:b0:736:9f20:a175 with SMTP id d2e1a72fcca58-742acc8d8f4mr36938652b3a.2.1747962073957; Thu, 22 May 2025 18:01:13 -0700 (PDT) Reply-To: Sean Christopherson Date: Thu, 22 May 2025 17:59:43 -0700 In-Reply-To: <20250523010004.3240643-1-seanjc@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20250523010004.3240643-1-seanjc@google.com> X-Mailer: git-send-email 2.49.0.1151.ga128411c76-goog Message-ID: <20250523010004.3240643-39-seanjc@google.com> Subject: [PATCH v2 38/59] iommu/amd: KVM: SVM: Infer IsRun from validity of pCPU destination From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini , Joerg Roedel , David Woodhouse , Lu Baolu Cc: kvm@vger.kernel.org, iommu@lists.linux.dev, linux-kernel@vger.kernel.org, Sairaj Kodilkar , Vasant Hegde , Maxim Levitsky , Joao Martins , Francesco Lavra , David Matlack Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Infer whether or not a vCPU should be marked running from the validity of the pCPU on which it is running. amd_iommu_update_ga() already skips the IRTE update if the pCPU is invalid, i.e. passing %true for is_run with an invalid pCPU would be a blatant and egregrious KVM bug. Tested-by: Sairaj Kodilkar Signed-off-by: Sean Christopherson --- arch/x86/kvm/svm/avic.c | 11 +++++------ drivers/iommu/amd/iommu.c | 14 +++++++++----- include/linux/amd-iommu.h | 6 ++---- 3 files changed, 16 insertions(+), 15 deletions(-) diff --git a/arch/x86/kvm/svm/avic.c b/arch/x86/kvm/svm/avic.c index 4747fb09aca4..c79648d96752 100644 --- a/arch/x86/kvm/svm/avic.c +++ b/arch/x86/kvm/svm/avic.c @@ -832,7 +832,7 @@ int avic_pi_update_irte(struct kvm_kernel_irqfd *irqfd,= struct kvm *kvm, entry =3D svm->avic_physical_id_entry; if (entry & AVIC_PHYSICAL_ID_ENTRY_IS_RUNNING_MASK) amd_iommu_update_ga(entry & AVIC_PHYSICAL_ID_ENTRY_HOST_PHYSICAL_ID_MAS= K, - true, pi_data.ir_data); + pi_data.ir_data); =20 irqfd->irq_bypass_data =3D pi_data.ir_data; list_add(&irqfd->vcpu_list, &svm->ir_list); @@ -841,8 +841,7 @@ int avic_pi_update_irte(struct kvm_kernel_irqfd *irqfd,= struct kvm *kvm, return irq_set_vcpu_affinity(host_irq, NULL); } =20 -static inline int -avic_update_iommu_vcpu_affinity(struct kvm_vcpu *vcpu, int cpu, bool r) +static inline int avic_update_iommu_vcpu_affinity(struct kvm_vcpu *vcpu, i= nt cpu) { int ret =3D 0; struct vcpu_svm *svm =3D to_svm(vcpu); @@ -861,7 +860,7 @@ avic_update_iommu_vcpu_affinity(struct kvm_vcpu *vcpu, = int cpu, bool r) return 0; =20 list_for_each_entry(irqfd, &svm->ir_list, vcpu_list) { - ret =3D amd_iommu_update_ga(cpu, r, irqfd->irq_bypass_data); + ret =3D amd_iommu_update_ga(cpu, irqfd->irq_bypass_data); if (ret) return ret; } @@ -923,7 +922,7 @@ void avic_vcpu_load(struct kvm_vcpu *vcpu, int cpu) =20 WRITE_ONCE(kvm_svm->avic_physical_id_table[vcpu->vcpu_id], entry); =20 - avic_update_iommu_vcpu_affinity(vcpu, h_physical_id, true); + avic_update_iommu_vcpu_affinity(vcpu, h_physical_id); =20 spin_unlock_irqrestore(&svm->ir_list_lock, flags); } @@ -963,7 +962,7 @@ void avic_vcpu_put(struct kvm_vcpu *vcpu) */ spin_lock_irqsave(&svm->ir_list_lock, flags); =20 - avic_update_iommu_vcpu_affinity(vcpu, -1, 0); + avic_update_iommu_vcpu_affinity(vcpu, -1); =20 entry &=3D ~AVIC_PHYSICAL_ID_ENTRY_IS_RUNNING_MASK; svm->avic_physical_id_entry =3D entry; diff --git a/drivers/iommu/amd/iommu.c b/drivers/iommu/amd/iommu.c index 5adc932b947e..bb804bbc916b 100644 --- a/drivers/iommu/amd/iommu.c +++ b/drivers/iommu/amd/iommu.c @@ -3990,15 +3990,17 @@ int amd_iommu_create_irq_domain(struct amd_iommu *i= ommu) * Update the pCPU information for an IRTE that is configured to post IRQs= to * a vCPU, without issuing an IOMMU invalidation for the IRTE. * - * This API is intended to be used when a vCPU is scheduled in/out (or sto= ps - * running for any reason), to do a fast update of IsRun and (conditionall= y) - * Destination. + * If the vCPU is associated with a pCPU (@cpu >=3D 0), configure the Dest= ination + * with the pCPU's APIC ID and set IsRun, else clear IsRun. I.e. treat vC= PUs + * that are associated with a pCPU as running. This API is intended to be= used + * when a vCPU is scheduled in/out (or stops running for any reason), to d= o a + * fast update of IsRun and (conditionally) Destination. * * Per the IOMMU spec, the Destination, IsRun, and GATag fields are not ca= ched * and thus don't require an invalidation to ensure the IOMMU consumes fre= sh * information. */ -int amd_iommu_update_ga(int cpu, bool is_run, void *data) +int amd_iommu_update_ga(int cpu, void *data) { struct amd_ir_data *ir_data =3D (struct amd_ir_data *)data; struct irte_ga *entry =3D (struct irte_ga *) ir_data->entry; @@ -4015,8 +4017,10 @@ int amd_iommu_update_ga(int cpu, bool is_run, void *= data) APICID_TO_IRTE_DEST_LO(cpu); entry->hi.fields.destination =3D APICID_TO_IRTE_DEST_HI(cpu); + entry->lo.fields_vapic.is_run =3D true; + } else { + entry->lo.fields_vapic.is_run =3D false; } - entry->lo.fields_vapic.is_run =3D is_run; =20 return __modify_irte_ga(ir_data->iommu, ir_data->irq_2_irte.devid, ir_data->irq_2_irte.index, entry); diff --git a/include/linux/amd-iommu.h b/include/linux/amd-iommu.h index 99b4fa9a0296..fe0e16ffe0e5 100644 --- a/include/linux/amd-iommu.h +++ b/include/linux/amd-iommu.h @@ -30,8 +30,7 @@ static inline void amd_iommu_detect(void) { } /* IOMMU AVIC Function */ extern int amd_iommu_register_ga_log_notifier(int (*notifier)(u32)); =20 -extern int -amd_iommu_update_ga(int cpu, bool is_run, void *data); +extern int amd_iommu_update_ga(int cpu, void *data); =20 extern int amd_iommu_activate_guest_mode(void *data); extern int amd_iommu_deactivate_guest_mode(void *data); @@ -44,8 +43,7 @@ amd_iommu_register_ga_log_notifier(int (*notifier)(u32)) return 0; } =20 -static inline int -amd_iommu_update_ga(int cpu, bool is_run, void *data) +static inline int amd_iommu_update_ga(int cpu, void *data) { return 0; } --=20 2.49.0.1151.ga128411c76-goog