From nobody Sun Dec 14 12:18:12 2025 Received: from mail-pg1-f202.google.com (mail-pg1-f202.google.com [209.85.215.202]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 314D3278772 for ; Fri, 23 May 2025 01:00:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.215.202 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747962051; cv=none; b=mPmCl/pqy4lxwmmf2jroN2QnMuibPGsszcV3HeZm3pjWNmw90WDIsehZJs7oszXvxmg/ifruz+/L7nJR8/AAOdHA3OXrf84PAdv/rM0PHdBzJlTr7/NeX0QmeROJrnezv15rG5FceJIdL5B077c+VWciGcmfqfSUKH1lVfY/jnI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747962051; c=relaxed/simple; bh=MZyvPz8cErBI6x41AwT2Y1YCOuXjfCDnsgc3RV5iM38=; h=Date:In-Reply-To:Mime-Version:References:Message-ID:Subject:From: To:Cc:Content-Type; b=WdxPvC4jKX/e/EC2Oxxg+7AympwkmDdeApjW3hW6RadFz7wTM4Qv9urQ3DEXQs21EwIDBKS2pZIg1gtIy16GmZtBVrHC6nEnemUdIkjzy8x640GcVGeStuS10ZmWHE+Wc2PLS4jOl6VJzDPx2MypvjJPeN/L9yhwYrCn7Qgw//g= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com; spf=pass smtp.mailfrom=flex--seanjc.bounces.google.com; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b=K0ujhG1S; arc=none smtp.client-ip=209.85.215.202 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=flex--seanjc.bounces.google.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="K0ujhG1S" Received: by mail-pg1-f202.google.com with SMTP id 41be03b00d2f7-b269789425bso8820884a12.0 for ; Thu, 22 May 2025 18:00:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1747962049; x=1748566849; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:from:to:cc:subject:date:message-id:reply-to; bh=/QbRbxgKq4IX+c52p+RG6yGaQTEP98D8xjd3vBs8mBU=; b=K0ujhG1SqVJkC06tHo3v2JZ43Mlov9RveM4XCv0x9bQUKLnOeci3J8s4lC+IFM6Nrq TcSv+yikNA1BHDhErtCqC8jeYRlZSVF46GCOwZCo5jw/5Uj6dt86oM1mOEcUdSLwVTW6 90O9e70/6as28DNOIPZaPIjTLZbNfihvnTkosArskBf3b6mMMhV3k2lzsVui/jRgLVun ui9Eaw9GjpnAdhqIdGi9LkKBPAeHGkWaYS2vvIFLHbQS5dZfO2uPkmN6Nw8PhdRPYexD dgqY5C/GXRzOQcCRdXn1jig8PCqzWPYdegbOJL5UvLwKx0BXfQLXIWLKobNWs97qUQPN q9eQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1747962049; x=1748566849; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:reply-to:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=/QbRbxgKq4IX+c52p+RG6yGaQTEP98D8xjd3vBs8mBU=; b=wst7zPiRyLN1Dq/bguh6Mr/Wy6GfTM+m/9vo0XVlPFGDilDjcA4gl+fOjrrZ/Lov9H PC0U2Qt82QbnsVPmJeycDs39TCF/IJ9BkHvy6liiHdpiTtr/ZloCdKyMWvMIcFlZnqG5 LmTyPFtM3pud1M+fphjOffniS9Veg6FsjI/N9L0DiaWyrvDjBNtGG9SNBg9z5pv9Zz5C cJKvln7l7nXxBEQqpt2QtbaPDcCYcfNCQj4y9Vg7fEfr1BQc8sJvJJdnFU8WdMdKuRoP vXAZFzTevqE4+cGyWHn8SdW/a5EzCwHsqZQDJeSvUTh4ZxZ3bPImVjp2ZfIPrqzh0DgI 4c8g== X-Forwarded-Encrypted: i=1; AJvYcCW5Pdz2bK1k9S3sKDgEuYTPZXPp+MMN0sodo86AqbPYK+hkrmYlJiez1bdIUg8DBp1CKx4NJy4Blx9AYbo=@vger.kernel.org X-Gm-Message-State: AOJu0Ywy+uwGVpRwwO4CgPEYpR/diaLlhHYkzVR33UwydKojXVIlI8fX FG0ueELqoMXMcLePXwpnJnaW7CktTAAVWlNl6VRc0fgkrF3uNpCXuO/5nJ1pghln3A7Ttde5XYh p4AoDkQ== X-Google-Smtp-Source: AGHT+IEoGfxyus4zW6bOW0Hkaw5yAvIEipFHaV1PyBgzP1+WYMZEtkQ5SFyRDx1RYRCGinQDFi3EhnerZLE= X-Received: from pjbpm5.prod.google.com ([2002:a17:90b:3c45:b0:30a:9720:ea33]) (user=seanjc job=prod-delivery.src-stubby-dispatcher) by 2002:a17:90b:4fcd:b0:30e:9349:2d7f with SMTP id 98e67ed59e1d1-30e9349309dmr36081293a91.4.1747962049336; Thu, 22 May 2025 18:00:49 -0700 (PDT) Reply-To: Sean Christopherson Date: Thu, 22 May 2025 17:59:28 -0700 In-Reply-To: <20250523010004.3240643-1-seanjc@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20250523010004.3240643-1-seanjc@google.com> X-Mailer: git-send-email 2.49.0.1151.ga128411c76-goog Message-ID: <20250523010004.3240643-24-seanjc@google.com> Subject: [PATCH v2 23/59] KVM: SVM: Extract SVM specific code out of get_pi_vcpu_info() From: Sean Christopherson To: Sean Christopherson , Paolo Bonzini , Joerg Roedel , David Woodhouse , Lu Baolu Cc: kvm@vger.kernel.org, iommu@lists.linux.dev, linux-kernel@vger.kernel.org, Sairaj Kodilkar , Vasant Hegde , Maxim Levitsky , Joao Martins , Francesco Lavra , David Matlack Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Genericize SVM's get_pi_vcpu_info() so that it can be shared with VMX. The only SVM specific information it provides is the AVIC back page, and that can be trivially retrieved by its sole caller. No functional change intended. Cc: Francesco Lavra Tested-by: Sairaj Kodilkar Signed-off-by: Sean Christopherson --- arch/x86/kvm/svm/avic.c | 25 ++++++++++++------------- 1 file changed, 12 insertions(+), 13 deletions(-) diff --git a/arch/x86/kvm/svm/avic.c b/arch/x86/kvm/svm/avic.c index a83769bb8123..3bbd565dcd0f 100644 --- a/arch/x86/kvm/svm/avic.c +++ b/arch/x86/kvm/svm/avic.c @@ -816,14 +816,14 @@ static int svm_ir_list_add(struct vcpu_svm *svm, */ static int get_pi_vcpu_info(struct kvm *kvm, struct kvm_kernel_irq_routing_entry *e, - struct vcpu_data *vcpu_info, struct vcpu_svm **svm) + struct vcpu_data *vcpu_info, struct kvm_vcpu **vcpu) { struct kvm_lapic_irq irq; - struct kvm_vcpu *vcpu =3D NULL; + *vcpu =3D NULL; =20 kvm_set_msi_irq(kvm, e, &irq); =20 - if (!kvm_intr_is_single_vcpu(kvm, &irq, &vcpu) || + if (!kvm_intr_is_single_vcpu(kvm, &irq, vcpu) || !kvm_irq_is_postable(&irq)) { pr_debug("SVM: %s: use legacy intr remap mode for irq %u\n", __func__, irq.vector); @@ -832,8 +832,6 @@ get_pi_vcpu_info(struct kvm *kvm, struct kvm_kernel_irq= _routing_entry *e, =20 pr_debug("SVM: %s: use GA mode for irq %u\n", __func__, irq.vector); - *svm =3D to_svm(vcpu); - vcpu_info->pi_desc_addr =3D avic_get_backing_page_address(*svm); vcpu_info->vector =3D irq.vector; =20 return 0; @@ -845,7 +843,7 @@ int avic_pi_update_irte(struct kvm_kernel_irqfd *irqfd,= struct kvm *kvm, { bool enable_remapped_mode =3D true; struct vcpu_data vcpu_info; - struct vcpu_svm *svm =3D NULL; + struct kvm_vcpu *vcpu =3D NULL; int ret =3D 0; =20 if (!kvm_arch_has_assigned_device(kvm) || !kvm_arch_has_irq_bypass()) @@ -868,19 +866,20 @@ int avic_pi_update_irte(struct kvm_kernel_irqfd *irqf= d, struct kvm *kvm, * 4. IRQ has incompatible delivery mode (SMI, INIT, etc) */ if (new && new->type =3D=3D KVM_IRQ_ROUTING_MSI && - !get_pi_vcpu_info(kvm, new, &vcpu_info, &svm) && - kvm_vcpu_apicv_active(&svm->vcpu)) { + !get_pi_vcpu_info(kvm, new, &vcpu_info, &vcpu) && + kvm_vcpu_apicv_active(vcpu)) { struct amd_iommu_pi_data pi; =20 enable_remapped_mode =3D false; =20 + vcpu_info.pi_desc_addr =3D avic_get_backing_page_address(to_svm(vcpu)); + /* * Try to enable guest_mode in IRTE. Note, the address * of the vCPU's AVIC backing page is passed to the * IOMMU via vcpu_info->pi_desc_addr. */ - pi.ga_tag =3D AVIC_GATAG(to_kvm_svm(kvm)->avic_vm_id, - svm->vcpu.vcpu_id); + pi.ga_tag =3D AVIC_GATAG(to_kvm_svm(kvm)->avic_vm_id, vcpu->vcpu_id); pi.is_guest_mode =3D true; pi.vcpu_data =3D &vcpu_info; ret =3D irq_set_vcpu_affinity(host_irq, &pi); @@ -893,11 +892,11 @@ int avic_pi_update_irte(struct kvm_kernel_irqfd *irqf= d, struct kvm *kvm, * scheduling information in IOMMU irte. */ if (!ret) - ret =3D svm_ir_list_add(svm, irqfd, &pi); + ret =3D svm_ir_list_add(to_svm(vcpu), irqfd, &pi); } =20 - if (!ret && svm) { - trace_kvm_pi_irte_update(host_irq, svm->vcpu.vcpu_id, + if (!ret && vcpu) { + trace_kvm_pi_irte_update(host_irq, vcpu->vcpu_id, guest_irq, vcpu_info.vector, vcpu_info.pi_desc_addr, !!new); } --=20 2.49.0.1151.ga128411c76-goog