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[2001:14ba:a0c3:3a00:264b:feff:fe8b:be8a]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-550e703c2f3sm3482506e87.214.2025.05.22.12.04.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 22 May 2025 12:04:19 -0700 (PDT) From: Dmitry Baryshkov Date: Thu, 22 May 2025 22:03:35 +0300 Subject: [PATCH v5 16/30] drm/msm/dpu: get rid of DPU_PINGPONG_DSC Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250522-dpu-drop-features-v5-16-3b2085a07884@oss.qualcomm.com> References: <20250522-dpu-drop-features-v5-0-3b2085a07884@oss.qualcomm.com> In-Reply-To: <20250522-dpu-drop-features-v5-0-3b2085a07884@oss.qualcomm.com> To: Rob Clark , Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter , Vinod Koul , Konrad Dybcio Cc: Neil Armstrong , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org, Dmitry Baryshkov X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=4399; i=dmitry.baryshkov@oss.qualcomm.com; h=from:subject:message-id; bh=8C+zkxaDTJSXItCIlDecEEvq4hEyx2Q9rh41cf2R1uI=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBoL3T+6Vo7A/TuAXzcpo59a4AgI6+6FZw9GJd8B sf0vWei7P6JATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCaC90/gAKCRCLPIo+Aiko 1Wp+B/wJg1F2PJfrSjFkAINTs5XuNswb7x7B1Ixmq1lGX092C2NUyO7AxiFXQkS5LtIoLqkdmkr ZhgmtyKxFbUnkWKPbJ9cuqztCx/NEciZwbwZmVB7X2XU4LXH8VYW/tcQTXRzifiblEW8oNqL825 fXwkGLlDKjJ1ztC8SP/Le92yu8rTtYvfG6A1d3bs7r/oj5HeGp0CceRJdVKQ8mdSrV9q7Tf9UwV glKUqDKuOqI0Zw++hbZSMXRqB+sDKd/4XwbVOBzxaXD/wV5Md33QxfP010YR3ZI++xgjDyZWEfB vTXgDfWaNup9OnVgcOwO/Nvc1Eu6HkOox3gvNvRvxYTyP516 X-Developer-Key: i=dmitry.baryshkov@oss.qualcomm.com; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A X-Authority-Analysis: v=2.4 cv=QKBoRhLL c=1 sm=1 tr=0 ts=682f7537 cx=c_pps a=hnmNkyzTK/kJ09Xio7VxxA==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=dt9VzEwgFbYA:10 a=KKAkSRfTAAAA:8 a=EUspDBNiAAAA:8 a=K8QCOMLVtaD6p7eYglIA:9 a=QEXdDO2ut3YA:10 a=PEH46H7Ffwr30OY-TuGO:22 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-ORIG-GUID: GfgQcHLA7ns7fVlj7hiXTvojnbi7G-GO X-Proofpoint-GUID: GfgQcHLA7ns7fVlj7hiXTvojnbi7G-GO X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNTIyMDE5MSBTYWx0ZWRfXzINQ6uqnOx/H lM2kCu0o4O6UrD3UBHUcrIBMnj6WC3HyEW09U7maL0dWbnWCUxOwRCn7eAdz/UuEC8c+4THL8uU Id2aUE/YRaB3GuTffMldt4z+rt/pGuMlXPTjTeMxAnZ6raHaPZBs7dPtbu2XlOVRr6fPfcmotkS OUgyNwlIFSvbIXnMYH7JsjBpjGmlvid+UwJRORgTZm4UmfnNtoIwuDEOqDHccX1F4C3/sd/n9Bf T6W3ZalXPD24iOBLNDsdd+KnMGdLcSbko+FhPZ8IY4BN+4pcPcZ6e9t2DqH9ZH8bUvsjaJ5o09v qTdpY/wiiicN2WCWtBxDWg4KDut8MIubaLR3HV2JCrIsHYhVmpULb09l695G7lcpNoQAaI/CxSw 9vZ6rmsRzDpvLXQYo6HE0hMQP8Mc8/dzOfQxqmwDLgGNi5HlsfhsXuXYox5RwqReYB65HcUX X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.0.736,FMLib:17.12.80.40 definitions=2025-05-22_09,2025-05-22_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 spamscore=0 clxscore=1015 phishscore=0 lowpriorityscore=0 adultscore=0 mlxlogscore=999 suspectscore=0 bulkscore=0 impostorscore=0 priorityscore=1501 malwarescore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2505160000 definitions=main-2505220191 From: Dmitry Baryshkov Continue migration to the MDSS-revision based checks and replace DPU_PINGPONG_DSC feature bit with the core_major_ver < 7 check. Signed-off-by: Dmitry Baryshkov Reviewed-by: Neil Armstrong Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_7_msm8996.h | 4 ---- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 7 ++----- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 2 -- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c | 2 +- 4 files changed, 3 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_7_msm8996.h b/driv= ers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_7_msm8996.h index 8fe07a5683f734a058e7e7250f0811e3b7b7cf07..0e8e71775f2c1c38af018353c85= ffeb6ccddb42f 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_7_msm8996.h +++ b/drivers/gpu/drm/msm/disp/dpu1/catalog/dpu_1_7_msm8996.h @@ -181,28 +181,24 @@ static const struct dpu_pingpong_cfg msm8996_pp[] =3D= { { .name =3D "pingpong_0", .id =3D PINGPONG_0, .base =3D 0x70000, .len =3D 0xd4, - .features =3D PINGPONG_MSM8996_MASK, .sblk =3D &msm8996_pp_sblk, .intr_done =3D DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 8), .intr_rdptr =3D DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 12), }, { .name =3D "pingpong_1", .id =3D PINGPONG_1, .base =3D 0x70800, .len =3D 0xd4, - .features =3D PINGPONG_MSM8996_MASK, .sblk =3D &msm8996_pp_sblk, .intr_done =3D DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 9), .intr_rdptr =3D DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 13), }, { .name =3D "pingpong_2", .id =3D PINGPONG_2, .base =3D 0x71000, .len =3D 0xd4, - .features =3D PINGPONG_MSM8996_MASK, .sblk =3D &msm8996_pp_sblk, .intr_done =3D DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 10), .intr_rdptr =3D DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 14), }, { .name =3D "pingpong_3", .id =3D PINGPONG_3, .base =3D 0x71800, .len =3D 0xd4, - .features =3D PINGPONG_MSM8996_MASK, .sblk =3D &msm8996_pp_sblk, .intr_done =3D DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 11), .intr_rdptr =3D DPU_IRQ_IDX(MDP_SSPP_TOP0_INTR, 15), diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/d= rm/msm/disp/dpu1/dpu_hw_catalog.c index df1eeb9082f74ab734c235f0cd0baf8c0eda14b5..75b679cd2bd27dd25971489a2d3= a6f516b248235 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c @@ -95,14 +95,11 @@ #define MIXER_QCM2290_MASK \ (BIT(DPU_DIM_LAYER) | BIT(DPU_MIXER_COMBINED_ALPHA)) =20 -#define PINGPONG_MSM8996_MASK \ - (BIT(DPU_PINGPONG_DSC)) - #define PINGPONG_SDM845_MASK \ - (BIT(DPU_PINGPONG_DITHER) | BIT(DPU_PINGPONG_DSC)) + (BIT(DPU_PINGPONG_DITHER)) =20 #define PINGPONG_SM8150_MASK \ - (BIT(DPU_PINGPONG_DITHER) | BIT(DPU_PINGPONG_DSC)) + (BIT(DPU_PINGPONG_DITHER)) =20 #define WB_SDM845_MASK (BIT(DPU_WB_LINE_MODE) | \ BIT(DPU_WB_UBWC) | \ diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h b/drivers/gpu/d= rm/msm/disp/dpu1/dpu_hw_catalog.h index bc71ec9a5bc8b6e15d7af13c42ba5d4197729822..ac63f753b43615f7c34d2da51fc= e919fd77142bf 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h @@ -118,14 +118,12 @@ enum { * @DPU_PINGPONG_SPLIT PP block supports split fifo * @DPU_PINGPONG_SLAVE PP block is a suitable slave for split fifo * @DPU_PINGPONG_DITHER Dither blocks - * @DPU_PINGPONG_DSC PP block supports DSC * @DPU_PINGPONG_MAX */ enum { DPU_PINGPONG_SPLIT =3D 0x1, DPU_PINGPONG_SLAVE, DPU_PINGPONG_DITHER, - DPU_PINGPONG_DSC, DPU_PINGPONG_MAX }; =20 diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c b/drivers/gpu/= drm/msm/disp/dpu1/dpu_hw_pingpong.c index 36c0ec775b92036eaab26e1fa5331579651ac27c..49e03ecee9e8b567a3f809b977d= eb83731006ac0 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.c @@ -319,7 +319,7 @@ struct dpu_hw_pingpong *dpu_hw_pingpong_init(struct drm= _device *dev, c->ops.disable_autorefresh =3D dpu_hw_pp_disable_autorefresh; } =20 - if (test_bit(DPU_PINGPONG_DSC, &cfg->features)) { + if (mdss_rev->core_major_ver < 7) { c->ops.setup_dsc =3D dpu_hw_pp_setup_dsc; c->ops.enable_dsc =3D dpu_hw_pp_dsc_enable; c->ops.disable_dsc =3D dpu_hw_pp_dsc_disable; --=20 2.39.5