From nobody Mon Feb 9 16:06:16 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.14]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7E03E23C4F4 for ; Wed, 21 May 2025 22:51:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.14 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747867865; cv=none; b=C6w78A+ZLTUvkcmMW55jVYljdnynRsVMeT0B2l//qwnRUyH0fSIgzr3rD1Si5YaZDBkYDZ3FOSQ51vENbyft+g4X22E6y4tg9LmYOPP2VlPb95OB1hXsQs65Sg2eRotOlMmIx/f3+HzjTkihx96vPg9mg5iA+rAwXceoXbSEqWg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747867865; c=relaxed/simple; bh=AlGp/WzhswgLTg6Sf2jDcddhQNvZ6OI3nQs2xzlNejU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ZiJREuy/c8TNfAd+OPhKA7lTJtB+jK/k3C/HBAaAbvGgOkiHC8PQ0bO9dp4W7wIpHxZRRSQ5SNXZsDg3E4uJGPDMkPhtqjswX1M9RR4BdRTG6FqQ+aCjOrm1XH1+kBYyB/zQnJepVBu34vehCIQHx/8Z+h6wt+N8DUwKGtfFC+0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=Gr2fvddJ; arc=none smtp.client-ip=198.175.65.14 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="Gr2fvddJ" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1747867863; x=1779403863; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=AlGp/WzhswgLTg6Sf2jDcddhQNvZ6OI3nQs2xzlNejU=; b=Gr2fvddJ2jPlGryOK9Z0EGeyDciFGD5xMwG1tbuanmKLvcYjuIz4Kr1R j6junHM9Fc/3DJkq1vaiMn8RPRFnwW7OYSUZ1K6faCpxZ+2s9UmZp1q1s q1wnF009ZCTtPDqpjMv2jL1Xi3HTZhIea+OjCT5HbmIVykj7sl+kbCKOz 0cOoBxqH9BtMxK9aYBe8Mc02WLVE3PL32fh66copaPv6jLwmFlquVTkql RVUV6f10zJ1mt2rl1qog83GibAuZdqHjqb3RJKkXAv7g0k5Qr60xX65Aq dh7eQjIN7CW3X4xnVIl2VCPZxyZRdpXNx0jfhNujwPBiqnX5Q1TP5GqDX g==; X-CSE-ConnectionGUID: ANu9ZWPpSkGs3bKFHq5ETw== X-CSE-MsgGUID: MQ4hvobJT5+EHW72KFl1mw== X-IronPort-AV: E=McAfee;i="6700,10204,11440"; a="53677658" X-IronPort-AV: E=Sophos;i="6.15,304,1739865600"; d="scan'208";a="53677658" Received: from fmviesa009.fm.intel.com ([10.60.135.149]) by orvoesa106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 May 2025 15:50:57 -0700 X-CSE-ConnectionGUID: eGYhwU6kT6+gW0sCTS0J3Q== X-CSE-MsgGUID: 9fGYt8ZrQTqWe4cezWP5Yg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.15,304,1739865600"; d="scan'208";a="141352144" Received: from agluck-desk3.sc.intel.com ([172.25.103.51]) by fmviesa009-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 May 2025 15:50:57 -0700 From: Tony Luck To: Fenghua Yu , Reinette Chatre , Maciej Wieczor-Retman , Peter Newman , James Morse , Babu Moger , Drew Fustini , Dave Martin , Anil Keshavamurthy , Chen Yu Cc: x86@kernel.org, linux-kernel@vger.kernel.org, patches@lists.linux.dev, Tony Luck Subject: [PATCH v5 08/29] x86/resctrl: Move L3 initialization out of domain_add_cpu_mon() Date: Wed, 21 May 2025 15:50:26 -0700 Message-ID: <20250521225049.132551-9-tony.luck@intel.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250521225049.132551-1-tony.luck@intel.com> References: <20250521225049.132551-1-tony.luck@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" To prepare for additional types of monitoring domains, move all the L3 resource monitoring domain initialization out of domain_add_cpu_mon() and into a new helper function l3_mon_domain_setup() (name chosen as the partner of existing l3_mon_domain_free()). Signed-off-by: Tony Luck --- arch/x86/kernel/cpu/resctrl/core.c | 55 ++++++++++++++++++------------ 1 file changed, 33 insertions(+), 22 deletions(-) diff --git a/arch/x86/kernel/cpu/resctrl/core.c b/arch/x86/kernel/cpu/resct= rl/core.c index c721d1712e97..990a0c1af634 100644 --- a/arch/x86/kernel/cpu/resctrl/core.c +++ b/arch/x86/kernel/cpu/resctrl/core.c @@ -493,33 +493,12 @@ static void domain_add_cpu_ctrl(int cpu, struct rdt_r= esource *r) } } =20 -static void domain_add_cpu_mon(int cpu, struct rdt_resource *r) +static void l3_mon_domain_setup(int cpu, int id, struct rdt_resource *r, s= truct list_head *add_pos) { - int id =3D get_domain_id_from_scope(cpu, r->mon_scope); - struct list_head *add_pos =3D NULL; struct rdt_hw_mon_domain *hw_dom; - struct rdt_domain_hdr *hdr; struct rdt_mon_domain *d; int err; =20 - lockdep_assert_held(&domain_list_lock); - - if (id < 0) { - pr_warn_once("Can't find monitor domain id for CPU:%d scope:%d for resou= rce %s\n", - cpu, r->mon_scope, r->name); - return; - } - - hdr =3D resctrl_find_domain(&r->mon_domains, id, &add_pos); - if (hdr) { - if (!domain_header_is_valid(hdr, RESCTRL_MON_DOMAIN, r->rid)) - return; - d =3D container_of(hdr, struct rdt_mon_domain, hdr); - - cpumask_set_cpu(cpu, &d->hdr.cpu_mask); - return; - } - hw_dom =3D kzalloc_node(sizeof(*hw_dom), GFP_KERNEL, cpu_to_node(cpu)); if (!hw_dom) return; @@ -553,6 +532,38 @@ static void domain_add_cpu_mon(int cpu, struct rdt_res= ource *r) } } =20 +static void domain_add_cpu_mon(int cpu, struct rdt_resource *r) +{ + int id =3D get_domain_id_from_scope(cpu, r->mon_scope); + struct list_head *add_pos =3D NULL; + struct rdt_domain_hdr *hdr; + + lockdep_assert_held(&domain_list_lock); + + if (id < 0) { + pr_warn_once("Can't find monitor domain id for CPU:%d scope:%d for resou= rce %s\n", + cpu, r->mon_scope, r->name); + return; + } + + hdr =3D resctrl_find_domain(&r->mon_domains, id, &add_pos); + if (hdr) { + if (!domain_header_is_valid(hdr, RESCTRL_MON_DOMAIN, r->rid)) + return; + cpumask_set_cpu(cpu, &hdr->cpu_mask); + + return; + } + + switch (r->rid) { + case RDT_RESOURCE_L3: + l3_mon_domain_setup(cpu, id, r, add_pos); + break; + default: + WARN_ON_ONCE(1); + } +} + static void domain_add_cpu(int cpu, struct rdt_resource *r) { if (r->alloc_capable) --=20 2.49.0