From nobody Sun Dec 14 19:34:37 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E869815098F; Wed, 21 May 2025 13:39:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747834743; cv=none; b=ObzePntZ8XNd9xWd1oC78BdeITutIv9SzN+olGFoOd5vQMhQqx0Tgz6XFZhnn/XNveD4qSlO6+6m1WbsqsPYK0+ynssJ4csXy9/1q4y2adNe3P/6mHKRk9lXK6FgxlDbdNykS+9aY9g0E8xncQnP5qC18XCTp2Rc7xqyZwj6BoY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747834743; c=relaxed/simple; bh=hmw3/TYYvnguBR8TqyLON4vogTv3Z6PA39/cDuVfL8E=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=plxY1+3h3WTxkPY47IjsUZzcM+0cwn2mS2PmEsYi0KBPl8R7UpcZgOFz7Z5XtlMwpgSXqCG5r0R8CmmpnlEteJbBVI13OxG8l9pMBPAZksNseLZsZyEBCDr2S+M8LSTdK7JouZKDtGDi/fwFUyMfEQajYj3q4YDmeLKTuf6OtNk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=UY2MtFRu; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="UY2MtFRu" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 2A0EDC4CEE7; Wed, 21 May 2025 13:38:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1747834742; bh=hmw3/TYYvnguBR8TqyLON4vogTv3Z6PA39/cDuVfL8E=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=UY2MtFRuf29jjPSvmAzXOqwqgIzULtyOEfclYllVGbcz3fZXRqRBIqgN7iuhjknzw qjwmSveiM1XykMblK+F4gO3RNnXAf5555WyKYHXYH8uxg6+3cz52788g8LeSlPI+0j 1QaN5yxdOPWwaj6FReeIaApJ3mlQitUSNAcqpPAW8tQQQs0afXANgDjaxIcIeVOYKX 9FTFCD00gGT2ZBXO0XEz0apytoSkeEYUaZqUhUAZ/oFZU6dQqHoCtXu7yv6kyDsixc Eyi5Hr68nzSbXwLF3f9Uzgrvb1Sf1VjqD5oeG5iIof61jYd8XE2lTGsYDK1O0YjVs0 64mk4E899jc6A== From: Konrad Dybcio Date: Wed, 21 May 2025 15:38:10 +0200 Subject: [PATCH 1/4] dt-bindings: PCI: qcom,pcie-sc8180x: Drop unrelated clocks from PCIe hosts Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250521-topic-8150_pcie_drop_clocks-v1-1-3d42e84f6453@oss.qualcomm.com> References: <20250521-topic-8150_pcie_drop_clocks-v1-0-3d42e84f6453@oss.qualcomm.com> In-Reply-To: <20250521-topic-8150_pcie_drop_clocks-v1-0-3d42e84f6453@oss.qualcomm.com> To: Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Manivannan Sadhasivam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio Cc: Qiang Yu , Ziyue Zhang , Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1747834731; l=2010; i=konrad.dybcio@oss.qualcomm.com; s=20230215; h=from:subject:message-id; bh=HJbsRaZED0wy0A3F8QPlsAh5wTABzi2Z6ovJBrDz3qg=; b=6G8DmoAaPdMGYwy9JopFryWqvO8O2YBHxxPULwgFPvcZXhmatN/zSSHMIzu6ikGNhFa9pz/YD ITdfoN1G752C5yf1xiY1ZYKXdLpCQg8qt63OCbkSmTp+4H5wvoJBmev X-Developer-Key: i=konrad.dybcio@oss.qualcomm.com; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= From: Konrad Dybcio The TBU clock belongs to the Translation Buffer Unit, part of the SMMU. The ref clock is already being driven upstream through some of the branches. Signed-off-by: Konrad Dybcio Acked-by: Rob Herring (Arm) --- .../devicetree/bindings/pci/qcom,pcie-sc8180x.yaml | 14 ++++------= ---- 1 file changed, 4 insertions(+), 10 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-sc8180x.yaml b= /Documentation/devicetree/bindings/pci/qcom,pcie-sc8180x.yaml index 331fc25d7a17d657d4db3863f0c538d0e44dc840..34a4d7b2c8459aeb615736f54c1= 971014adb205f 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie-sc8180x.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-sc8180x.yaml @@ -33,8 +33,8 @@ properties: - const: mhi # MHI registers =20 clocks: - minItems: 8 - maxItems: 8 + minItems: 6 + maxItems: 6 =20 clock-names: items: @@ -44,8 +44,6 @@ properties: - const: bus_master # Master AXI clock - const: bus_slave # Slave AXI clock - const: slave_q2a # Slave Q2A clock - - const: ref # REFERENCE clock - - const: tbu # PCIe TBU clock =20 interrupts: minItems: 8 @@ -117,17 +115,13 @@ examples: <&gcc GCC_PCIE_0_CFG_AHB_CLK>, <&gcc GCC_PCIE_0_MSTR_AXI_CLK>, <&gcc GCC_PCIE_0_SLV_AXI_CLK>, - <&gcc GCC_PCIE_0_SLV_Q2A_AXI_CLK>, - <&gcc GCC_PCIE_0_CLKREF_CLK>, - <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>; + <&gcc GCC_PCIE_0_SLV_Q2A_AXI_CLK>; clock-names =3D "pipe", "aux", "cfg", "bus_master", "bus_slave", - "slave_q2a", - "ref", - "tbu"; + "slave_q2a"; =20 dma-coherent; =20 --=20 2.49.0 From nobody Sun Dec 14 19:34:37 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 333E827D763; Wed, 21 May 2025 13:39:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747834748; cv=none; b=HtSm2XBP9H22xU2+WoHFxkNesZQpTOU0uSaBxei77cQd0Pxr6vr5xASmo2UOG//Pm2pj6p8MjQ1OLupJKeK56fCOXMWFxYbamDKU5kvD/GVNDK+xHNnST39EZbkAvK8lX78r6UzsGR7e9gLfW1J9kSwH2UvDMXM3vp0uGE0MmCw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747834748; c=relaxed/simple; bh=higOUmwE/JWWFF1zmcM7ckjtomNy5EXZlVjC90Xww/M=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=G4YhqmxzDTFcES537bhnpCL4F6Q3WQpaPUokOEgBRKiQb4/7CknI/egrjvPtRzIYeI1Uk5tUiJ/+nxbAFZnBaZZ+ljRxE/ixIi8l+0eNKZZs46zXdqkd4C4qKfW6nIw5WRm7/SGtgMC2U4czncWmKPp5g2DSdwcYmw6YTVGLy4o= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=ck8hXaxZ; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="ck8hXaxZ" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 1D02DC4CEE4; Wed, 21 May 2025 13:39:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1747834747; bh=higOUmwE/JWWFF1zmcM7ckjtomNy5EXZlVjC90Xww/M=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=ck8hXaxZ8G/WXT6hcLlbAoMnmttfJzWy29Xpi7wEkQw4T/2SubYJyaLTJsBW1gg6b ppKn+hjJfDTsk5mlSoq14+kKzJT48k3sp/SfrnsnzrWrD94gP4Uj4LyFXWAeKkHief 2wgP2MiQQhJP0nk0THXvQH7arKFAu2nx/VLHK0K9rES7425HtO7Qu6Y2TqB6shtyfy 9Z62I5RxbFXGXQpQBSxF0WHgsKxstzplRJq80J8v4+6Upc9YSwVBU+j9rm5hG3SBME PSwNKJFOd+chcJ7N7Xq2/bM7+fKGv2keU3iXsPoeB8k0u9S/Uvz3dQTzpeUlee50CE jfZLGx1pja8Sw== From: Konrad Dybcio Date: Wed, 21 May 2025 15:38:11 +0200 Subject: [PATCH 2/4] dt-bindings: PCI: qcom,pcie-sm8150: Drop unrelated clocks from PCIe hosts Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250521-topic-8150_pcie_drop_clocks-v1-2-3d42e84f6453@oss.qualcomm.com> References: <20250521-topic-8150_pcie_drop_clocks-v1-0-3d42e84f6453@oss.qualcomm.com> In-Reply-To: <20250521-topic-8150_pcie_drop_clocks-v1-0-3d42e84f6453@oss.qualcomm.com> To: Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Manivannan Sadhasivam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio Cc: Qiang Yu , Ziyue Zhang , Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1747834731; l=2093; i=konrad.dybcio@oss.qualcomm.com; s=20230215; h=from:subject:message-id; bh=sQCw7E34cAPyLXmDB3OvJZnN+ubAWssAmMHAauecdyk=; b=9OQWHcrk9X3HLOJbNqQj8gTtxkBVN0/QoYhamzyVIhXCpJw+FiqgqfwtvnI+RVx7rthnkBgAf 22LvHyNGAhTAhSA41k+pMrDa78H2fx7Kt5OCxUsDVQDzhhIw06GwTzr X-Developer-Key: i=konrad.dybcio@oss.qualcomm.com; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= From: Konrad Dybcio The TBU clock belongs to the Translation Buffer Unit, part of the SMMU. The ref clock is already being driven upstream through some of the branches. Signed-off-by: Konrad Dybcio Acked-by: Rob Herring (Arm) --- .../devicetree/bindings/pci/qcom,pcie-sm8150.yaml | 14 ++++------= ---- 1 file changed, 4 insertions(+), 10 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie-sm8150.yaml b/= Documentation/devicetree/bindings/pci/qcom,pcie-sm8150.yaml index a604f2a79de3b28863a0b8933e6679df4953402c..434448cd816ad4241ade402bbc6= 21efc49646bdd 100644 --- a/Documentation/devicetree/bindings/pci/qcom,pcie-sm8150.yaml +++ b/Documentation/devicetree/bindings/pci/qcom,pcie-sm8150.yaml @@ -33,8 +33,8 @@ properties: - const: mhi # MHI registers =20 clocks: - minItems: 8 - maxItems: 8 + minItems: 6 + maxItems: 6 =20 clock-names: items: @@ -44,8 +44,6 @@ properties: - const: bus_master # Master AXI clock - const: bus_slave # Slave AXI clock - const: slave_q2a # Slave Q2A clock - - const: tbu # PCIe TBU clock - - const: ref # REFERENCE clock =20 interrupts: minItems: 8 @@ -111,17 +109,13 @@ examples: <&gcc GCC_PCIE_0_CFG_AHB_CLK>, <&gcc GCC_PCIE_0_MSTR_AXI_CLK>, <&gcc GCC_PCIE_0_SLV_AXI_CLK>, - <&gcc GCC_PCIE_0_SLV_Q2A_AXI_CLK>, - <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>, - <&rpmhcc RPMH_CXO_CLK>; + <&gcc GCC_PCIE_0_SLV_Q2A_AXI_CLK>; clock-names =3D "pipe", "aux", "cfg", "bus_master", "bus_slave", - "slave_q2a", - "tbu", - "ref"; + "slave_q2a"; =20 interrupts =3D , , --=20 2.49.0 From nobody Sun Dec 14 19:34:37 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5E30627F4D6; Wed, 21 May 2025 13:39:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747834753; cv=none; b=sO7gy3Wzj9/7n5DM4MPeqVSR3ecZY8JAM9yeP8aENeW8AHXgRf1TEa1i8R00x4zmWViOxYRtQL+e6rmIvWwSVWGBLpVGnrQ+VxYd9koFG08QY8ibw624G3O4Vd1Liu0x2YWWR9ETLb2AjwwLZQdMw5lmrqihZuOdD50DFAmJF14= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747834753; c=relaxed/simple; bh=QZ/N+a39LlXrtVzFcSeG+ClgaQogMsn7b0CzKFTeir8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=t/2Mh10dpblXdN4G3J8N0C2TZPeQee7gus9slqnCukp8TmWFWG9XgggTkwD0yTPnaxlqtiPxZRxrnw3a6AjD5ZemPdfCGXYQ4GcnYxo+/ahKANk/6uLaSMGLyuBzM8kiabbRZxP/vvxk+YE5cI1geY74Y6R8bJgRrwcj8h3UhvE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=iPcPjC76; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="iPcPjC76" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 237BCC4CEE7; Wed, 21 May 2025 13:39:07 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1747834752; bh=QZ/N+a39LlXrtVzFcSeG+ClgaQogMsn7b0CzKFTeir8=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=iPcPjC76RCEOUDmGGWiII5dIVRhPBaVNQ9zTe4xOpzlQ/ui8MBGsPh63cglnOcnK+ KodF6o5kCtyna+ERglYo+ABXdliNi40+o5YxLvrzzZ2Q+HneEK/qcUBXxUwmu/VCNh KE+wR0R2SXJ72EjF24zWiFmfgYyDifJXlaAa2Cd/adU6t5CGvrPVu5Lf0ZOAjKCynk J+wddV+7tcMmbfkQ5PjMie0zgMvOl1u/3mBDIFVFGyVhqvpYojnDZk7TEBLk/iF4vN 9i+YIvdHrqw01VDX6MgETkEJMY9RYROEETVlVa/wSFdG9y52oIPwbG/1XbLBVV3KSm 7pwRT2rNxAGsA== From: Konrad Dybcio Date: Wed, 21 May 2025 15:38:12 +0200 Subject: [PATCH 3/4] arm64: dts: qcom: sc8180x: Drop unrelated clocks from PCIe hosts Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250521-topic-8150_pcie_drop_clocks-v1-3-3d42e84f6453@oss.qualcomm.com> References: <20250521-topic-8150_pcie_drop_clocks-v1-0-3d42e84f6453@oss.qualcomm.com> In-Reply-To: <20250521-topic-8150_pcie_drop_clocks-v1-0-3d42e84f6453@oss.qualcomm.com> To: Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Manivannan Sadhasivam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio Cc: Qiang Yu , Ziyue Zhang , Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1747834731; l=3135; i=konrad.dybcio@oss.qualcomm.com; s=20230215; h=from:subject:message-id; bh=zxHMcimv+kU1WGBSo+lpDyaARP5YfF9wHCQPFVFx1OQ=; b=PJh1oDwjEBHc3YOxlXQw67vlhY97+jXIMDs0wve2/oGa65q3WoonslJya507FmX6FklnT1nbD WnHIVSty5laCR7TqaNeBSbrL0axTGiAfblhrwi4x60gvGHfgRu1dZRe X-Developer-Key: i=konrad.dybcio@oss.qualcomm.com; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= From: Konrad Dybcio The TBU clock belongs to the Translation Buffer Unit, part of the SMMU. The ref clock is already being driven upstream through some of the branches. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sc8180x.dtsi | 32 ++++++++------------------------ 1 file changed, 8 insertions(+), 24 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc8180x.dtsi b/arch/arm64/boot/dts/qc= om/sc8180x.dtsi index b84e47a461a014871ef11e08d18af70bec8e2d63..fa8bd1ddfb39c3d46095f94a6c9= 7fedb71db00ba 100644 --- a/arch/arm64/boot/dts/qcom/sc8180x.dtsi +++ b/arch/arm64/boot/dts/qcom/sc8180x.dtsi @@ -1747,17 +1747,13 @@ pcie0: pcie@1c00000 { <&gcc GCC_PCIE_0_CFG_AHB_CLK>, <&gcc GCC_PCIE_0_MSTR_AXI_CLK>, <&gcc GCC_PCIE_0_SLV_AXI_CLK>, - <&gcc GCC_PCIE_0_SLV_Q2A_AXI_CLK>, - <&gcc GCC_PCIE_0_CLKREF_CLK>, - <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>; + <&gcc GCC_PCIE_0_SLV_Q2A_AXI_CLK>; clock-names =3D "pipe", "aux", "cfg", "bus_master", "bus_slave", - "slave_q2a", - "ref", - "tbu"; + "slave_q2a"; =20 assigned-clocks =3D <&gcc GCC_PCIE_0_AUX_CLK>; assigned-clock-rates =3D <19200000>; @@ -1868,17 +1864,13 @@ pcie3: pcie@1c08000 { <&gcc GCC_PCIE_3_CFG_AHB_CLK>, <&gcc GCC_PCIE_3_MSTR_AXI_CLK>, <&gcc GCC_PCIE_3_SLV_AXI_CLK>, - <&gcc GCC_PCIE_3_SLV_Q2A_AXI_CLK>, - <&gcc GCC_PCIE_3_CLKREF_CLK>, - <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>; + <&gcc GCC_PCIE_3_SLV_Q2A_AXI_CLK>; clock-names =3D "pipe", "aux", "cfg", "bus_master", "bus_slave", - "slave_q2a", - "ref", - "tbu"; + "slave_q2a"; =20 assigned-clocks =3D <&gcc GCC_PCIE_3_AUX_CLK>; assigned-clock-rates =3D <19200000>; @@ -1990,17 +1982,13 @@ pcie1: pcie@1c10000 { <&gcc GCC_PCIE_1_CFG_AHB_CLK>, <&gcc GCC_PCIE_1_MSTR_AXI_CLK>, <&gcc GCC_PCIE_1_SLV_AXI_CLK>, - <&gcc GCC_PCIE_1_SLV_Q2A_AXI_CLK>, - <&gcc GCC_PCIE_1_CLKREF_CLK>, - <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>; + <&gcc GCC_PCIE_1_SLV_Q2A_AXI_CLK>; clock-names =3D "pipe", "aux", "cfg", "bus_master", "bus_slave", - "slave_q2a", - "ref", - "tbu"; + "slave_q2a"; =20 assigned-clocks =3D <&gcc GCC_PCIE_1_AUX_CLK>; assigned-clock-rates =3D <19200000>; @@ -2112,17 +2100,13 @@ pcie2: pcie@1c18000 { <&gcc GCC_PCIE_2_CFG_AHB_CLK>, <&gcc GCC_PCIE_2_MSTR_AXI_CLK>, <&gcc GCC_PCIE_2_SLV_AXI_CLK>, - <&gcc GCC_PCIE_2_SLV_Q2A_AXI_CLK>, - <&gcc GCC_PCIE_2_CLKREF_CLK>, - <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>; + <&gcc GCC_PCIE_2_SLV_Q2A_AXI_CLK>; clock-names =3D "pipe", "aux", "cfg", "bus_master", "bus_slave", - "slave_q2a", - "ref", - "tbu"; + "slave_q2a"; =20 assigned-clocks =3D <&gcc GCC_PCIE_2_AUX_CLK>; assigned-clock-rates =3D <19200000>; --=20 2.49.0 From nobody Sun Dec 14 19:34:37 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 37E9427F4D6; Wed, 21 May 2025 13:39:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747834757; cv=none; b=QhN1FXa8Q/2ACBQt+ot42xl/Ed/HIF1Slnk6YIXFam/DzZ/54XH2kKzmTZ/RDVZRwkm9MGetSjAFw3rHQZeOVk6mh4ULD/KBg/amVTz3W9ZlUgoBv7NAdGXieLS3lKdtsdNgYR4VHJmxYJSUXfSqeLVNAsVTBSTi9q7FKCHjU7k= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747834757; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250521-topic-8150_pcie_drop_clocks-v1-4-3d42e84f6453@oss.qualcomm.com> References: <20250521-topic-8150_pcie_drop_clocks-v1-0-3d42e84f6453@oss.qualcomm.com> In-Reply-To: <20250521-topic-8150_pcie_drop_clocks-v1-0-3d42e84f6453@oss.qualcomm.com> To: Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Manivannan Sadhasivam , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bjorn Andersson , Konrad Dybcio Cc: Qiang Yu , Ziyue Zhang , Marijn Suijten , linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Konrad Dybcio X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1747834731; l=1857; i=konrad.dybcio@oss.qualcomm.com; s=20230215; h=from:subject:message-id; bh=1YJXdyRsJC8YT6jcvtA/RpIY0NdcNSr2pcVtcnwaH/0=; b=35UOKkkgXeK86ySsxCfVwM/dKCMJO3XovYRumUxLdAA8Ybf30dwneG0LSLzjQxyzzEekaBsB8 Vu2glshRo+LB5ANcTHBL3j93PC93UezWR0mjL+o5zaOEoabrenxtDMh X-Developer-Key: i=konrad.dybcio@oss.qualcomm.com; a=ed25519; pk=iclgkYvtl2w05SSXO5EjjSYlhFKsJ+5OSZBjOkQuEms= From: Konrad Dybcio The TBU clock belongs to the Translation Buffer Unit, part of the SMMU. The ref clock is already being driven upstream through some of the branches. Signed-off-by: Konrad Dybcio --- arch/arm64/boot/dts/qcom/sm8150.dtsi | 16 ++++------------ 1 file changed, 4 insertions(+), 12 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qco= m/sm8150.dtsi index cdb47359c4c88af5c73956ba0ba1710ca312a9af..da3d86a17a4f61dc0d1318efeaa= f43ac213835ab 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -1874,17 +1874,13 @@ pcie0: pcie@1c00000 { <&gcc GCC_PCIE_0_CFG_AHB_CLK>, <&gcc GCC_PCIE_0_MSTR_AXI_CLK>, <&gcc GCC_PCIE_0_SLV_AXI_CLK>, - <&gcc GCC_PCIE_0_SLV_Q2A_AXI_CLK>, - <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>, - <&rpmhcc RPMH_CXO_CLK>; + <&gcc GCC_PCIE_0_SLV_Q2A_AXI_CLK>; clock-names =3D "pipe", "aux", "cfg", "bus_master", "bus_slave", - "slave_q2a", - "tbu", - "ref"; + "slave_q2a"; =20 iommu-map =3D <0x0 &apps_smmu 0x1d80 0x1>, <0x100 &apps_smmu 0x1d81 0x1>; @@ -1991,17 +1987,13 @@ pcie1: pcie@1c08000 { <&gcc GCC_PCIE_1_CFG_AHB_CLK>, <&gcc GCC_PCIE_1_MSTR_AXI_CLK>, <&gcc GCC_PCIE_1_SLV_AXI_CLK>, - <&gcc GCC_PCIE_1_SLV_Q2A_AXI_CLK>, - <&gcc GCC_AGGRE_NOC_PCIE_TBU_CLK>, - <&rpmhcc RPMH_CXO_CLK>; + <&gcc GCC_PCIE_1_SLV_Q2A_AXI_CLK>; clock-names =3D "pipe", "aux", "cfg", "bus_master", "bus_slave", - "slave_q2a", - "tbu", - "ref"; + "slave_q2a"; =20 assigned-clocks =3D <&gcc GCC_PCIE_1_AUX_CLK>; assigned-clock-rates =3D <19200000>; --=20 2.49.0