From nobody Wed Dec 17 07:40:01 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A084722DF9E; Wed, 21 May 2025 03:19:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747797598; cv=none; b=gq+YMuDeSxT5a//qQ1X0U6p4CfOgqUExBcWJEUF3AxlRd5765PJmf+Jhxjly9yqocIid0MFO4egRW79+1jOEE1WRu1gsc86hCqwOFBiKX5LdWSBHXWzR8clJwHDlQS1QpzINepRH8uVHgyhhvWJkxIqfS9og1WxcNLCo19+rk4c= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747797598; c=relaxed/simple; bh=Hxa2EX+nSJ0LzGazJMi3CxQ9ZJHR9/MQI2pW4yU8x+c=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=eO8OFWvNmFJMXy6NQpFZq+St+2RxnXyVll9cXzMii669bkAlQpO2eMpZ/u/8aPbKl7PecH9oC4JSgjn1u5GQaIBY4BUwwJkJ/ChKUcrUaBPtTgA9OH3t1ZEPyH34bKmm5VRcakfLaizg9EShCMbQUDxzQ2XRaL3pxCm+0b+qRvg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=CAEbUwsG; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="CAEbUwsG" Received: by smtp.kernel.org (Postfix) with ESMTPS id 2A6D1C4AF0F; Wed, 21 May 2025 03:19:58 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1747797598; bh=Hxa2EX+nSJ0LzGazJMi3CxQ9ZJHR9/MQI2pW4yU8x+c=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=CAEbUwsGBufQfHmO6ggwX0hooCk461Fsi+g3S5FWozrbx6yH2GMwo2ZMANWmuWVyo zeUOrwA6j0YQUpsiVwbCBVJY2TgUcLLtdHb0/m8Nilq90JA/5FahHQxfymP1vokhf7 KHCfpAZFC5hg5b6L6eEwqBuCgylLKMmDcIIXe+GS0pGT4Sdsuys9cXY55DdDrkp60V LAUD1dLj6TGnm9Ckh0u+0VMiDES1Ft89vnbQ5tFMJf8v+VT1/6Qo78uw/KmC3jflA3 BERT30wL+v16SSrJ3usyvjxO6ouSIiFh/Ym2bN56Mvr1g1ab+hdltFhICxfpFUoaYq W87hfr+wi0BSQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 218FFC3ABC9; Wed, 21 May 2025 03:19:58 +0000 (UTC) From: Xianwei Zhao via B4 Relay Date: Wed, 21 May 2025 11:20:02 +0800 Subject: [PATCH v2 8/8] dts: arm64: amlogic: add S6 pinctrl node Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250521-s6-s7-pinctrl-v2-8-0ce5e3728404@amlogic.com> References: <20250521-s6-s7-pinctrl-v2-0-0ce5e3728404@amlogic.com> In-Reply-To: <20250521-s6-s7-pinctrl-v2-0-0ce5e3728404@amlogic.com> To: Linus Walleij , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Neil Armstrong , Kevin Hilman , Jerome Brunet , Martin Blumenstingl Cc: linux-amlogic@lists.infradead.org, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Xianwei Zhao X-Mailer: b4 0.12.4 X-Developer-Signature: v=1; a=ed25519-sha256; t=1747797595; l=3615; i=xianwei.zhao@amlogic.com; s=20231208; h=from:subject:message-id; bh=qrXyaWIhl6dY6RYbLmLL01WMo+S+QWiFeDMWvb8QD9A=; b=be2px7TJFHE12t97jPTpVsQBaIMxh//o3rr4yUfe+pD9PCQpkiDCcmv3ucVF+oPgziqUvDIMq bwcgD7WJak9AHWYjOvMozHXsy6dEaKGRLSlJq3VXaMIltnBeCIhAjNw X-Developer-Key: i=xianwei.zhao@amlogic.com; a=ed25519; pk=o4fDH8ZXL6xQg5h17eNzRljf6pwZHWWjqcOSsj3dW24= X-Endpoint-Received: by B4 Relay for xianwei.zhao@amlogic.com/20231208 with auth_id=107 X-Original-From: Xianwei Zhao Reply-To: xianwei.zhao@amlogic.com From: Xianwei Zhao Add pinctrl device to support Amlogic S6. Signed-off-by: Xianwei Zhao --- arch/arm64/boot/dts/amlogic/amlogic-s6.dtsi | 97 +++++++++++++++++++++++++= ++++ 1 file changed, 97 insertions(+) diff --git a/arch/arm64/boot/dts/amlogic/amlogic-s6.dtsi b/arch/arm64/boot/= dts/amlogic/amlogic-s6.dtsi index a8c90245c42a..5f602f1170c0 100644 --- a/arch/arm64/boot/dts/amlogic/amlogic-s6.dtsi +++ b/arch/arm64/boot/dts/amlogic/amlogic-s6.dtsi @@ -6,6 +6,7 @@ #include #include #include +#include / { cpus { #address-cells =3D <2>; @@ -92,6 +93,102 @@ uart_b: serial@7a000 { clock-names =3D "xtal", "pclk", "baud"; status =3D "disabled"; }; + + periphs_pinctrl: pinctrl@4000 { + compatible =3D "amlogic,pinctrl-s6"; + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges =3D <0x0 0x0 0x0 0x4000 0x0 0x340>; + + gpioz: gpio@c0 { + reg =3D <0 0xc0 0 0x20>, <0 0x18 0 0x8>; + reg-names =3D "gpio", "mux"; + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&periphs_pinctrl 0 (AMLOGIC_GPIO_Z<<8) 16>; + }; + + gpiox: gpio@100 { + reg =3D <0 0x100 0 0x30>, <0 0xc 0 0x8>; + reg-names =3D "gpio", "mux"; + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&periphs_pinctrl 0 (AMLOGIC_GPIO_X<<8) 20>; + }; + + gpioh: gpio@140 { + reg =3D <0 0x140 0 0x20>, <0 0x2c 0 0x8>; + reg-names =3D "gpio", "mux"; + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&periphs_pinctrl 0 (AMLOGIC_GPIO_H<<8) 9>; + }; + + gpiod: gpio@180 { + reg =3D <0 0x180 0 0x20>, <0 0x8 0 0x4>; + reg-names =3D "gpio", "mux"; + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&periphs_pinctrl 0 (AMLOGIC_GPIO_D<<8) 7>; + }; + + gpiof: gpio@1a0 { + reg =3D <0 0x1a0 0 0x20>, <0 0x20 0 0x4>; + reg-names =3D "gpio", "mux"; + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&periphs_pinctrl 0 (AMLOGIC_GPIO_F<<8) 5>; + }; + + gpioe: gpio@1c0 { + reg =3D <0 0x1c0 0 0x20>, <0 0x48 0 0x4>; + reg-names =3D "gpio", "mux"; + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&periphs_pinctrl 0 (AMLOGIC_GPIO_E<<8) 3>; + }; + + gpioc: gpio@200 { + reg =3D <0 0x200 0 0x20>, <0 0x24 0 0x4>; + reg-names =3D "gpio", "mux"; + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&periphs_pinctrl 0 (AMLOGIC_GPIO_C<<8) 8>; + }; + + gpiob: gpio@240 { + reg =3D <0 0x240 0 0x20>, <0 0x0 0 0x8>; + reg-names =3D "gpio", "mux"; + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&periphs_pinctrl 0 (AMLOGIC_GPIO_B<<8) 14>; + }; + + gpioa: gpio@280 { + reg =3D <0 0x280 0 0x20>, <0 0x40 0 0x8>; + reg-names =3D "gpio", "mux"; + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&periphs_pinctrl 0 (AMLOGIC_GPIO_A<<8) 16>; + }; + + test_n: gpio@2c0 { + reg =3D <0 0x2c0 0 0x20>; + reg-names =3D "gpio"; + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D + <&periphs_pinctrl 0 (AMLOGIC_GPIO_TEST_N<<8) 1>; + }; + + gpiocc: gpio@300 { + reg =3D <0 0x300 0 0x20>, <0 0x14 0 0x4>; + reg-names =3D "gpio", "mux"; + gpio-controller; + #gpio-cells =3D <2>; + gpio-ranges =3D <&periphs_pinctrl 0 (AMLOGIC_GPIO_CC<<8) 2>; + }; + }; }; }; }; --=20 2.37.1