From nobody Fri Dec 19 14:38:16 2025 Received: from TWMBX01.aspeed.com (mail.aspeedtech.com [211.20.114.72]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A12C92673BF; Tue, 20 May 2025 09:30:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=211.20.114.72 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747733406; cv=none; b=QZVUKpBn5SDiCuU9Ga/bwp47I/QutPtSl6ONBeSMWny8a6SNxinXPAlt8CtsDePXMEo2chUisfp1x0mIOZMBBHJyZhbDjO9IgAHjf52Xn4bk2Ji8X0zsuz/xq7w/ZhEnpX8GPT9JLf8PZNHdo2VQTeiRKp6SdAXwjr8v4eeKe6Y= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747733406; c=relaxed/simple; bh=/gvGCpmuSdHpbLX3v4mrK5iEI7Ww+Hw2nHqemQ6NQp8=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=ZfkpYDw4gOj0C3+HUZpUKQSLHPwMtI86gSMkPQ8A79eR82jadQdc468xEU4NRQf38VpS1hpVvDHFNS4+D0MS7p04JxFE/yBxaLOpKrDbxbkd1MOj/ANxp2opqjnlmkDNwc2wLS3x+idaD4TuzE5J1ccIgEZTtmy5uMn1NFozw5w= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com; spf=pass smtp.mailfrom=aspeedtech.com; arc=none smtp.client-ip=211.20.114.72 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=aspeedtech.com Received: from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Tue, 20 May 2025 17:28:49 +0800 Received: from mail.aspeedtech.com (192.168.10.13) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1748.10 via Frontend Transport; Tue, 20 May 2025 17:28:49 +0800 From: Jacky Chou To: , , , CC: , , , , , , , , , , , , , , , Subject: [net 4/4] net: ftgmac100: Add optional reset control for RMII mode on Aspeed SoCs Date: Tue, 20 May 2025 17:28:48 +0800 Message-ID: <20250520092848.531070-5-jacky_chou@aspeedtech.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250520092848.531070-1-jacky_chou@aspeedtech.com> References: <20250520092848.531070-1-jacky_chou@aspeedtech.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" On Aspeed SoCs, the internal MAC reset is insufficient to fully reset the RMII interface; only the SoC-level reset line can properly reset the RMII logic. This patch adds support for an optional "resets" property in the device tree, allowing the driver to assert and deassert the SoC reset line when operating in RMII mode. This ensures the MAC and RMII interface are correctly reset and initialized. Signed-off-by: Jacky Chou --- drivers/net/ethernet/faraday/ftgmac100.c | 26 ++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/drivers/net/ethernet/faraday/ftgmac100.c b/drivers/net/etherne= t/faraday/ftgmac100.c index 17ec35e75a65..01c4db6e5b91 100644 --- a/drivers/net/ethernet/faraday/ftgmac100.c +++ b/drivers/net/ethernet/faraday/ftgmac100.c @@ -9,6 +9,7 @@ #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt =20 #include +#include #include #include #include @@ -101,6 +102,8 @@ struct ftgmac100 { =20 /* AST2500/AST2600 RMII ref clock gate */ struct clk *rclk; + /* Aspeed reset control */ + struct reset_control *rst; =20 /* Link management */ int cur_speed; @@ -148,6 +151,23 @@ static int ftgmac100_reset_and_config_mac(struct ftgma= c100 *priv) { u32 maccr =3D 0; =20 + /* Aspeed RMII needs SCU reset to clear status */ + if (priv->is_aspeed && priv->netdev->phydev->interface =3D=3D PHY_INTERFA= CE_MODE_RMII) { + int err; + + err =3D reset_control_assert(priv->rst); + if (err) { + dev_err(priv->dev, "Failed to reset mac (%d)\n", err); + return err; + } + usleep_range(10000, 20000); + err =3D reset_control_deassert(priv->rst); + if (err) { + dev_err(priv->dev, "Failed to deassert mac reset (%d)\n", err); + return err; + } + } + switch (priv->cur_speed) { case SPEED_10: case 0: /* no link */ @@ -1968,6 +1988,12 @@ static int ftgmac100_probe(struct platform_device *p= dev) =20 } =20 + priv->rst =3D devm_reset_control_get_optional_exclusive(priv->dev, NULL); + if (IS_ERR(priv->rst)) { + err =3D PTR_ERR(priv->rst); + goto err_phy_connect; + } + if (priv->is_aspeed) { err =3D ftgmac100_setup_clk(priv); if (err) --=20 2.34.1