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Sun, 18 May 2025 19:32:44 +0000 (GMT) X-AuditID: b6c32a28-460ee70000001e8a-e7-682a35dcde5e Received: from epsmtip1.samsung.com ( [182.195.34.30]) by epsmgmc1p1new.samsung.com (Symantec Messaging Gateway) with SMTP id 8E.5A.07818.CD53A286; Mon, 19 May 2025 04:32:44 +0900 (KST) Received: from cheetah.samsungds.net (unknown [107.109.115.53]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20250518193241epsmtip151108dc988d8d842e0cc851cf61400db~Atf68npNX1247812478epsmtip1F; Sun, 18 May 2025 19:32:40 +0000 (GMT) From: Shradha Todi To: linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-samsung-soc@vger.kernel.or, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org Cc: manivannan.sadhasivam@linaro.org, lpieralisi@kernel.org, kw@linux.com, robh@kernel.org, bhelgaas@google.com, jingoohan1@gmail.com, krzk+dt@kernel.org, conor+dt@kernel.org, alim.akhtar@samsung.com, vkoul@kernel.org, kishon@kernel.org, arnd@arndb.de, m.szyprowski@samsung.com, jh80.chung@samsung.com, Shradha Todi , Pankaj Dubey Subject: [PATCH 05/10] PCI: exynos: Add structure to hold resource operations Date: Mon, 19 May 2025 01:01:47 +0530 Message-ID: <20250518193152.63476-6-shradha.t@samsung.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250518193152.63476-1-shradha.t@samsung.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Brightmail-Tracker: H4sIAAAAAAAAA02ReUiTYRjAe7/b0ehrWb1aaA2UtdJaF28WS6HiC7qMoJLE5vzYJF1jUzvW scyOTTNJw1xhJnatzJzTPIpqLktISyob04U1OyQ00tJqXW4S9N8Pfr/nef54GFx0iQhlUjUZ vE6jSBNTAqKuWRwW1b1Iqp43YiVRT2kdhX6daqFRRbYaXb/TjqHzznYSuX4cJdGVLyU0enDk D476LK8oZMzzkcjm7STRs8ZzFGorfUihAuswgdpGyjCU8zOHQJVOD408OSYSldd+odGf2/U0 OtG8HzV0P8Jjp3C+H6cA12Dx0FyZLZOzWU0U1915m+J6nxdjXE3FQS7fbgWc82sxwQ3ZwjYI EgTLUvi01CxeN1e+XaAuv+OjtS7Z7su2LtIIPkjMIIiB7EI48L2YMgMBI2KbAGwsqiLHRAgc 6riBjfEkePX3e3osGgTQ9eZjIKJYKTz01Yz7OZh9BGC+e4k/wlkLDkuG8wi/mMSuhbWfWwJM sBGww9M8OsAwQjYG5lbE+BGy4fDkcegvgtilsK7qdOCuaLS40NsA/CxkJ8LWkt7AFnw0P1x7 Fi8ArOU/ZflPlQHMCkJ4rT5dla6UaWUafle0XpGuz9SoopU7020g8EqppB4MDGfPdQCMAQ4A GVwcLLTWSNQiYYpiz15etzNJl5nG6x1gGkOIpwqvyraoRKxKkcHv4Hktr/tnMSYo1IjJ4kjP eWL27HuvBd5x7hcGKn89wM4lHNBlnKDXea9FxB2TS2ZJNkzo+iSfti/lbt/q5LiSwrYR9fTO oW+GkM17kxIPmRJDNj3pf5uqPPMudCSae7zcVSCvthc5l2ZXd7xMjFmstGti4sMMrTPBTxO5 cfCkd8KH7wvcubmOCGuEys3q7Wvqtimj4lsju+zTMaOZekoNSkB/7T3K+hG/2fvpVtac/KjN A+Wx40u1fRcrM1c0u8462yfv8qx0rHrp1Rw8XdmpayrEzL68hQmRLRdDL8yP3Wog+pMf3K/J SGs3VDWYyMLB/eLSaipLPss9oym8R2oIDzaJPD0+t7FITOjVCpkU1+kVfwFuNVp5OQMAAA== X-CMS-MailID: 20250518193244epcas5p3cacfbdc3b0e5c32f7a4dd97062a931a4 X-Msg-Generator: CA Content-Type: text/plain; charset="utf-8" X-Sendblock-Type: REQ_APPROVE CMS-TYPE: 105P cpgsPolicy: CPGSC10-541,Y X-CFilter-Loop: Reflected X-CMS-RootMailID: 20250518193244epcas5p3cacfbdc3b0e5c32f7a4dd97062a931a4 References: <20250518193152.63476-1-shradha.t@samsung.com> Some resources might differ based on platforms and we need platform specific functions to initialize or alter them. For better code re-usability, making a separate res_ops which will hold all such function pointers or other resource specific data. Also move common operations for host init into the probe sequence. Suggested-by: Pankaj Dubey Signed-off-by: Shradha Todi --- drivers/pci/controller/dwc/pci-exynos.c | 105 ++++++++++++++++++------ 1 file changed, 80 insertions(+), 25 deletions(-) diff --git a/drivers/pci/controller/dwc/pci-exynos.c b/drivers/pci/controll= er/dwc/pci-exynos.c index 540612e76f4b..b122a2ae8681 100644 --- a/drivers/pci/controller/dwc/pci-exynos.c +++ b/drivers/pci/controller/dwc/pci-exynos.c @@ -53,6 +53,7 @@ struct samsung_pcie_pdata { struct pci_ops *pci_ops; const struct dw_pcie_ops *dwc_ops; const struct dw_pcie_host_ops *host_ops; + const struct samsung_res_ops *res_ops; }; =20 struct exynos_pcie { @@ -61,7 +62,13 @@ struct exynos_pcie { const struct samsung_pcie_pdata *pdata; struct clk_bulk_data *clks; struct phy *phy; - struct regulator_bulk_data supplies[2]; + struct regulator_bulk_data *supplies; + int supplies_cnt; +}; + +struct samsung_res_ops { + int (*init_regulator)(struct exynos_pcie *ep); + irqreturn_t (*pcie_irq_handler)(int irq, void *arg); }; =20 static void exynos_pcie_writel(void __iomem *base, u32 val, u32 reg) @@ -74,6 +81,36 @@ static u32 exynos_pcie_readl(void __iomem *base, u32 reg) return readl(base + reg); } =20 +static int samsung_regulator_enable(struct exynos_pcie *ep) +{ + struct device *dev =3D ep->pci.dev; + int ret; + + if (ep->supplies_cnt =3D=3D 0) + return 0; + + ret =3D devm_regulator_bulk_get(dev, ep->supplies_cnt, ep->supplies); + if (ret) + return ret; + + ret =3D regulator_bulk_enable(ep->supplies_cnt, ep->supplies); + + return ret; +} + +static void samsung_regulator_disable(struct exynos_pcie *ep) +{ + struct device *dev =3D ep->pci.dev; + int ret; + + if (ep->supplies_cnt =3D=3D 0) + return; + + ret =3D regulator_bulk_disable(ep->supplies_cnt, ep->supplies); + if (ret) + dev_warn(dev, "failed to disable regulators: %d\n", ret); +} + static void exynos_pcie_sideband_dbi_w_mode(struct exynos_pcie *ep, bool o= n) { u32 val; @@ -244,7 +281,23 @@ static const struct dw_pcie_host_ops exynos_pcie_host_= ops =3D { .init =3D exynos_pcie_host_init, }; =20 -static int exynos_add_pcie_port(struct exynos_pcie *ep, +static int exynos_init_regulator(struct exynos_pcie *ep) +{ + struct device *dev =3D ep->pci.dev; + + ep->supplies_cnt =3D 2; + + ep->supplies =3D devm_kcalloc(dev, ep->supplies_cnt, sizeof(*ep->supplies= ), GFP_KERNEL); + if (!ep->supplies) + return -ENOMEM; + + ep->supplies[0].supply =3D "vdd18"; + ep->supplies[1].supply =3D "vdd10"; + + return 0; +} + +static int samsung_irq_init(struct exynos_pcie *ep, struct platform_device *pdev) { struct dw_pcie *pci =3D &ep->pci; @@ -256,22 +309,15 @@ static int exynos_add_pcie_port(struct exynos_pcie *e= p, if (pp->irq < 0) return pp->irq; =20 - ret =3D devm_request_irq(dev, pp->irq, exynos_pcie_irq_handler, + ret =3D devm_request_irq(dev, pp->irq, ep->pdata->res_ops->pcie_irq_handl= er, IRQF_SHARED, "exynos-pcie", ep); if (ret) { dev_err(dev, "failed to request irq\n"); return ret; } =20 - pp->ops =3D &exynos_pcie_host_ops; pp->msi_irq[0] =3D -ENODEV; =20 - ret =3D dw_pcie_host_init(pp); - if (ret) { - dev_err(dev, "failed to initialize host\n"); - return ret; - } - return 0; } =20 @@ -282,6 +328,11 @@ static const struct dw_pcie_ops exynos_dw_pcie_ops =3D= { .start_link =3D exynos_pcie_start_link, }; =20 +static const struct samsung_res_ops exynos_res_ops_data =3D { + .init_regulator =3D exynos_init_regulator, + .pcie_irq_handler =3D exynos_pcie_irq_handler, +}; + static int exynos_pcie_probe(struct platform_device *pdev) { struct device *dev =3D &pdev->dev; @@ -313,28 +364,31 @@ static int exynos_pcie_probe(struct platform_device *= pdev) if (ret < 0) return ret; =20 - ep->supplies[0].supply =3D "vdd18"; - ep->supplies[1].supply =3D "vdd10"; - ret =3D devm_regulator_bulk_get(dev, ARRAY_SIZE(ep->supplies), - ep->supplies); - if (ret) - return ret; + if (pdata->res_ops && pdata->res_ops->init_regulator) { + ret =3D ep->pdata->res_ops->init_regulator(ep); + if (ret) + return ret; + } =20 - ret =3D regulator_bulk_enable(ARRAY_SIZE(ep->supplies), ep->supplies); + ret =3D samsung_regulator_enable(ep); if (ret) return ret; =20 platform_set_drvdata(pdev, ep); - - ret =3D exynos_add_pcie_port(ep, pdev); + ret =3D samsung_irq_init(ep, pdev); + if (ret) + goto fail_regulator; + ep->pci.pp.ops =3D pdata->host_ops; + ret =3D dw_pcie_host_init(&ep->pci.pp); if (ret < 0) - goto fail_probe; + goto fail_phy_init; =20 return 0; =20 -fail_probe: +fail_phy_init: phy_exit(ep->phy); - regulator_bulk_disable(ARRAY_SIZE(ep->supplies), ep->supplies); +fail_regulator: + samsung_regulator_disable(ep); =20 return ret; } @@ -347,7 +401,7 @@ static void exynos_pcie_remove(struct platform_device *= pdev) exynos_pcie_assert_core_reset(ep); phy_power_off(ep->phy); phy_exit(ep->phy); - regulator_bulk_disable(ARRAY_SIZE(ep->supplies), ep->supplies); + samsung_regulator_disable(ep); } =20 static int exynos_pcie_suspend_noirq(struct device *dev) @@ -357,7 +411,7 @@ static int exynos_pcie_suspend_noirq(struct device *dev) exynos_pcie_assert_core_reset(ep); phy_power_off(ep->phy); phy_exit(ep->phy); - regulator_bulk_disable(ARRAY_SIZE(ep->supplies), ep->supplies); + samsung_regulator_disable(ep); =20 return 0; } @@ -369,7 +423,7 @@ static int exynos_pcie_resume_noirq(struct device *dev) struct dw_pcie_rp *pp =3D &pci->pp; int ret; =20 - ret =3D regulator_bulk_enable(ARRAY_SIZE(ep->supplies), ep->supplies); + ret =3D samsung_regulator_enable(ep); if (ret) return ret; =20 @@ -389,6 +443,7 @@ static const struct samsung_pcie_pdata exynos_5433_pcie= _rc_pdata =3D { .dwc_ops =3D &exynos_dw_pcie_ops, .pci_ops =3D &exynos_pci_ops, .host_ops =3D &exynos_pcie_host_ops, + .res_ops =3D &exynos_res_ops_data, }; =20 static const struct of_device_id exynos_pcie_of_match[] =3D { --=20 2.49.0