From nobody Fri Dec 19 20:34:54 2025 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DD75A218589 for ; Sun, 18 May 2025 10:55:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747565730; cv=none; b=UTOZiYxE/nUgg27zasXj4nHFNw3MzRayQK5GBOwhB/n+J8iWNDdLoFGSpUTlEPP/4qAQ7DthLWy23YD6w9rJZAS8Qm9ROoIVid6U363vBKvz9HrMsA5o8jSV0EiGnHLXDCuMwshVoRVPGtn7TXFuiKiLlrSHx5aMtqjrhH3Dyys= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747565730; c=relaxed/simple; bh=zJfl99w8gPUfrdwYMYw+1yKgLUvglxsypWiv2LeoqZ8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Kj3V69qxbNNiLGhGJyL0QxYX17VrHrl9mvthmjXxV2UpdTRs4k7z+vIpCcQRenJSLqCzsCurAuwbzuo9AGq3gCReY5HLYNmWASGazcUZmqR1F/Q2EUy3xZ0Fg/XErHrcEJLX9DQoL/u18FfS5//tSJywS827mcbNjD4B0xqIxFI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=FaTtxHJP; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="FaTtxHJP" Received: from pps.filterd (m0279867.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 54I5biT5028721 for ; Sun, 18 May 2025 10:55:28 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= sEr7zBFz0n6zl511rF6sE9zKKxRwyqeRpnXZOdeaNiQ=; b=FaTtxHJP4Kv5xuW6 e5v1mYTHGgulz2HXvx/QaTEPV6rZSRmVt1IYtRbARP2OBTyUknmzDmX/w+zQMoDc uxndCi58u6XOUaGfjq1iryLi3GGsjUGFd0JHJlAQBb3Z9z11eyoQn0CleKQQi/Ey 9vI1umgCpwKun3uacsdiHkclZBQw9CNtKRWcO5i5x/NCPnt8y1oo7sYr4JYUyzjN m7oVU33fzw8QGd+AsDTvH+/majIWE6mXAGwTJ8yj6sNzkNrFOa4vZqrZOiFgsHr3 y7Xeu1cwwNhXrX3NH8vU3SgJOUG7NBQK5u0fElNFQSHc8nArXIuXbnfQ0zIfJuIO i3TF3w== Received: from mail-qv1-f69.google.com (mail-qv1-f69.google.com [209.85.219.69]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 46pjm4svdq-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=NOT) for ; Sun, 18 May 2025 10:55:27 +0000 (GMT) Received: by mail-qv1-f69.google.com with SMTP id 6a1803df08f44-6f0e2d30ab4so64712616d6.1 for ; Sun, 18 May 2025 03:55:27 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1747565726; x=1748170526; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=sEr7zBFz0n6zl511rF6sE9zKKxRwyqeRpnXZOdeaNiQ=; b=gd7XIXqWFEvGmglRnuMhfmiCSihNVApopHUCWmpBOF4NponTUt/DXFspQo5CD7BcSx EAKCtAU59/pCE16yF5gkmV5ckcxra5zBy2jCVRt8NZOL7MN0gXJnfzNOcXPoRtyrLuQT nVZr8g9ISiT6+018y7Z6WNo2euIxQ7dCX3SUec5FZ27BoYAs+LskIMB29zZNIgwQyW2E FvgxcrubRmAhSGMVJoyqb55RJ/5bd7tio33QmuW2iiXIZRVRnmwY8kiNchy06LW2oTXN 9X/+ZYNx+dSGINy1Y/cBcw476I19YcItOtf8jynVh9PJS0O9A12bXxwUymbf8Tl4Gb6p cPAg== X-Forwarded-Encrypted: i=1; AJvYcCXrW6GYqu7fbaNO0qE9nMTREIyIN14pBKrxckCRkF7+aqgpiku+0b5n1BTftlqMJJTWuossblJSd+ojnKY=@vger.kernel.org X-Gm-Message-State: AOJu0YwxCbCt1TPe0nZC1b6zJMbrO7ekWbORA70aOEzCDHViuaR/b2Rp saEIyhQvrZ387geuRxh03tXH7j0Iq9uPTNGwB/VzC3FEg/F5V3jVn/FHnopEDA+D0NV9FEZM8ch N5g7HX23LFxFykyZMVIOmhCWuYLPOOiPbrhGnnYjsg97LYI/pwUT3i1+tnUGq4eiydXg= X-Gm-Gg: ASbGnculvqjhJteTynfjWQgQsnoK4FWmLv3ri4pCMHzNkeSIaVVg1gkNzXHDSthqc4+ MGGBCFi3czPLURl3mj42/9NzyqPAxG/MTCvyRh3jLKs5yRMmhBQqQ4WYyPN6L2kNJjS28e7GU9+ sArOgk60clVzT3zXiN4/STvzkEuUO7urHEKCMc5e1VMJH2IUpeeT1YeRXM1nMM9Rjq5pzPD/KR0 8Jg75bTQNkOVoFgWenCGN2i355waBqfMovCp3tIG8UNL7vtJeDx7V1cbY4Bhs4tJ8cwZ57H/Beo hu04ThBFQNZHII5tht7okCVZ6BbAShoENHdkbD/2hNYzNx7kk8zfpKKSkEP0A6Dr2GvoPBAZnJb NPD6VNMFk1XbdgavJXQLRgmba X-Received: by 2002:ad4:5f0d:0:b0:6e6:6699:7e58 with SMTP id 6a1803df08f44-6f8b080f7f2mr142533266d6.1.1747565726469; Sun, 18 May 2025 03:55:26 -0700 (PDT) X-Google-Smtp-Source: AGHT+IE8jDRSLyHu8Beh4Rs+WkdKbU/y1DKOHysgVhdac3LhO3zY/2F3wcKcQzkFruFC6WQ6HiTdsA== X-Received: by 2002:ad4:5f0d:0:b0:6e6:6699:7e58 with SMTP id 6a1803df08f44-6f8b080f7f2mr142532976d6.1.1747565726041; Sun, 18 May 2025 03:55:26 -0700 (PDT) Received: from umbar.lan (2001-14ba-a0c3-3a00-264b-feff-fe8b-be8a.rev.dnainternet.fi. [2001:14ba:a0c3:3a00:264b:feff:fe8b:be8a]) by smtp.gmail.com with ESMTPSA id 38308e7fff4ca-328085cf8ccsm14314451fa.99.2025.05.18.03.55.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 18 May 2025 03:55:24 -0700 (PDT) From: Dmitry Baryshkov Date: Sun, 18 May 2025 13:55:19 +0300 Subject: [PATCH v3 01/11] drm/msm: move wq handling to KMS code Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250518-msm-gpu-split-v3-1-0e91e8e77023@oss.qualcomm.com> References: <20250518-msm-gpu-split-v3-0-0e91e8e77023@oss.qualcomm.com> In-Reply-To: <20250518-msm-gpu-split-v3-0-0e91e8e77023@oss.qualcomm.com> To: Rob Clark , Abhinav Kumar , Dmitry Baryshkov , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=7139; i=dmitry.baryshkov@oss.qualcomm.com; h=from:subject:message-id; bh=zJfl99w8gPUfrdwYMYw+1yKgLUvglxsypWiv2LeoqZ8=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBoKbyZa2rYnl2nhExspdmC9BS7VsDmJ1JWaTAsK ccOyKBqJn6JATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCaCm8mQAKCRCLPIo+Aiko 1avvB/oCplnUwEGLIc7F3z3QnZAbryimLiMtzlRC4ZxS0Ms5oEiYu7uLSsk194PIV5ddITjOOFR lfRHFmSgBKUWut+hnhvSw9WcewVxsIaKAeKbuNX7HtAUN6P1eavS0Tolzgfh3eXdhE/zCNi5AIY 8+K9cHSraqUODdc8/Emv03KlU7ASh+CVF4fN9X29LgWN3M6Xp2YZcw3MEwnCb34KOigtjvxVPw4 SJqHFuzKkzUKNVy89vfYZu4xgAQBWzL1Ci3edBsySaY8l4IkaSNOFvBoKrZAr4WBQqujvLEKW+2 krOa8+AfyInJpwoQc59C+/xbVjakh7yuqvl5wDgP/tNWR++k X-Developer-Key: i=dmitry.baryshkov@oss.qualcomm.com; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A X-Authority-Analysis: v=2.4 cv=dIimmPZb c=1 sm=1 tr=0 ts=6829bc9f cx=c_pps a=wEM5vcRIz55oU/E2lInRtA==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=dt9VzEwgFbYA:10 a=EUspDBNiAAAA:8 a=lygNIV2IR02mpmLRnqcA:9 a=QEXdDO2ut3YA:10 a=OIgjcC2v60KrkQgK7BGD:22 X-Proofpoint-ORIG-GUID: MVaxCbiuMwgoEtPKn057LmnuPxmWp7Qp X-Proofpoint-GUID: MVaxCbiuMwgoEtPKn057LmnuPxmWp7Qp X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNTE4MDEwNCBTYWx0ZWRfXw/Q1naxFiwuz qhb7gQ4XM40A7Q6qx6i7j6m1nhlkVHY5gdOJFEL9NNAO62Sa9MB/jzkhIGUZ3G4pnLiYokTuczJ gkpYRFtlF+iFFlrtTRGTPl4NLEoZCD9lV/osw/D2AjtXprMsWIx6raYTMuc7JkrDbehLtHaX0D2 njcK/yeVNLTmUV7TXaavIWW6mA1wUJwNVo4R4VFW0plX+eV0sPh1IBdqBpm4xrV3sxqul7OP5PY SJNGj4e83irS1zuetSxhKhFDKw7/dPzjMSGy1NQwxaGze7reIHq460OB1/yb9mmvmkirpxARpmW egTC0FTJM4R/zOdEVkUFnkRFPwXAR+i+iluxAbbxgVhmv47DFTn77c9mrX2k2kMVNPYYBZ6d9h5 iJwDVlUe/ksVHkrl6qg4set51CG+Fd+wIW+beC0ln3OUd4+lcMoFNP7et+Jg8U/FZCxjN7yh X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.0.736,FMLib:17.12.80.40 definitions=2025-05-18_05,2025-05-16_03,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 mlxscore=0 bulkscore=0 malwarescore=0 suspectscore=0 impostorscore=0 clxscore=1015 phishscore=0 adultscore=0 priorityscore=1501 mlxlogscore=999 spamscore=0 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2505070000 definitions=main-2505180104 The global workqueue is only used for vblanks inside KMS code. Move allocation / flushing / deallcation of it to msm_kms.c Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 2 +- drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c | 2 +- drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c | 2 +- drivers/gpu/drm/msm/msm_drv.c | 21 ++------------------- drivers/gpu/drm/msm/msm_drv.h | 2 -- drivers/gpu/drm/msm/msm_kms.c | 11 +++++++++-- drivers/gpu/drm/msm/msm_kms.h | 8 ++++++++ 7 files changed, 22 insertions(+), 26 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/= msm/disp/dpu1/dpu_encoder.c index f9c46180b8f7ace9122e74015244334c1f13ef2b..1aaed1cd9ec58fed3230acda4c2= 83f0eedf3a9f0 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c @@ -980,7 +980,7 @@ static int dpu_encoder_resource_control(struct drm_enco= der *drm_enc, return 0; } =20 - queue_delayed_work(priv->wq, &dpu_enc->delayed_off_work, + queue_delayed_work(priv->kms->wq, &dpu_enc->delayed_off_work, msecs_to_jiffies(dpu_enc->idle_timeout)); =20 trace_dpu_enc_rc(DRMID(drm_enc), sw_event, diff --git a/drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c b/drivers/gpu/drm/ms= m/disp/mdp4/mdp4_crtc.c index b8610aa806eaeb540e76a6a17283faea6f482a99..5e1e62256c382426f70d21a5312= fb40dda68d695 100644 --- a/drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c +++ b/drivers/gpu/drm/msm/disp/mdp4/mdp4_crtc.c @@ -511,7 +511,7 @@ static void mdp4_crtc_vblank_irq(struct mdp_irq *irq, u= int32_t irqstatus) =20 if (pending & PENDING_CURSOR) { update_cursor(crtc); - drm_flip_work_commit(&mdp4_crtc->unref_cursor_work, priv->wq); + drm_flip_work_commit(&mdp4_crtc->unref_cursor_work, priv->kms->wq); } } =20 diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c b/drivers/gpu/drm/ms= m/disp/mdp5/mdp5_crtc.c index 0f653e62b4a008e3bafe09ee7fb4399e1fccb722..fce2365753e22850e56521e82b9= d9dca29c09280 100644 --- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c +++ b/drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c @@ -1196,7 +1196,7 @@ static void mdp5_crtc_vblank_irq(struct mdp_irq *irq,= uint32_t irqstatus) } =20 if (pending & PENDING_CURSOR) - drm_flip_work_commit(&mdp5_crtc->unref_cursor_work, priv->wq); + drm_flip_work_commit(&mdp5_crtc->unref_cursor_work, priv->kms->wq); } =20 static void mdp5_crtc_err_irq(struct mdp_irq *irq, uint32_t irqstatus) diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c index f316e6776f672e7a97268f716040d0cf73256c4b..78cea9d4999488648b4131a2da4= 25fb349d1b664 100644 --- a/drivers/gpu/drm/msm/msm_drv.c +++ b/drivers/gpu/drm/msm/msm_drv.c @@ -82,13 +82,6 @@ static int msm_drm_uninit(struct device *dev) drm_atomic_helper_shutdown(ddev); } =20 - /* We must cancel and cleanup any pending vblank enable/disable - * work before msm_irq_uninstall() to avoid work re-enabling an - * irq after uninstall has disabled it. - */ - - flush_workqueue(priv->wq); - msm_gem_shrinker_cleanup(ddev); =20 msm_perf_debugfs_cleanup(priv); @@ -104,8 +97,6 @@ static int msm_drm_uninit(struct device *dev) ddev->dev_private =3D NULL; drm_dev_put(ddev); =20 - destroy_workqueue(priv->wq); - return 0; } =20 @@ -227,12 +218,6 @@ static int msm_drm_init(struct device *dev, const stru= ct drm_driver *drv) ddev->dev_private =3D priv; priv->dev =3D ddev; =20 - priv->wq =3D alloc_ordered_workqueue("msm", 0); - if (!priv->wq) { - ret =3D -ENOMEM; - goto err_put_dev; - } - INIT_LIST_HEAD(&priv->objects); mutex_init(&priv->obj_lock); =20 @@ -253,12 +238,12 @@ static int msm_drm_init(struct device *dev, const str= uct drm_driver *drv) if (priv->kms_init) { ret =3D drmm_mode_config_init(ddev); if (ret) - goto err_destroy_wq; + goto err_put_dev; } =20 ret =3D msm_init_vram(ddev); if (ret) - goto err_destroy_wq; + goto err_put_dev; =20 dma_set_max_seg_size(dev, UINT_MAX); =20 @@ -304,8 +289,6 @@ static int msm_drm_init(struct device *dev, const struc= t drm_driver *drv) =20 err_deinit_vram: msm_deinit_vram(ddev); -err_destroy_wq: - destroy_workqueue(priv->wq); err_put_dev: drm_dev_put(ddev); =20 diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h index a65077855201746c37ee742364b61116565f3794..cc603bd4729e909e9381a3c277d= b262b13361de6 100644 --- a/drivers/gpu/drm/msm/msm_drv.h +++ b/drivers/gpu/drm/msm/msm_drv.h @@ -177,8 +177,6 @@ struct msm_drm_private { struct mutex lock; } lru; =20 - struct workqueue_struct *wq; - unsigned int num_crtcs; =20 struct msm_drm_thread event_thread[MAX_CRTCS]; diff --git a/drivers/gpu/drm/msm/msm_kms.c b/drivers/gpu/drm/msm/msm_kms.c index 35d5397e73b4c5cb90b1770e8570277e782be7ec..184a4503fef0deff7234a3ce332= e0bf564fbce46 100644 --- a/drivers/gpu/drm/msm/msm_kms.c +++ b/drivers/gpu/drm/msm/msm_kms.c @@ -137,7 +137,7 @@ static int vblank_ctrl_queue_work(struct msm_drm_privat= e *priv, vbl_work->enable =3D enable; vbl_work->priv =3D priv; =20 - queue_work(priv->wq, &vbl_work->work); + queue_work(priv->kms->wq, &vbl_work->work); =20 return 0; } @@ -227,6 +227,13 @@ void msm_drm_kms_uninit(struct device *dev) =20 BUG_ON(!kms); =20 + /* We must cancel and cleanup any pending vblank enable/disable + * work before msm_irq_uninstall() to avoid work re-enabling an + * irq after uninstall has disabled it. + */ + + flush_workqueue(kms->wq); + /* clean up event worker threads */ for (i =3D 0; i < priv->num_crtcs; i++) { if (priv->event_thread[i].worker) @@ -261,7 +268,7 @@ int msm_drm_kms_init(struct device *dev, const struct d= rm_driver *drv) ret =3D priv->kms_init(ddev); if (ret) { DRM_DEV_ERROR(dev, "failed to load kms\n"); - return ret; + goto err_msm_uninit; } =20 /* Enable normalization of plane zpos */ diff --git a/drivers/gpu/drm/msm/msm_kms.h b/drivers/gpu/drm/msm/msm_kms.h index 43b58d052ee6aae0ce34d09c88e1e1c34f9c52ef..e52649bbee7dc6a80abfecf7f8d= 5bcfad3d8f60b 100644 --- a/drivers/gpu/drm/msm/msm_kms.h +++ b/drivers/gpu/drm/msm/msm_kms.h @@ -153,6 +153,8 @@ struct msm_kms { struct mutex commit_lock[MAX_CRTCS]; unsigned pending_crtc_mask; struct msm_pending_timer pending_timers[MAX_CRTCS]; + + struct workqueue_struct *wq; }; =20 static inline int msm_kms_init(struct msm_kms *kms, @@ -165,6 +167,10 @@ static inline int msm_kms_init(struct msm_kms *kms, =20 kms->funcs =3D funcs; =20 + kms->wq =3D alloc_ordered_workqueue("msm", 0); + if (!kms->wq) + return -ENOMEM; + for (i =3D 0; i < ARRAY_SIZE(kms->pending_timers); i++) { ret =3D msm_atomic_init_pending_timer(&kms->pending_timers[i], kms, i); if (ret) { @@ -181,6 +187,8 @@ static inline void msm_kms_destroy(struct msm_kms *kms) =20 for (i =3D 0; i < ARRAY_SIZE(kms->pending_timers); i++) msm_atomic_destroy_pending_timer(&kms->pending_timers[i]); + + destroy_workqueue(kms->wq); } =20 #define for_each_crtc_mask(dev, crtc, crtc_mask) \ --=20 2.39.5