From nobody Fri Dec 19 20:15:10 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9B3B727F73A; Fri, 16 May 2025 18:29:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.17 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747420167; cv=none; b=lUY1YlSTMPlZCH/Iz4mCvv/hJKRHRg9I257y4YovnKkgMU72YyBYje2sP4zViiWPwgU/oGCT4BU8eBb6ViAxtJ8M4dZ3ttxDCZGGX/xMZYJ0ZlzWkxYjFwPYaIDgjR3isFliob0kVEkj8rz2et49Oq0VlBwnqhnG52dXk6KKaQ8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747420167; c=relaxed/simple; bh=s+EyXjLUXo0M2dfj157AL5fvrY36sWvSBJ2tuImTWtk=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=WeZELLkWy2JtNFPoZF2F6v9gcAcC6Ial7B2UNghjDjGuJcBUmvhPZsoLiV2B/RplLQfccQAWO8+RTz1p8mLAkYHhhPptKbr7GcWoQdoPks+iVcoBxWx3W2T7KIPTN6qprI4F2yn3CikH0YqUa7LRirmxOP5nOl7mAEI1ZY8TJ+o= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=n/3FQJvy; arc=none smtp.client-ip=192.198.163.17 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="n/3FQJvy" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1747420165; x=1778956165; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=s+EyXjLUXo0M2dfj157AL5fvrY36sWvSBJ2tuImTWtk=; b=n/3FQJvyXnu8zaiuhSLIuksR+gMgqxXx7Jf9XIQWVB1je+r3+QQgpCL6 rzqZEcduVP8bzbuhgm61fs+7jyLqG/qV4vfBPGU5e7aZDxxmUPs4sWfsV Wosyct8gBZYUutrS4tWyoJVMIH/zeSFMHbFeCBL/odG7Kw6oUkhmiCGsn Qb+CEly4mUIPhqUlIHrrcwIEEe0ldjxtCGE5mkMxT4KqfSrWH4yE+8Agp Hmq9/9gGiadgsCw42nxrInP6qCeEuuWx7YHoXJn7adgNvD1iBLe2E2Pid LS+47Vw7HX2czC4VQDuawJnKIGlMlcDpz3FU68Qt3RWxdbsoU0mPi3nE0 g==; X-CSE-ConnectionGUID: 7QQPApb2SEyTa8y/GpK4OQ== X-CSE-MsgGUID: JGQKBhMsQBuBUdixCbvmZw== X-IronPort-AV: E=McAfee;i="6700,10204,11435"; a="49328833" X-IronPort-AV: E=Sophos;i="6.15,294,1739865600"; d="scan'208";a="49328833" Received: from fmviesa001.fm.intel.com ([10.60.135.141]) by fmvoesa111.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 May 2025 11:29:22 -0700 X-CSE-ConnectionGUID: JhatOYD3R/aJuVTali1oXA== X-CSE-MsgGUID: PJZxwUZ2Qo+BlYBDLBCcQg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.15,294,1739865600"; d="scan'208";a="169802609" Received: from kanliang-dev.jf.intel.com ([10.165.154.102]) by fmviesa001.fm.intel.com with ESMTP; 16 May 2025 11:29:21 -0700 From: kan.liang@linux.intel.com To: peterz@infradead.org, mingo@redhat.com, namhyung@kernel.org, irogers@google.com, mark.rutland@arm.com, linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org Cc: eranian@google.com, ctshao@google.com, tmricht@linux.ibm.com, leo.yan@arm.com, Kan Liang , Athira Rajeev , Madhavan Srinivasan , linuxppc-dev@lists.ozlabs.org Subject: [PATCH V3 06/16] powerpc/perf: Remove driver-specific throttle support Date: Fri, 16 May 2025 11:28:43 -0700 Message-Id: <20250516182853.2610284-7-kan.liang@linux.intel.com> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20250516182853.2610284-1-kan.liang@linux.intel.com> References: <20250516182853.2610284-1-kan.liang@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Kan Liang The throttle support has been added in the generic code. Remove the driver-specific throttle support. Besides the throttle, perf_event_overflow may return true because of event_limit. It already does an inatomic event disable. The pmu->stop is not required either. Signed-off-by: Kan Liang Cc: Athira Rajeev Cc: Madhavan Srinivasan Cc: linuxppc-dev@lists.ozlabs.org --- arch/powerpc/perf/core-book3s.c | 6 ++---- arch/powerpc/perf/core-fsl-emb.c | 3 +-- 2 files changed, 3 insertions(+), 6 deletions(-) diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3= s.c index 42ff4d167acc..8b0081441f85 100644 --- a/arch/powerpc/perf/core-book3s.c +++ b/arch/powerpc/perf/core-book3s.c @@ -2344,12 +2344,10 @@ static void record_and_restart(struct perf_event *e= vent, unsigned long val, ppmu->get_mem_weight(&data.weight.full, event->attr.sample_type); data.sample_flags |=3D PERF_SAMPLE_WEIGHT_TYPE; } - if (perf_event_overflow(event, &data, regs)) - power_pmu_stop(event, 0); + perf_event_overflow(event, &data, regs); } else if (period) { /* Account for interrupt in case of invalid SIAR */ - if (perf_event_account_interrupt(event)) - power_pmu_stop(event, 0); + perf_event_account_interrupt(event); } } =20 diff --git a/arch/powerpc/perf/core-fsl-emb.c b/arch/powerpc/perf/core-fsl-= emb.c index d2ffcc7021c5..7120ab20cbfe 100644 --- a/arch/powerpc/perf/core-fsl-emb.c +++ b/arch/powerpc/perf/core-fsl-emb.c @@ -635,8 +635,7 @@ static void record_and_restart(struct perf_event *event= , unsigned long val, =20 perf_sample_data_init(&data, 0, last_period); =20 - if (perf_event_overflow(event, &data, regs)) - fsl_emb_pmu_stop(event, 0); + perf_event_overflow(event, &data, regs); } } =20 --=20 2.38.1