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[83.11.178.15]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-ad2192c8535sm1110143966b.8.2025.05.15.07.16.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 15 May 2025 07:16:44 -0700 (PDT) From: Artur Weber Date: Thu, 15 May 2025 16:16:34 +0200 Subject: [PATCH v9 7/8] regulator: bcm590xx: Rename BCM59056-specific data as such Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250515-bcm59054-v9-7-14ba0ea2ea5b@gmail.com> References: <20250515-bcm59054-v9-0-14ba0ea2ea5b@gmail.com> In-Reply-To: <20250515-bcm59054-v9-0-14ba0ea2ea5b@gmail.com> To: Lee Jones , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Liam Girdwood , Mark Brown , Florian Fainelli , Ray Jui , Scott Branden , Broadcom internal kernel review list Cc: Stanislav Jakubek , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, ~postmarketos/upstreaming@lists.sr.ht, Artur Weber X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1747318592; l=21217; i=aweber.kernel@gmail.com; s=20231030; h=from:subject:message-id; bh=GCauXOznjVmiyxV0TOPUzg1387Fw5xLoQI7nGpubkUA=; b=YLIj9tP4W0orfBjXqKh1182HUDV2NyafkVwAGRI0q+FLn7EasDUa7w6ycaOg3mzpUxsXkgPfD wwQZ1b8SubGA7CrsZf+yy07vaFWAIiPmxHybN88YeMuzqY6DM4Xtjha X-Developer-Key: i=aweber.kernel@gmail.com; a=ed25519; pk=RhDBfWbJEHqDibXbhNEBAnc9FMkyznGxX/hwfhL8bv8= Previously, the driver used the BCM590XX prefix for register data specific to the BCM59056. As we will be introducing other regulators to this driver as well, make the BCM59056-specific values use the BCM59056 prefix. Reviewed-by: Stanislav Jakubek Signed-off-by: Artur Weber Reviewed-by: Mark Brown --- Changes in v5: - Adapt to rename of bcm590xx_reg_info to bcm590xx_reg_data Changes in v4: - Drop unused BCM590XX_MAX_NUM_REGS constant Changes in v3: - Added this commit --- drivers/regulator/bcm590xx-regulator.c | 369 +++++++++++++++++------------= ---- 1 file changed, 189 insertions(+), 180 deletions(-) diff --git a/drivers/regulator/bcm590xx-regulator.c b/drivers/regulator/bcm= 590xx-regulator.c index c2427ea166626bdc1eb7cfb99997d95e5125ed91..f35b2b72e46f70496e16be52445= 29a5d95d0546d 100644 --- a/drivers/regulator/bcm590xx-regulator.c +++ b/drivers/regulator/bcm590xx-regulator.c @@ -18,146 +18,11 @@ #include #include =20 -/* I2C slave 0 registers */ -#define BCM590XX_RFLDOPMCTRL1 0x60 -#define BCM590XX_CAMLDO1PMCTRL1 0x62 -#define BCM590XX_CAMLDO2PMCTRL1 0x64 -#define BCM590XX_SIMLDO1PMCTRL1 0x66 -#define BCM590XX_SIMLDO2PMCTRL1 0x68 -#define BCM590XX_SDLDOPMCTRL1 0x6a -#define BCM590XX_SDXLDOPMCTRL1 0x6c -#define BCM590XX_MMCLDO1PMCTRL1 0x6e -#define BCM590XX_MMCLDO2PMCTRL1 0x70 -#define BCM590XX_AUDLDOPMCTRL1 0x72 -#define BCM590XX_MICLDOPMCTRL1 0x74 -#define BCM590XX_USBLDOPMCTRL1 0x76 -#define BCM590XX_VIBLDOPMCTRL1 0x78 -#define BCM590XX_IOSR1PMCTRL1 0x7a -#define BCM590XX_IOSR2PMCTRL1 0x7c -#define BCM590XX_CSRPMCTRL1 0x7e -#define BCM590XX_SDSR1PMCTRL1 0x82 -#define BCM590XX_SDSR2PMCTRL1 0x86 -#define BCM590XX_MSRPMCTRL1 0x8a -#define BCM590XX_VSRPMCTRL1 0x8e -#define BCM590XX_RFLDOCTRL 0x96 -#define BCM590XX_CAMLDO1CTRL 0x97 -#define BCM590XX_CAMLDO2CTRL 0x98 -#define BCM590XX_SIMLDO1CTRL 0x99 -#define BCM590XX_SIMLDO2CTRL 0x9a -#define BCM590XX_SDLDOCTRL 0x9b -#define BCM590XX_SDXLDOCTRL 0x9c -#define BCM590XX_MMCLDO1CTRL 0x9d -#define BCM590XX_MMCLDO2CTRL 0x9e -#define BCM590XX_AUDLDOCTRL 0x9f -#define BCM590XX_MICLDOCTRL 0xa0 -#define BCM590XX_USBLDOCTRL 0xa1 -#define BCM590XX_VIBLDOCTRL 0xa2 -#define BCM590XX_CSRVOUT1 0xc0 -#define BCM590XX_IOSR1VOUT1 0xc3 -#define BCM590XX_IOSR2VOUT1 0xc6 -#define BCM590XX_MSRVOUT1 0xc9 -#define BCM590XX_SDSR1VOUT1 0xcc -#define BCM590XX_SDSR2VOUT1 0xcf -#define BCM590XX_VSRVOUT1 0xd2 - -/* I2C slave 1 registers */ -#define BCM590XX_GPLDO5PMCTRL1 0x16 -#define BCM590XX_GPLDO6PMCTRL1 0x18 -#define BCM590XX_GPLDO1CTRL 0x1a -#define BCM590XX_GPLDO2CTRL 0x1b -#define BCM590XX_GPLDO3CTRL 0x1c -#define BCM590XX_GPLDO4CTRL 0x1d -#define BCM590XX_GPLDO5CTRL 0x1e -#define BCM590XX_GPLDO6CTRL 0x1f -#define BCM590XX_OTG_CTRL 0x40 -#define BCM590XX_GPLDO1PMCTRL1 0x57 -#define BCM590XX_GPLDO2PMCTRL1 0x59 -#define BCM590XX_GPLDO3PMCTRL1 0x5b -#define BCM590XX_GPLDO4PMCTRL1 0x5d - #define BCM590XX_REG_ENABLE BIT(7) #define BCM590XX_VBUS_ENABLE BIT(2) #define BCM590XX_LDO_VSEL_MASK GENMASK(5, 3) #define BCM590XX_SR_VSEL_MASK GENMASK(5, 0) =20 -/* - * RFLDO to VSR regulators are - * accessed via I2C slave 0 - */ - -/* LDO regulator IDs */ -#define BCM590XX_REG_RFLDO 0 -#define BCM590XX_REG_CAMLDO1 1 -#define BCM590XX_REG_CAMLDO2 2 -#define BCM590XX_REG_SIMLDO1 3 -#define BCM590XX_REG_SIMLDO2 4 -#define BCM590XX_REG_SDLDO 5 -#define BCM590XX_REG_SDXLDO 6 -#define BCM590XX_REG_MMCLDO1 7 -#define BCM590XX_REG_MMCLDO2 8 -#define BCM590XX_REG_AUDLDO 9 -#define BCM590XX_REG_MICLDO 10 -#define BCM590XX_REG_USBLDO 11 -#define BCM590XX_REG_VIBLDO 12 - -/* DCDC regulator IDs */ -#define BCM590XX_REG_CSR 13 -#define BCM590XX_REG_IOSR1 14 -#define BCM590XX_REG_IOSR2 15 -#define BCM590XX_REG_MSR 16 -#define BCM590XX_REG_SDSR1 17 -#define BCM590XX_REG_SDSR2 18 -#define BCM590XX_REG_VSR 19 - -/* - * GPLDO1 to VBUS regulators are - * accessed via I2C slave 1 - */ - -#define BCM590XX_REG_GPLDO1 20 -#define BCM590XX_REG_GPLDO2 21 -#define BCM590XX_REG_GPLDO3 22 -#define BCM590XX_REG_GPLDO4 23 -#define BCM590XX_REG_GPLDO5 24 -#define BCM590XX_REG_GPLDO6 25 -#define BCM590XX_REG_VBUS 26 - -#define BCM590XX_NUM_REGS 27 - -/* LDO group A: supported voltages in microvolts */ -static const unsigned int ldo_a_table[] =3D { - 1200000, 1800000, 2500000, 2700000, 2800000, - 2900000, 3000000, 3300000, -}; - -/* LDO group C: supported voltages in microvolts */ -static const unsigned int ldo_c_table[] =3D { - 3100000, 1800000, 2500000, 2700000, 2800000, - 2900000, 3000000, 3300000, -}; - -/* DCDC group CSR: supported voltages in microvolts */ -static const struct linear_range dcdc_csr_ranges[] =3D { - REGULATOR_LINEAR_RANGE(860000, 2, 50, 10000), - REGULATOR_LINEAR_RANGE(1360000, 51, 55, 20000), - REGULATOR_LINEAR_RANGE(900000, 56, 63, 0), -}; - -/* DCDC group IOSR1: supported voltages in microvolts */ -static const struct linear_range dcdc_iosr1_ranges[] =3D { - REGULATOR_LINEAR_RANGE(860000, 2, 51, 10000), - REGULATOR_LINEAR_RANGE(1500000, 52, 52, 0), - REGULATOR_LINEAR_RANGE(1800000, 53, 53, 0), - REGULATOR_LINEAR_RANGE(900000, 54, 63, 0), -}; - -/* DCDC group SDSR1: supported voltages in microvolts */ -static const struct linear_range dcdc_sdsr1_ranges[] =3D { - REGULATOR_LINEAR_RANGE(860000, 2, 50, 10000), - REGULATOR_LINEAR_RANGE(1340000, 51, 51, 0), - REGULATOR_LINEAR_RANGE(900000, 52, 63, 0), -}; - enum bcm590xx_reg_type { BCM590XX_REG_TYPE_LDO, BCM590XX_REG_TYPE_GPLDO, @@ -203,43 +68,187 @@ static const struct regulator_ops bcm590xx_ops_vbus = =3D { .disable =3D regulator_disable_regmap, }; =20 -#define BCM590XX_REG_DESC(_name, _name_lower) \ - .id =3D BCM590XX_REG_##_name, \ +#define BCM590XX_REG_DESC(_model, _name, _name_lower) \ + .id =3D _model##_REG_##_name, \ .name =3D #_name_lower, \ .of_match =3D of_match_ptr(#_name_lower), \ .regulators_node =3D of_match_ptr("regulators"), \ .type =3D REGULATOR_VOLTAGE, \ .owner =3D THIS_MODULE \ =20 -#define BCM590XX_LDO_DESC(_name, _name_lower, _table) \ - BCM590XX_REG_DESC(_name, _name_lower), \ +#define BCM590XX_LDO_DESC(_model, _model_lower, _name, _name_lower, _table= ) \ + BCM590XX_REG_DESC(_model, _name, _name_lower), \ .ops =3D &bcm590xx_ops_ldo, \ - .n_voltages =3D ARRAY_SIZE(_table), \ - .volt_table =3D _table, \ - .vsel_reg =3D BCM590XX_##_name##CTRL, \ + .n_voltages =3D ARRAY_SIZE(_model_lower##_##_table), \ + .volt_table =3D _model_lower##_##_table, \ + .vsel_reg =3D _model##_##_name##CTRL, \ .vsel_mask =3D BCM590XX_LDO_VSEL_MASK, \ - .enable_reg =3D BCM590XX_##_name##PMCTRL1, \ + .enable_reg =3D _model##_##_name##PMCTRL1, \ .enable_mask =3D BCM590XX_REG_ENABLE, \ .enable_is_inverted =3D true =20 -#define BCM590XX_SR_DESC(_name, _name_lower, _ranges) \ - BCM590XX_REG_DESC(_name, _name_lower), \ +#define BCM590XX_SR_DESC(_model, _model_lower, _name, _name_lower, _ranges= ) \ + BCM590XX_REG_DESC(_model, _name, _name_lower), \ .ops =3D &bcm590xx_ops_dcdc, \ .n_voltages =3D 64, \ - .linear_ranges =3D _ranges, \ - .n_linear_ranges =3D ARRAY_SIZE(_ranges), \ - .vsel_reg =3D BCM590XX_##_name##VOUT1, \ + .linear_ranges =3D _model_lower##_##_ranges, \ + .n_linear_ranges =3D ARRAY_SIZE(_model_lower##_##_ranges), \ + .vsel_reg =3D _model##_##_name##VOUT1, \ .vsel_mask =3D BCM590XX_SR_VSEL_MASK, \ - .enable_reg =3D BCM590XX_##_name##PMCTRL1, \ + .enable_reg =3D _model##_##_name##PMCTRL1, \ .enable_mask =3D BCM590XX_REG_ENABLE, \ .enable_is_inverted =3D true =20 -static const struct bcm590xx_reg_data bcm590xx_regs[BCM590XX_NUM_REGS] =3D= { +#define BCM59056_REG_DESC(_name, _name_lower) \ + BCM590XX_REG_DESC(BCM59056, _name, _name_lower) +#define BCM59056_LDO_DESC(_name, _name_lower, _table) \ + BCM590XX_LDO_DESC(BCM59056, bcm59056, _name, _name_lower, _table) +#define BCM59056_SR_DESC(_name, _name_lower, _ranges) \ + BCM590XX_SR_DESC(BCM59056, bcm59056, _name, _name_lower, _ranges) + +/* BCM59056 data */ + +/* I2C slave 0 registers */ +#define BCM59056_RFLDOPMCTRL1 0x60 +#define BCM59056_CAMLDO1PMCTRL1 0x62 +#define BCM59056_CAMLDO2PMCTRL1 0x64 +#define BCM59056_SIMLDO1PMCTRL1 0x66 +#define BCM59056_SIMLDO2PMCTRL1 0x68 +#define BCM59056_SDLDOPMCTRL1 0x6a +#define BCM59056_SDXLDOPMCTRL1 0x6c +#define BCM59056_MMCLDO1PMCTRL1 0x6e +#define BCM59056_MMCLDO2PMCTRL1 0x70 +#define BCM59056_AUDLDOPMCTRL1 0x72 +#define BCM59056_MICLDOPMCTRL1 0x74 +#define BCM59056_USBLDOPMCTRL1 0x76 +#define BCM59056_VIBLDOPMCTRL1 0x78 +#define BCM59056_IOSR1PMCTRL1 0x7a +#define BCM59056_IOSR2PMCTRL1 0x7c +#define BCM59056_CSRPMCTRL1 0x7e +#define BCM59056_SDSR1PMCTRL1 0x82 +#define BCM59056_SDSR2PMCTRL1 0x86 +#define BCM59056_MSRPMCTRL1 0x8a +#define BCM59056_VSRPMCTRL1 0x8e +#define BCM59056_RFLDOCTRL 0x96 +#define BCM59056_CAMLDO1CTRL 0x97 +#define BCM59056_CAMLDO2CTRL 0x98 +#define BCM59056_SIMLDO1CTRL 0x99 +#define BCM59056_SIMLDO2CTRL 0x9a +#define BCM59056_SDLDOCTRL 0x9b +#define BCM59056_SDXLDOCTRL 0x9c +#define BCM59056_MMCLDO1CTRL 0x9d +#define BCM59056_MMCLDO2CTRL 0x9e +#define BCM59056_AUDLDOCTRL 0x9f +#define BCM59056_MICLDOCTRL 0xa0 +#define BCM59056_USBLDOCTRL 0xa1 +#define BCM59056_VIBLDOCTRL 0xa2 +#define BCM59056_CSRVOUT1 0xc0 +#define BCM59056_IOSR1VOUT1 0xc3 +#define BCM59056_IOSR2VOUT1 0xc6 +#define BCM59056_MSRVOUT1 0xc9 +#define BCM59056_SDSR1VOUT1 0xcc +#define BCM59056_SDSR2VOUT1 0xcf +#define BCM59056_VSRVOUT1 0xd2 + +/* I2C slave 1 registers */ +#define BCM59056_GPLDO5PMCTRL1 0x16 +#define BCM59056_GPLDO6PMCTRL1 0x18 +#define BCM59056_GPLDO1CTRL 0x1a +#define BCM59056_GPLDO2CTRL 0x1b +#define BCM59056_GPLDO3CTRL 0x1c +#define BCM59056_GPLDO4CTRL 0x1d +#define BCM59056_GPLDO5CTRL 0x1e +#define BCM59056_GPLDO6CTRL 0x1f +#define BCM59056_OTG_CTRL 0x40 +#define BCM59056_GPLDO1PMCTRL1 0x57 +#define BCM59056_GPLDO2PMCTRL1 0x59 +#define BCM59056_GPLDO3PMCTRL1 0x5b +#define BCM59056_GPLDO4PMCTRL1 0x5d + +/* + * RFLDO to VSR regulators are + * accessed via I2C slave 0 + */ + +/* LDO regulator IDs */ +#define BCM59056_REG_RFLDO 0 +#define BCM59056_REG_CAMLDO1 1 +#define BCM59056_REG_CAMLDO2 2 +#define BCM59056_REG_SIMLDO1 3 +#define BCM59056_REG_SIMLDO2 4 +#define BCM59056_REG_SDLDO 5 +#define BCM59056_REG_SDXLDO 6 +#define BCM59056_REG_MMCLDO1 7 +#define BCM59056_REG_MMCLDO2 8 +#define BCM59056_REG_AUDLDO 9 +#define BCM59056_REG_MICLDO 10 +#define BCM59056_REG_USBLDO 11 +#define BCM59056_REG_VIBLDO 12 + +/* DCDC regulator IDs */ +#define BCM59056_REG_CSR 13 +#define BCM59056_REG_IOSR1 14 +#define BCM59056_REG_IOSR2 15 +#define BCM59056_REG_MSR 16 +#define BCM59056_REG_SDSR1 17 +#define BCM59056_REG_SDSR2 18 +#define BCM59056_REG_VSR 19 + +/* + * GPLDO1 to VBUS regulators are + * accessed via I2C slave 1 + */ + +#define BCM59056_REG_GPLDO1 20 +#define BCM59056_REG_GPLDO2 21 +#define BCM59056_REG_GPLDO3 22 +#define BCM59056_REG_GPLDO4 23 +#define BCM59056_REG_GPLDO5 24 +#define BCM59056_REG_GPLDO6 25 +#define BCM59056_REG_VBUS 26 + +#define BCM59056_NUM_REGS 27 + +/* LDO group A: supported voltages in microvolts */ +static const unsigned int bcm59056_ldo_a_table[] =3D { + 1200000, 1800000, 2500000, 2700000, 2800000, + 2900000, 3000000, 3300000, +}; + +/* LDO group C: supported voltages in microvolts */ +static const unsigned int bcm59056_ldo_c_table[] =3D { + 3100000, 1800000, 2500000, 2700000, 2800000, + 2900000, 3000000, 3300000, +}; + +/* DCDC group CSR: supported voltages in microvolts */ +static const struct linear_range bcm59056_dcdc_csr_ranges[] =3D { + REGULATOR_LINEAR_RANGE(860000, 2, 50, 10000), + REGULATOR_LINEAR_RANGE(1360000, 51, 55, 20000), + REGULATOR_LINEAR_RANGE(900000, 56, 63, 0), +}; + +/* DCDC group IOSR1: supported voltages in microvolts */ +static const struct linear_range bcm59056_dcdc_iosr1_ranges[] =3D { + REGULATOR_LINEAR_RANGE(860000, 2, 51, 10000), + REGULATOR_LINEAR_RANGE(1500000, 52, 52, 0), + REGULATOR_LINEAR_RANGE(1800000, 53, 53, 0), + REGULATOR_LINEAR_RANGE(900000, 54, 63, 0), +}; + +/* DCDC group SDSR1: supported voltages in microvolts */ +static const struct linear_range bcm59056_dcdc_sdsr1_ranges[] =3D { + REGULATOR_LINEAR_RANGE(860000, 2, 50, 10000), + REGULATOR_LINEAR_RANGE(1340000, 51, 51, 0), + REGULATOR_LINEAR_RANGE(900000, 52, 63, 0), +}; + +static const struct bcm590xx_reg_data bcm59056_regs[BCM59056_NUM_REGS] =3D= { { .type =3D BCM590XX_REG_TYPE_LDO, .regmap =3D BCM590XX_REGMAP_PRI, .desc =3D { - BCM590XX_LDO_DESC(RFLDO, rfldo, ldo_a_table), + BCM59056_LDO_DESC(RFLDO, rfldo, ldo_a_table), }, }, =20 @@ -247,7 +256,7 @@ static const struct bcm590xx_reg_data bcm590xx_regs[BCM= 590XX_NUM_REGS] =3D { .type =3D BCM590XX_REG_TYPE_LDO, .regmap =3D BCM590XX_REGMAP_PRI, .desc =3D { - BCM590XX_LDO_DESC(CAMLDO1, camldo1, ldo_c_table), + BCM59056_LDO_DESC(CAMLDO1, camldo1, ldo_c_table), }, }, =20 @@ -255,7 +264,7 @@ static const struct bcm590xx_reg_data bcm590xx_regs[BCM= 590XX_NUM_REGS] =3D { .type =3D BCM590XX_REG_TYPE_LDO, .regmap =3D BCM590XX_REGMAP_PRI, .desc =3D { - BCM590XX_LDO_DESC(CAMLDO2, camldo2, ldo_c_table), + BCM59056_LDO_DESC(CAMLDO2, camldo2, ldo_c_table), }, }, =20 @@ -263,7 +272,7 @@ static const struct bcm590xx_reg_data bcm590xx_regs[BCM= 590XX_NUM_REGS] =3D { .type =3D BCM590XX_REG_TYPE_LDO, .regmap =3D BCM590XX_REGMAP_PRI, .desc =3D { - BCM590XX_LDO_DESC(SIMLDO1, simldo1, ldo_a_table), + BCM59056_LDO_DESC(SIMLDO1, simldo1, ldo_a_table), }, }, =20 @@ -271,7 +280,7 @@ static const struct bcm590xx_reg_data bcm590xx_regs[BCM= 590XX_NUM_REGS] =3D { .type =3D BCM590XX_REG_TYPE_LDO, .regmap =3D BCM590XX_REGMAP_PRI, .desc =3D { - BCM590XX_LDO_DESC(SIMLDO2, simldo2, ldo_a_table), + BCM59056_LDO_DESC(SIMLDO2, simldo2, ldo_a_table), }, }, =20 @@ -279,7 +288,7 @@ static const struct bcm590xx_reg_data bcm590xx_regs[BCM= 590XX_NUM_REGS] =3D { .type =3D BCM590XX_REG_TYPE_LDO, .regmap =3D BCM590XX_REGMAP_PRI, .desc =3D { - BCM590XX_LDO_DESC(SDLDO, sdldo, ldo_c_table), + BCM59056_LDO_DESC(SDLDO, sdldo, ldo_c_table), }, }, =20 @@ -287,7 +296,7 @@ static const struct bcm590xx_reg_data bcm590xx_regs[BCM= 590XX_NUM_REGS] =3D { .type =3D BCM590XX_REG_TYPE_LDO, .regmap =3D BCM590XX_REGMAP_PRI, .desc =3D { - BCM590XX_LDO_DESC(SDXLDO, sdxldo, ldo_a_table), + BCM59056_LDO_DESC(SDXLDO, sdxldo, ldo_a_table), }, }, =20 @@ -295,7 +304,7 @@ static const struct bcm590xx_reg_data bcm590xx_regs[BCM= 590XX_NUM_REGS] =3D { .type =3D BCM590XX_REG_TYPE_LDO, .regmap =3D BCM590XX_REGMAP_PRI, .desc =3D { - BCM590XX_LDO_DESC(MMCLDO1, mmcldo1, ldo_a_table), + BCM59056_LDO_DESC(MMCLDO1, mmcldo1, ldo_a_table), }, }, =20 @@ -303,7 +312,7 @@ static const struct bcm590xx_reg_data bcm590xx_regs[BCM= 590XX_NUM_REGS] =3D { .type =3D BCM590XX_REG_TYPE_LDO, .regmap =3D BCM590XX_REGMAP_PRI, .desc =3D { - BCM590XX_LDO_DESC(MMCLDO2, mmcldo2, ldo_a_table), + BCM59056_LDO_DESC(MMCLDO2, mmcldo2, ldo_a_table), }, }, =20 @@ -311,7 +320,7 @@ static const struct bcm590xx_reg_data bcm590xx_regs[BCM= 590XX_NUM_REGS] =3D { .type =3D BCM590XX_REG_TYPE_LDO, .regmap =3D BCM590XX_REGMAP_PRI, .desc =3D { - BCM590XX_LDO_DESC(AUDLDO, audldo, ldo_a_table), + BCM59056_LDO_DESC(AUDLDO, audldo, ldo_a_table), }, }, =20 @@ -319,7 +328,7 @@ static const struct bcm590xx_reg_data bcm590xx_regs[BCM= 590XX_NUM_REGS] =3D { .type =3D BCM590XX_REG_TYPE_LDO, .regmap =3D BCM590XX_REGMAP_PRI, .desc =3D { - BCM590XX_LDO_DESC(MICLDO, micldo, ldo_a_table), + BCM59056_LDO_DESC(MICLDO, micldo, ldo_a_table), }, }, =20 @@ -327,7 +336,7 @@ static const struct bcm590xx_reg_data bcm590xx_regs[BCM= 590XX_NUM_REGS] =3D { .type =3D BCM590XX_REG_TYPE_LDO, .regmap =3D BCM590XX_REGMAP_PRI, .desc =3D { - BCM590XX_LDO_DESC(USBLDO, usbldo, ldo_a_table), + BCM59056_LDO_DESC(USBLDO, usbldo, ldo_a_table), }, }, =20 @@ -335,7 +344,7 @@ static const struct bcm590xx_reg_data bcm590xx_regs[BCM= 590XX_NUM_REGS] =3D { .type =3D BCM590XX_REG_TYPE_LDO, .regmap =3D BCM590XX_REGMAP_PRI, .desc =3D { - BCM590XX_LDO_DESC(VIBLDO, vibldo, ldo_c_table), + BCM59056_LDO_DESC(VIBLDO, vibldo, ldo_c_table), }, }, =20 @@ -343,7 +352,7 @@ static const struct bcm590xx_reg_data bcm590xx_regs[BCM= 590XX_NUM_REGS] =3D { .type =3D BCM590XX_REG_TYPE_SR, .regmap =3D BCM590XX_REGMAP_PRI, .desc =3D { - BCM590XX_SR_DESC(CSR, csr, dcdc_csr_ranges), + BCM59056_SR_DESC(CSR, csr, dcdc_csr_ranges), }, }, =20 @@ -351,7 +360,7 @@ static const struct bcm590xx_reg_data bcm590xx_regs[BCM= 590XX_NUM_REGS] =3D { .type =3D BCM590XX_REG_TYPE_SR, .regmap =3D BCM590XX_REGMAP_PRI, .desc =3D { - BCM590XX_SR_DESC(IOSR1, iosr1, dcdc_iosr1_ranges), + BCM59056_SR_DESC(IOSR1, iosr1, dcdc_iosr1_ranges), }, }, =20 @@ -359,7 +368,7 @@ static const struct bcm590xx_reg_data bcm590xx_regs[BCM= 590XX_NUM_REGS] =3D { .type =3D BCM590XX_REG_TYPE_SR, .regmap =3D BCM590XX_REGMAP_PRI, .desc =3D { - BCM590XX_SR_DESC(IOSR2, iosr2, dcdc_iosr1_ranges), + BCM59056_SR_DESC(IOSR2, iosr2, dcdc_iosr1_ranges), }, }, =20 @@ -367,7 +376,7 @@ static const struct bcm590xx_reg_data bcm590xx_regs[BCM= 590XX_NUM_REGS] =3D { .type =3D BCM590XX_REG_TYPE_SR, .regmap =3D BCM590XX_REGMAP_PRI, .desc =3D { - BCM590XX_SR_DESC(MSR, msr, dcdc_iosr1_ranges), + BCM59056_SR_DESC(MSR, msr, dcdc_iosr1_ranges), }, }, =20 @@ -375,7 +384,7 @@ static const struct bcm590xx_reg_data bcm590xx_regs[BCM= 590XX_NUM_REGS] =3D { .type =3D BCM590XX_REG_TYPE_SR, .regmap =3D BCM590XX_REGMAP_PRI, .desc =3D { - BCM590XX_SR_DESC(SDSR1, sdsr1, dcdc_sdsr1_ranges), + BCM59056_SR_DESC(SDSR1, sdsr1, dcdc_sdsr1_ranges), }, }, =20 @@ -383,7 +392,7 @@ static const struct bcm590xx_reg_data bcm590xx_regs[BCM= 590XX_NUM_REGS] =3D { .type =3D BCM590XX_REG_TYPE_SR, .regmap =3D BCM590XX_REGMAP_PRI, .desc =3D { - BCM590XX_SR_DESC(SDSR2, sdsr2, dcdc_iosr1_ranges), + BCM59056_SR_DESC(SDSR2, sdsr2, dcdc_iosr1_ranges), }, }, =20 @@ -391,7 +400,7 @@ static const struct bcm590xx_reg_data bcm590xx_regs[BCM= 590XX_NUM_REGS] =3D { .type =3D BCM590XX_REG_TYPE_SR, .regmap =3D BCM590XX_REGMAP_PRI, .desc =3D { - BCM590XX_SR_DESC(VSR, vsr, dcdc_iosr1_ranges), + BCM59056_SR_DESC(VSR, vsr, dcdc_iosr1_ranges), }, }, =20 @@ -399,7 +408,7 @@ static const struct bcm590xx_reg_data bcm590xx_regs[BCM= 590XX_NUM_REGS] =3D { .type =3D BCM590XX_REG_TYPE_GPLDO, .regmap =3D BCM590XX_REGMAP_SEC, .desc =3D { - BCM590XX_LDO_DESC(GPLDO1, gpldo1, ldo_a_table), + BCM59056_LDO_DESC(GPLDO1, gpldo1, ldo_a_table), }, }, =20 @@ -407,7 +416,7 @@ static const struct bcm590xx_reg_data bcm590xx_regs[BCM= 590XX_NUM_REGS] =3D { .type =3D BCM590XX_REG_TYPE_GPLDO, .regmap =3D BCM590XX_REGMAP_SEC, .desc =3D { - BCM590XX_LDO_DESC(GPLDO2, gpldo2, ldo_a_table), + BCM59056_LDO_DESC(GPLDO2, gpldo2, ldo_a_table), }, }, =20 @@ -415,7 +424,7 @@ static const struct bcm590xx_reg_data bcm590xx_regs[BCM= 590XX_NUM_REGS] =3D { .type =3D BCM590XX_REG_TYPE_GPLDO, .regmap =3D BCM590XX_REGMAP_SEC, .desc =3D { - BCM590XX_LDO_DESC(GPLDO3, gpldo3, ldo_a_table), + BCM59056_LDO_DESC(GPLDO3, gpldo3, ldo_a_table), }, }, =20 @@ -423,7 +432,7 @@ static const struct bcm590xx_reg_data bcm590xx_regs[BCM= 590XX_NUM_REGS] =3D { .type =3D BCM590XX_REG_TYPE_GPLDO, .regmap =3D BCM590XX_REGMAP_SEC, .desc =3D { - BCM590XX_LDO_DESC(GPLDO4, gpldo4, ldo_a_table), + BCM59056_LDO_DESC(GPLDO4, gpldo4, ldo_a_table), }, }, =20 @@ -431,7 +440,7 @@ static const struct bcm590xx_reg_data bcm590xx_regs[BCM= 590XX_NUM_REGS] =3D { .type =3D BCM590XX_REG_TYPE_GPLDO, .regmap =3D BCM590XX_REGMAP_SEC, .desc =3D { - BCM590XX_LDO_DESC(GPLDO5, gpldo5, ldo_a_table), + BCM59056_LDO_DESC(GPLDO5, gpldo5, ldo_a_table), }, }, =20 @@ -439,7 +448,7 @@ static const struct bcm590xx_reg_data bcm590xx_regs[BCM= 590XX_NUM_REGS] =3D { .type =3D BCM590XX_REG_TYPE_GPLDO, .regmap =3D BCM590XX_REGMAP_SEC, .desc =3D { - BCM590XX_LDO_DESC(GPLDO6, gpldo6, ldo_a_table), + BCM59056_LDO_DESC(GPLDO6, gpldo6, ldo_a_table), }, }, =20 @@ -447,11 +456,11 @@ static const struct bcm590xx_reg_data bcm590xx_regs[B= CM590XX_NUM_REGS] =3D { .type =3D BCM590XX_REG_TYPE_VBUS, .regmap =3D BCM590XX_REGMAP_SEC, .desc =3D { - BCM590XX_REG_DESC(VBUS, vbus), + BCM59056_REG_DESC(VBUS, vbus), .ops =3D &bcm590xx_ops_vbus, .n_voltages =3D 1, .fixed_uV =3D 5000000, - .enable_reg =3D BCM590XX_OTG_CTRL, + .enable_reg =3D BCM59056_OTG_CTRL, .enable_mask =3D BCM590XX_VBUS_ENABLE, }, }, @@ -471,8 +480,8 @@ static int bcm590xx_probe(struct platform_device *pdev) return -ENOMEM; =20 pmu->mfd =3D bcm590xx; - pmu->n_regulators =3D BCM590XX_NUM_REGS; - pmu->regs =3D bcm590xx_regs; + pmu->n_regulators =3D BCM59056_NUM_REGS; + pmu->regs =3D bcm59056_regs; =20 platform_set_drvdata(pdev, pmu); =20 --=20 2.49.0