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Wed, 14 May 2025 03:15:45 -0700 (PDT) From: Prabhakar X-Google-Original-From: Prabhakar To: Geert Uytterhoeven , Magnus Damm , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-renesas-soc@vger.kernel.org Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Prabhakar , Biju Das , Fabrizio Castro , Lad Prabhakar Subject: [PATCH 09/10] arm64: dts: renesas: r9a09g056: Add Mali-G31 GPU node Date: Wed, 14 May 2025 11:15:27 +0100 Message-ID: <20250514101528.41663-10-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250514101528.41663-1-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <20250514101528.41663-1-prabhakar.mahadev-lad.rj@bp.renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Lad Prabhakar Add the device tree node for the ARM Mali-G31 GPU found on selected variants of the Renesas RZ/V2N (R9A09G056) SoC. Signed-off-by: Lad Prabhakar Reviewed-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/r9a09g056.dtsi | 51 ++++++++++++++++++++++ 1 file changed, 51 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r9a09g056.dtsi b/arch/arm64/boot/d= ts/renesas/r9a09g056.dtsi index 93bcd5f203ef..78313ec4935f 100644 --- a/arch/arm64/boot/dts/renesas/r9a09g056.dtsi +++ b/arch/arm64/boot/dts/renesas/r9a09g056.dtsi @@ -123,6 +123,35 @@ L3_CA55: cache-controller-0 { }; }; =20 + gpu_opp_table: opp-table-1 { + compatible =3D "operating-points-v2"; + + opp-630000000 { + opp-hz =3D /bits/ 64 <630000000>; + opp-microvolt =3D <800000>; + }; + + opp-315000000 { + opp-hz =3D /bits/ 64 <315000000>; + opp-microvolt =3D <800000>; + }; + + opp-157500000 { + opp-hz =3D /bits/ 64 <157500000>; + opp-microvolt =3D <800000>; + }; + + opp-78750000 { + opp-hz =3D /bits/ 64 <78750000>; + opp-microvolt =3D <800000>; + }; + + opp-19687500 { + opp-hz =3D /bits/ 64 <19687500>; + opp-microvolt =3D <800000>; + }; + }; + psci { compatible =3D "arm,psci-1.0", "arm,psci-0.2"; method =3D "smc"; @@ -508,6 +537,28 @@ i2c8: i2c@11c01000 { status =3D "disabled"; }; =20 + gpu: gpu@14850000 { + compatible =3D "renesas,r9a09g056-mali", + "arm,mali-bifrost"; + reg =3D <0x0 0x14850000 0x0 0x10000>; + interrupts =3D , + , + , + ; + interrupt-names =3D "job", "mmu", "gpu", "event"; + clocks =3D <&cpg CPG_MOD 0xf0>, + <&cpg CPG_MOD 0xf1>, + <&cpg CPG_MOD 0xf2>; + clock-names =3D "gpu", "bus", "bus_ace"; + resets =3D <&cpg 0xdd>, + <&cpg 0xde>, + <&cpg 0xdf>; + reset-names =3D "rst", "axi_rst", "ace_rst"; + power-domains =3D <&cpg>; + operating-points-v2 =3D <&gpu_opp_table>; + status =3D "disabled"; + }; + gic: interrupt-controller@14900000 { compatible =3D "arm,gic-v3"; reg =3D <0x0 0x14900000 0 0x20000>, --=20 2.49.0