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[93.89.165.28]) by smtp.googlemail.com with ESMTPSA id 5b1f17b1804b1-442f39ef811sm38707525e9.35.2025.05.14.12.18.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 May 2025 12:18:45 -0700 (PDT) From: Gabor Juhos Date: Wed, 14 May 2025 21:18:32 +0200 Subject: [PATCH v2 1/7] pinctrl: armada-37xx: use correct OUTPUT_VAL register for GPIOs > 31 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250514-pinctrl-a37xx-fixes-v2-1-07e9ac1ab737@gmail.com> References: <20250514-pinctrl-a37xx-fixes-v2-0-07e9ac1ab737@gmail.com> In-Reply-To: <20250514-pinctrl-a37xx-fixes-v2-0-07e9ac1ab737@gmail.com> To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Linus Walleij , Bartosz Golaszewski Cc: Imre Kaloz , linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, Gabor Juhos , stable@vger.kernel.org X-Mailer: b4 0.14.2 The controller has two consecutive OUTPUT_VAL registers and both holds output value for 32 GPIOs. Due to a missing adjustment, the current code always uses the first register while setting the output value whereas it should use the second one for GPIOs > 31. Add the missing armada_37xx_update_reg() call to adjust the register according to the 'offset' parameter of the function to fix the issue. Cc: stable@vger.kernel.org Fixes: 6702abb3bf23 ("pinctrl: armada-37xx: Fix direction_output() callback= behavior") Signed-off-by: Imre Kaloz Reviewed-by: Andrew Lunn Signed-off-by: Gabor Juhos --- Changes in v2: - add 'Reviewed-by' tag from Andrew - reorder 'Signed-off-by' tags (result of 'b4 trailers -u') --- drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/= mvebu/pinctrl-armada-37xx.c index 335744ac831057576473dd62c5533168b243a656..43034d29292687e875136aafa53= 0b62479dc55ec 100644 --- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c +++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c @@ -417,6 +417,7 @@ static int armada_37xx_gpio_direction_output(struct gpi= o_chip *chip, unsigned int offset, int value) { struct armada_37xx_pinctrl *info =3D gpiochip_get_data(chip); + unsigned int val_offset =3D offset; unsigned int reg =3D OUTPUT_EN; unsigned int mask, val, ret; =20 @@ -429,6 +430,8 @@ static int armada_37xx_gpio_direction_output(struct gpi= o_chip *chip, return ret; =20 reg =3D OUTPUT_VAL; + armada_37xx_update_reg(®, &val_offset); + val =3D value ? mask : 0; regmap_update_bits(info->regmap, reg, mask, val); =20 --=20 2.49.0