From nobody Thu Dec 18 20:15:58 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AE4AA2BE7C5; Tue, 13 May 2025 17:28:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747157310; cv=none; b=OGCuGL0u0O4xyQxpZobf5dIrvcU8aAaEy0pj+FcDJRvsj3MkJLb590UEVyzZjJx0cj0V09jjPDVm+O+6wCLQMK0cj6Bko0D9EHjUaZ049p6YxJ3cxpAV7pu4ptm7wB5v1CVnXjzcIrHJNRoNVo4r/ok5KZzKPxj7N0m8gqWlTRM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747157310; c=relaxed/simple; bh=1rkj+y1q1p0hGIIM2flqfhEStwJJYCpE+rTvcEhYKkI=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=NbHIV4VczztZUKtxmmWqnqu1kFwOzyY5r81m1PyhzryRzbDsGX0vaaK948cvCYNzp8Ejru6w1B5wEy5g6u+o2EJlR7UkiFQV6IanLL96/v/qiHpdNAPdcm5VqPpzebKKeXtZwFirhaI97Om7WU/nS92XfF6z3WBzHm9Yi1B0uCQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=ql/wY9r/; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="ql/wY9r/" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 23C93C4CEEF; Tue, 13 May 2025 17:28:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1747157310; bh=1rkj+y1q1p0hGIIM2flqfhEStwJJYCpE+rTvcEhYKkI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ql/wY9r/tVu6+JSfqR/UAO3OpVkZ5lrATJBcMgQuUEGPnNnzzUjHbjk5tVuHW0x5f dWTR/MeBVGJ1TDQQW2CwByd4rPGKCXStyZ81vK5wlb7O1Jr6L4XAUODhWlwI6GhQhd UvZHGu/xnYWBsKTV3va1/6aVAZ101aE0ZCS/zg3qXajIubBfsmSVIyB7zmFyPDS1j3 kJYtzMmvsyx2WnSEBWEAsaGzlBq58/66I0YAdeL6OB4ceJdTwFHr3ePdQOzStuqMgG A0JgLJ7bHYoKPUTSLKNtqJNPFwkPJCn3OobFEwsRPoSY2RphocXgVd1H+HBrEnXl84 qpZefku+qKP2g== Received: from sofa.misterjones.org ([185.219.108.64] helo=valley-girl.lan) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1uEtQa-00EbRz-2X; Tue, 13 May 2025 18:28:28 +0100 From: Marc Zyngier To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org Cc: Thomas Gleixner , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Manivannan Sadhasivam , Bjorn Helgaas , Toan Le , Alyssa Rosenzweig , Thierry Reding , Jonathan Hunter Subject: [PATCH v2 1/9] irqchip: Make irq-msi-lib.h globally available Date: Tue, 13 May 2025 18:28:11 +0100 Message-Id: <20250513172819.2216709-2-maz@kernel.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20250513172819.2216709-1-maz@kernel.org> References: <20250513172819.2216709-1-maz@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org, tglx@linutronix.de, andrew@lunn.ch, gregory.clement@bootlin.com, sebastian.hesselbarth@gmail.com, lpieralisi@kernel.org, kw@linux.com, manivannan.sadhasivam@linaro.org, bhelgaas@google.com, toan@os.amperecomputing.com, alyssa@rosenzweig.io, thierry.reding@gmail.com, jonathanh@nvidia.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Content-Type: text/plain; charset="utf-8" Move irq-msi-lib.h into include/linux/irqchip, making it available to compilation units outside of drivers/irqchip. This requires some churn in drivers to fetch it from the new location, generated using this script: git grep -l -w \"irq-msi-lib.h\" | \ xargs sed -i -e 's:"irq-msi-lib.h":\:' Signed-off-by: Marc Zyngier --- drivers/irqchip/irq-bcm2712-mip.c | 2 +- drivers/irqchip/irq-gic-v2m.c | 2 +- drivers/irqchip/irq-gic-v3-its-msi-parent.c | 2 +- drivers/irqchip/irq-gic-v3-its.c | 2 +- drivers/irqchip/irq-gic-v3-mbi.c | 2 +- drivers/irqchip/irq-imx-mu-msi.c | 2 +- drivers/irqchip/irq-loongarch-avec.c | 2 +- drivers/irqchip/irq-loongson-pch-msi.c | 2 +- drivers/irqchip/irq-msi-lib.c | 2 +- drivers/irqchip/irq-mvebu-gicp.c | 2 +- drivers/irqchip/irq-mvebu-icu.c | 2 +- drivers/irqchip/irq-mvebu-odmi.c | 2 +- drivers/irqchip/irq-mvebu-sei.c | 2 +- drivers/irqchip/irq-riscv-imsic-platform.c | 2 +- drivers/irqchip/irq-sg2042-msi.c | 2 +- {drivers =3D> include/linux}/irqchip/irq-msi-lib.h | 6 +++--- 16 files changed, 18 insertions(+), 18 deletions(-) rename {drivers =3D> include/linux}/irqchip/irq-msi-lib.h (84%) diff --git a/drivers/irqchip/irq-bcm2712-mip.c b/drivers/irqchip/irq-bcm271= 2-mip.c index 49a19db2d1e1b..f04a42b16cca0 100644 --- a/drivers/irqchip/irq-bcm2712-mip.c +++ b/drivers/irqchip/irq-bcm2712-mip.c @@ -11,7 +11,7 @@ #include #include =20 -#include "irq-msi-lib.h" +#include =20 #define MIP_INT_RAISE 0x00 #define MIP_INT_CLEAR 0x10 diff --git a/drivers/irqchip/irq-gic-v2m.c b/drivers/irqchip/irq-gic-v2m.c index c698948618666..62676994d0695 100644 --- a/drivers/irqchip/irq-gic-v2m.c +++ b/drivers/irqchip/irq-gic-v2m.c @@ -26,7 +26,7 @@ #include #include =20 -#include "irq-msi-lib.h" +#include =20 /* * MSI_TYPER: diff --git a/drivers/irqchip/irq-gic-v3-its-msi-parent.c b/drivers/irqchip/= irq-gic-v3-its-msi-parent.c index 68f9ba4085ce5..51cc961bc3181 100644 --- a/drivers/irqchip/irq-gic-v3-its-msi-parent.c +++ b/drivers/irqchip/irq-gic-v3-its-msi-parent.c @@ -8,7 +8,7 @@ #include =20 #include "irq-gic-common.h" -#include "irq-msi-lib.h" +#include =20 #define ITS_MSI_FLAGS_REQUIRED (MSI_FLAG_USE_DEF_DOM_OPS | \ MSI_FLAG_USE_DEF_CHIP_OPS | \ diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-= its.c index fd6e7c170d37e..9e6380f597488 100644 --- a/drivers/irqchip/irq-gic-v3-its.c +++ b/drivers/irqchip/irq-gic-v3-its.c @@ -41,7 +41,7 @@ #include =20 #include "irq-gic-common.h" -#include "irq-msi-lib.h" +#include =20 #define ITS_FLAGS_CMDQ_NEEDS_FLUSHING (1ULL << 0) #define ITS_FLAGS_WORKAROUND_CAVIUM_22375 (1ULL << 1) diff --git a/drivers/irqchip/irq-gic-v3-mbi.c b/drivers/irqchip/irq-gic-v3-= mbi.c index 34e9ca77a8c36..e562b57923229 100644 --- a/drivers/irqchip/irq-gic-v3-mbi.c +++ b/drivers/irqchip/irq-gic-v3-mbi.c @@ -18,7 +18,7 @@ =20 #include =20 -#include "irq-msi-lib.h" +#include =20 struct mbi_range { u32 spi_start; diff --git a/drivers/irqchip/irq-imx-mu-msi.c b/drivers/irqchip/irq-imx-mu-= msi.c index 69aacdfc8bef0..137da1927d144 100644 --- a/drivers/irqchip/irq-imx-mu-msi.c +++ b/drivers/irqchip/irq-imx-mu-msi.c @@ -24,7 +24,7 @@ #include #include =20 -#include "irq-msi-lib.h" +#include =20 #define IMX_MU_CHANS 4 =20 diff --git a/drivers/irqchip/irq-loongarch-avec.c b/drivers/irqchip/irq-loo= ngarch-avec.c index 80e55955a29fa..bf52dc8345f5f 100644 --- a/drivers/irqchip/irq-loongarch-avec.c +++ b/drivers/irqchip/irq-loongarch-avec.c @@ -18,7 +18,7 @@ #include #include =20 -#include "irq-msi-lib.h" +#include #include "irq-loongson.h" =20 #define VECTORS_PER_REG 64 diff --git a/drivers/irqchip/irq-loongson-pch-msi.c b/drivers/irqchip/irq-l= oongson-pch-msi.c index 9c62108b3ad58..fb690c7cbcaa6 100644 --- a/drivers/irqchip/irq-loongson-pch-msi.c +++ b/drivers/irqchip/irq-loongson-pch-msi.c @@ -15,7 +15,7 @@ #include #include =20 -#include "irq-msi-lib.h" +#include #include "irq-loongson.h" =20 static int nr_pics; diff --git a/drivers/irqchip/irq-msi-lib.c b/drivers/irqchip/irq-msi-lib.c index 51464c6257f37..2a61c06c4da07 100644 --- a/drivers/irqchip/irq-msi-lib.c +++ b/drivers/irqchip/irq-msi-lib.c @@ -4,7 +4,7 @@ =20 #include =20 -#include "irq-msi-lib.h" +#include =20 /** * msi_lib_init_dev_msi_info - Domain info setup for MSI domains diff --git a/drivers/irqchip/irq-mvebu-gicp.c b/drivers/irqchip/irq-mvebu-g= icp.c index d67f93f6d7505..0b2a857b49018 100644 --- a/drivers/irqchip/irq-mvebu-gicp.c +++ b/drivers/irqchip/irq-mvebu-gicp.c @@ -17,7 +17,7 @@ #include #include =20 -#include "irq-msi-lib.h" +#include =20 #include =20 diff --git a/drivers/irqchip/irq-mvebu-icu.c b/drivers/irqchip/irq-mvebu-ic= u.c index 4eebed39880a5..db5dbc6e88b05 100644 --- a/drivers/irqchip/irq-mvebu-icu.c +++ b/drivers/irqchip/irq-mvebu-icu.c @@ -20,7 +20,7 @@ #include #include =20 -#include "irq-msi-lib.h" +#include =20 #include =20 diff --git a/drivers/irqchip/irq-mvebu-odmi.c b/drivers/irqchip/irq-mvebu-o= dmi.c index 28f7e81df94f0..306a7754e44f8 100644 --- a/drivers/irqchip/irq-mvebu-odmi.c +++ b/drivers/irqchip/irq-mvebu-odmi.c @@ -18,7 +18,7 @@ #include #include =20 -#include "irq-msi-lib.h" +#include =20 #include =20 diff --git a/drivers/irqchip/irq-mvebu-sei.c b/drivers/irqchip/irq-mvebu-se= i.c index ebd4a9014e8da..a962ef4977169 100644 --- a/drivers/irqchip/irq-mvebu-sei.c +++ b/drivers/irqchip/irq-mvebu-sei.c @@ -14,7 +14,7 @@ #include #include =20 -#include "irq-msi-lib.h" +#include =20 /* Cause register */ #define GICP_SECR(idx) (0x0 + ((idx) * 0x4)) diff --git a/drivers/irqchip/irq-riscv-imsic-platform.c b/drivers/irqchip/i= rq-riscv-imsic-platform.c index b8ae67c25b37a..1b9fbfce95816 100644 --- a/drivers/irqchip/irq-riscv-imsic-platform.c +++ b/drivers/irqchip/irq-riscv-imsic-platform.c @@ -20,7 +20,7 @@ #include #include =20 -#include "irq-msi-lib.h" +#include #include "irq-riscv-imsic-state.h" =20 static bool imsic_cpu_page_phys(unsigned int cpu, unsigned int guest_index, diff --git a/drivers/irqchip/irq-sg2042-msi.c b/drivers/irqchip/irq-sg2042-= msi.c index ee682e87eb8be..d641f3a5eee9e 100644 --- a/drivers/irqchip/irq-sg2042-msi.c +++ b/drivers/irqchip/irq-sg2042-msi.c @@ -17,7 +17,7 @@ #include #include =20 -#include "irq-msi-lib.h" +#include =20 #define SG2042_MAX_MSI_VECTOR 32 =20 diff --git a/drivers/irqchip/irq-msi-lib.h b/include/linux/irqchip/irq-msi-= lib.h similarity index 84% rename from drivers/irqchip/irq-msi-lib.h rename to include/linux/irqchip/irq-msi-lib.h index 681ceabb7bc74..dd8d1d1385449 100644 --- a/drivers/irqchip/irq-msi-lib.h +++ b/include/linux/irqchip/irq-msi-lib.h @@ -2,8 +2,8 @@ // Copyright (C) 2022 Linutronix GmbH // Copyright (C) 2022 Intel =20 -#ifndef _DRIVERS_IRQCHIP_IRQ_MSI_LIB_H -#define _DRIVERS_IRQCHIP_IRQ_MSI_LIB_H +#ifndef _IRQCHIP_IRQ_MSI_LIB_H +#define _IRQCHIP_IRQ_MSI_LIB_H =20 #include #include @@ -24,4 +24,4 @@ bool msi_lib_init_dev_msi_info(struct device *dev, struct= irq_domain *domain, struct irq_domain *real_parent, struct msi_domain_info *info); =20 -#endif /* _DRIVERS_IRQCHIP_IRQ_MSI_LIB_H */ +#endif /* _IRQCHIP_IRQ_MSI_LIB_H */ --=20 2.39.2 From nobody Thu Dec 18 20:15:58 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AE53C2BE7CA; Tue, 13 May 2025 17:28:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747157310; cv=none; b=VFugc8Q0ANdOsi6jLW+YW8f5OseNzCJ973sNPxi3TzXZy6f8XT2h4yr8i4H7CmStbPFtsOFwJSDCFdlcF6lMmqk7MSzLSy6+J7v29ndeP2t7j10IhsW5UT8wBLWMXoF2SiTiRV3/OIUT6nfi1Y05APSJnxC5ri8dLF7bPzEU6xU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747157310; c=relaxed/simple; bh=S6Ff81MD23ujzW5xAirjeHQsiPS7s/q55XaQYWojlYc=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; 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Tue, 13 May 2025 18:28:28 +0100 From: Marc Zyngier To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org Cc: Thomas Gleixner , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Manivannan Sadhasivam , Bjorn Helgaas , Toan Le , Alyssa Rosenzweig , Thierry Reding , Jonathan Hunter Subject: [PATCH v2 2/9] genirq/msi: Add helper for creating MSI-parent irq domains Date: Tue, 13 May 2025 18:28:12 +0100 Message-Id: <20250513172819.2216709-3-maz@kernel.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20250513172819.2216709-1-maz@kernel.org> References: <20250513172819.2216709-1-maz@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org, tglx@linutronix.de, andrew@lunn.ch, gregory.clement@bootlin.com, sebastian.hesselbarth@gmail.com, lpieralisi@kernel.org, kw@linux.com, manivannan.sadhasivam@linaro.org, bhelgaas@google.com, toan@os.amperecomputing.com, alyssa@rosenzweig.io, thierry.reding@gmail.com, jonathanh@nvidia.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Content-Type: text/plain; charset="utf-8" Creating an irq domain that serves as an MSI parent requires a substantial amount of esoteric boiler-plate code, some of which is often provided twice (such as the bus token). To make things a bit simpler for the unsuspecting MSI tinkerer, provide a helper that does it for them, and serves as documentation of what needs to be provided. Signed-off-by: Marc Zyngier --- include/linux/msi.h | 4 ++++ kernel/irq/msi.c | 26 ++++++++++++++++++++++++++ 2 files changed, 30 insertions(+) diff --git a/include/linux/msi.h b/include/linux/msi.h index 8c0ec9fc05a39..56c69d14ef4a2 100644 --- a/include/linux/msi.h +++ b/include/linux/msi.h @@ -628,6 +628,10 @@ struct irq_domain *msi_create_irq_domain(struct fwnode= _handle *fwnode, struct msi_domain_info *info, struct irq_domain *parent); =20 +struct irq_domain_info; +struct irq_domain *msi_create_parent_irq_domain(struct irq_domain_info *in= fo, + const struct msi_parent_ops *msi_parent_ops); + bool msi_create_device_irq_domain(struct device *dev, unsigned int domid, const struct msi_domain_template *template, unsigned int hwsize, void *domain_data, diff --git a/kernel/irq/msi.c b/kernel/irq/msi.c index a8f7701c2929f..e702e536c8034 100644 --- a/kernel/irq/msi.c +++ b/kernel/irq/msi.c @@ -903,6 +903,32 @@ struct irq_domain *msi_create_irq_domain(struct fwnode= _handle *fwnode, return __msi_create_irq_domain(fwnode, info, 0, parent); } =20 +/** + * msi_create_parent_irq_domain - Create an MSI-parent interrupt domain + * @info: MSI irqdomain creation info + * @msi_parent_ops: MSI parent callbacks and configuration + * + * Return: pointer to the created &struct irq_domain or %NULL on failure + */ +struct irq_domain *msi_create_parent_irq_domain(struct irq_domain_info *in= fo, + const struct msi_parent_ops *msi_parent_ops) +{ + struct irq_domain *d; + + info->hwirq_max =3D max(info->hwirq_max, info->size); + info->size =3D info->hwirq_max; + info->domain_flags |=3D IRQ_DOMAIN_FLAG_MSI_PARENT; + info->bus_token =3D msi_parent_ops->bus_select_token; + + d =3D irq_domain_instantiate(info); + if (IS_ERR(d)) + return NULL; + + d->msi_parent_ops =3D msi_parent_ops; + return d; +} +EXPORT_SYMBOL_GPL(msi_create_parent_irq_domain); + /** * msi_parent_init_dev_msi_info - Delegate initialization of device MSI in= fo down * in the domain hierarchy --=20 2.39.2 From nobody Thu Dec 18 20:15:58 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AE43B2BE7C4; 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SAEximRunCond expanded to false Content-Type: text/plain; charset="utf-8" Now that we have a concise helper to create an MSI parent domain, switch the GIC family over to that. Signed-off-by: Marc Zyngier --- drivers/irqchip/irq-gic-v2m.c | 12 +++++++----- drivers/irqchip/irq-gic-v3-its.c | 19 +++++++++---------- drivers/irqchip/irq-gic-v3-mbi.c | 11 ++++++----- 3 files changed, 22 insertions(+), 20 deletions(-) diff --git a/drivers/irqchip/irq-gic-v2m.c b/drivers/irqchip/irq-gic-v2m.c index 62676994d0695..9050792e3242f 100644 --- a/drivers/irqchip/irq-gic-v2m.c +++ b/drivers/irqchip/irq-gic-v2m.c @@ -268,16 +268,18 @@ static __init int gicv2m_allocate_domains(struct irq_= domain *parent) if (!v2m) return 0; =20 - inner_domain =3D irq_domain_create_hierarchy(parent, 0, 0, v2m->fwnode, - &gicv2m_domain_ops, v2m); + inner_domain =3D msi_create_parent_irq_domain(&(struct irq_domain_info){ + .fwnode =3D v2m->fwnode, + .ops =3D &gicv2m_domain_ops, + .host_data =3D v2m, + .parent =3D parent, + }, &gicv2m_msi_parent_ops); + if (!inner_domain) { pr_err("Failed to create GICv2m domain\n"); return -ENOMEM; } =20 - irq_domain_update_bus_token(inner_domain, DOMAIN_BUS_NEXUS); - inner_domain->flags |=3D IRQ_DOMAIN_FLAG_MSI_PARENT; - inner_domain->msi_parent_ops =3D &gicv2m_msi_parent_ops; return 0; } =20 diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-= its.c index 9e6380f597488..9ea3a6723263c 100644 --- a/drivers/irqchip/irq-gic-v3-its.c +++ b/drivers/irqchip/irq-gic-v3-its.c @@ -5128,20 +5128,19 @@ static int its_init_domain(struct its_node *its) info->ops =3D &its_msi_domain_ops; info->data =3D its; =20 - inner_domain =3D irq_domain_create_hierarchy(its_parent, - its->msi_domain_flags, 0, - its->fwnode_handle, &its_domain_ops, - info); + inner_domain =3D msi_create_parent_irq_domain(&(struct irq_domain_info){ + .fwnode =3D its->fwnode_handle, + .ops =3D &its_domain_ops, + .host_data =3D info, + .domain_flags =3D its->msi_domain_flags, + .parent =3D its_parent, + }, &gic_v3_its_msi_parent_ops); + if (!inner_domain) { kfree(info); return -ENOMEM; } =20 - irq_domain_update_bus_token(inner_domain, DOMAIN_BUS_NEXUS); - - inner_domain->msi_parent_ops =3D &gic_v3_its_msi_parent_ops; - inner_domain->flags |=3D IRQ_DOMAIN_FLAG_MSI_PARENT | IRQ_DOMAIN_FLAG_MSI= _IMMUTABLE; - return 0; } =20 @@ -5518,7 +5517,7 @@ static struct its_node __init *its_node_init(struct r= esource *res, its->base =3D its_base; its->phys_base =3D res->start; its->get_msi_base =3D its_irq_get_msi_base; - its->msi_domain_flags =3D IRQ_DOMAIN_FLAG_ISOLATED_MSI; + its->msi_domain_flags =3D IRQ_DOMAIN_FLAG_ISOLATED_MSI | IRQ_DOMAIN_FLAG_= MSI_IMMUTABLE; =20 its->numa_node =3D numa_node; its->fwnode_handle =3D handle; diff --git a/drivers/irqchip/irq-gic-v3-mbi.c b/drivers/irqchip/irq-gic-v3-= mbi.c index e562b57923229..11fa5df9da8c7 100644 --- a/drivers/irqchip/irq-gic-v3-mbi.c +++ b/drivers/irqchip/irq-gic-v3-mbi.c @@ -208,14 +208,15 @@ static int mbi_allocate_domain(struct irq_domain *par= ent) { struct irq_domain *nexus_domain; =20 - nexus_domain =3D irq_domain_create_hierarchy(parent, 0, 0, parent->fwnode, - &mbi_domain_ops, NULL); + nexus_domain =3D msi_create_parent_irq_domain(&(struct irq_domain_info){ + .fwnode =3D parent->fwnode, + .ops =3D &mbi_domain_ops, + .parent =3D parent, + }, &gic_v3_mbi_msi_parent_ops); + if (!nexus_domain) return -ENOMEM; =20 - irq_domain_update_bus_token(nexus_domain, DOMAIN_BUS_NEXUS); - nexus_domain->flags |=3D IRQ_DOMAIN_FLAG_MSI_PARENT; - nexus_domain->msi_parent_ops =3D &gic_v3_mbi_msi_parent_ops; return 0; } =20 --=20 2.39.2 From nobody Thu Dec 18 20:15:58 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9C3A62BF973; Tue, 13 May 2025 17:28:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747157311; cv=none; b=BhvoKXC7nvDPQJTTs8a3/X1ZsyfZcSalr97j1om7vNAD99YvlyXqva6HLiPWDhqFu9DjKX6CukX5o+6naVvVDHGqOYH630hUWvnmFEftRi+ImNtU2JueAiXhpx03nXTVP0QPFBfDTT7wJJa0rMJdAohpo4mqHq7RSgzxPFKOX+M= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; 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Tue, 13 May 2025 18:28:28 +0100 From: Marc Zyngier To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org Cc: Thomas Gleixner , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Manivannan Sadhasivam , Bjorn Helgaas , Toan Le , Alyssa Rosenzweig , Thierry Reding , Jonathan Hunter Subject: [PATCH v2 4/9] irqchip/mvebu: Convert to msi_create_parent_irq_domain() helper Date: Tue, 13 May 2025 18:28:14 +0100 Message-Id: <20250513172819.2216709-5-maz@kernel.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20250513172819.2216709-1-maz@kernel.org> References: <20250513172819.2216709-1-maz@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org, tglx@linutronix.de, andrew@lunn.ch, gregory.clement@bootlin.com, sebastian.hesselbarth@gmail.com, lpieralisi@kernel.org, kw@linux.com, manivannan.sadhasivam@linaro.org, bhelgaas@google.com, toan@os.amperecomputing.com, alyssa@rosenzweig.io, thierry.reding@gmail.com, jonathanh@nvidia.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Content-Type: text/plain; charset="utf-8" Now that we have a concise helper to create an MSI parent domain, switch the mvebu family of interrupt controllers over to that. Signed-off-by: Marc Zyngier --- drivers/irqchip/irq-mvebu-gicp.c | 14 +++++++------- drivers/irqchip/irq-mvebu-odmi.c | 14 ++++++-------- drivers/irqchip/irq-mvebu-sei.c | 16 +++++++--------- 3 files changed, 20 insertions(+), 24 deletions(-) diff --git a/drivers/irqchip/irq-mvebu-gicp.c b/drivers/irqchip/irq-mvebu-g= icp.c index 0b2a857b49018..c7c83f8923fcd 100644 --- a/drivers/irqchip/irq-mvebu-gicp.c +++ b/drivers/irqchip/irq-mvebu-gicp.c @@ -230,16 +230,16 @@ static int mvebu_gicp_probe(struct platform_device *p= dev) return -ENODEV; } =20 - inner_domain =3D irq_domain_create_hierarchy(parent_domain, 0, - gicp->spi_cnt, - of_node_to_fwnode(node), - &gicp_domain_ops, gicp); + inner_domain =3D msi_create_parent_irq_domain(&(struct irq_domain_info){ + .fwnode =3D of_node_to_fwnode(node), + .ops =3D &gicp_domain_ops, + .size =3D gicp->spi_cnt, + .host_data =3D gicp, + .parent =3D parent_domain, + }, &gicp_msi_parent_ops); if (!inner_domain) return -ENOMEM; =20 - irq_domain_update_bus_token(inner_domain, DOMAIN_BUS_GENERIC_MSI); - inner_domain->flags |=3D IRQ_DOMAIN_FLAG_MSI_PARENT; - inner_domain->msi_parent_ops =3D &gicp_msi_parent_ops; return 0; } =20 diff --git a/drivers/irqchip/irq-mvebu-odmi.c b/drivers/irqchip/irq-mvebu-o= dmi.c index 306a7754e44f8..e6049f647a017 100644 --- a/drivers/irqchip/irq-mvebu-odmi.c +++ b/drivers/irqchip/irq-mvebu-odmi.c @@ -205,19 +205,17 @@ static int __init mvebu_odmi_init(struct device_node = *node, =20 parent_domain =3D irq_find_host(parent); =20 - inner_domain =3D irq_domain_create_hierarchy(parent_domain, 0, - odmis_count * NODMIS_PER_FRAME, - of_node_to_fwnode(node), - &odmi_domain_ops, NULL); + inner_domain =3D msi_create_parent_irq_domain(&(struct irq_domain_info){ + .fwnode =3D of_node_to_fwnode(node), + .ops =3D &odmi_domain_ops, + .size =3D odmis_count * NODMIS_PER_FRAME, + .parent =3D parent_domain, + }, &odmi_msi_parent_ops); if (!inner_domain) { ret =3D -ENOMEM; goto err_unmap; } =20 - irq_domain_update_bus_token(inner_domain, DOMAIN_BUS_GENERIC_MSI); - inner_domain->flags |=3D IRQ_DOMAIN_FLAG_MSI_PARENT; - inner_domain->msi_parent_ops =3D &odmi_msi_parent_ops; - return 0; =20 err_unmap: diff --git a/drivers/irqchip/irq-mvebu-sei.c b/drivers/irqchip/irq-mvebu-se= i.c index a962ef4977169..cacf88530e444 100644 --- a/drivers/irqchip/irq-mvebu-sei.c +++ b/drivers/irqchip/irq-mvebu-sei.c @@ -430,21 +430,19 @@ static int mvebu_sei_probe(struct platform_device *pd= ev) irq_domain_update_bus_token(sei->ap_domain, DOMAIN_BUS_WIRED); =20 /* Create the 'MSI' domain */ - sei->cp_domain =3D irq_domain_create_hierarchy(sei->sei_domain, 0, - sei->caps->cp_range.size, - of_node_to_fwnode(node), - &mvebu_sei_cp_domain_ops, - sei); + sei->cp_domain =3D msi_create_parent_irq_domain(&(struct irq_domain_info){ + .fwnode =3D of_node_to_fwnode(node), + .ops =3D &mvebu_sei_cp_domain_ops, + .size =3D sei->caps->cp_range.size, + .host_data =3D sei, + .parent =3D sei->sei_domain, + }, &sei_msi_parent_ops); if (!sei->cp_domain) { pr_err("Failed to create CPs IRQ domain\n"); ret =3D -ENOMEM; goto remove_ap_domain; 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SAEximRunCond expanded to false Content-Type: text/plain; charset="utf-8" Commit 1c000dcaad2be ("irqchip/irq-msi-lib: Optionally set default irq_eoi()/irq_ack()") added blancket MSI_CHIP_FLAG_SET_ACK flags, irrespective of whether the underlying irqchip required it or not. Drop it from a number of drivers that do not require it. Fixes: 1c000dcaad2be ("irqchip/irq-msi-lib: Optionally set default irq_eoi(= )/irq_ack()") Signed-off-by: Marc Zyngier --- drivers/irqchip/irq-gic-v2m.c | 2 +- drivers/irqchip/irq-gic-v3-its-msi-parent.c | 2 +- drivers/irqchip/irq-gic-v3-mbi.c | 2 +- drivers/irqchip/irq-mvebu-gicp.c | 2 +- drivers/irqchip/irq-mvebu-odmi.c | 2 +- 5 files changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/irqchip/irq-gic-v2m.c b/drivers/irqchip/irq-gic-v2m.c index 9050792e3242f..e30463a7bf1ea 100644 --- a/drivers/irqchip/irq-gic-v2m.c +++ b/drivers/irqchip/irq-gic-v2m.c @@ -252,7 +252,7 @@ static void __init gicv2m_teardown(void) static struct msi_parent_ops gicv2m_msi_parent_ops =3D { .supported_flags =3D GICV2M_MSI_FLAGS_SUPPORTED, .required_flags =3D GICV2M_MSI_FLAGS_REQUIRED, - .chip_flags =3D MSI_CHIP_FLAG_SET_EOI | MSI_CHIP_FLAG_SET_ACK, + .chip_flags =3D MSI_CHIP_FLAG_SET_EOI, .bus_select_token =3D DOMAIN_BUS_NEXUS, .bus_select_mask =3D MATCH_PCI_MSI | MATCH_PLATFORM_MSI, .prefix =3D "GICv2m-", diff --git a/drivers/irqchip/irq-gic-v3-its-msi-parent.c b/drivers/irqchip/= irq-gic-v3-its-msi-parent.c index 51cc961bc3181..443e8fcf2fc16 100644 --- a/drivers/irqchip/irq-gic-v3-its-msi-parent.c +++ b/drivers/irqchip/irq-gic-v3-its-msi-parent.c @@ -211,7 +211,7 @@ static bool its_init_dev_msi_info(struct device *dev, s= truct irq_domain *domain, const struct msi_parent_ops gic_v3_its_msi_parent_ops =3D { .supported_flags =3D ITS_MSI_FLAGS_SUPPORTED, .required_flags =3D ITS_MSI_FLAGS_REQUIRED, - .chip_flags =3D MSI_CHIP_FLAG_SET_EOI | MSI_CHIP_FLAG_SET_ACK, + .chip_flags =3D MSI_CHIP_FLAG_SET_EOI, .bus_select_token =3D DOMAIN_BUS_NEXUS, .bus_select_mask =3D MATCH_PCI_MSI | MATCH_PLATFORM_MSI, .prefix =3D "ITS-", diff --git a/drivers/irqchip/irq-gic-v3-mbi.c b/drivers/irqchip/irq-gic-v3-= mbi.c index 11fa5df9da8c7..a9142677c810c 100644 --- a/drivers/irqchip/irq-gic-v3-mbi.c +++ b/drivers/irqchip/irq-gic-v3-mbi.c @@ -197,7 +197,7 @@ static bool mbi_init_dev_msi_info(struct device *dev, s= truct irq_domain *domain, static const struct msi_parent_ops gic_v3_mbi_msi_parent_ops =3D { .supported_flags =3D MBI_MSI_FLAGS_SUPPORTED, .required_flags =3D MBI_MSI_FLAGS_REQUIRED, - .chip_flags =3D MSI_CHIP_FLAG_SET_EOI | MSI_CHIP_FLAG_SET_ACK, + .chip_flags =3D MSI_CHIP_FLAG_SET_EOI, .bus_select_token =3D DOMAIN_BUS_NEXUS, .bus_select_mask =3D MATCH_PCI_MSI | MATCH_PLATFORM_MSI, .prefix =3D "MBI-", diff --git a/drivers/irqchip/irq-mvebu-gicp.c b/drivers/irqchip/irq-mvebu-g= icp.c index c7c83f8923fcd..68764e7754ba6 100644 --- a/drivers/irqchip/irq-mvebu-gicp.c +++ b/drivers/irqchip/irq-mvebu-gicp.c @@ -161,7 +161,7 @@ static const struct irq_domain_ops gicp_domain_ops =3D { static const struct msi_parent_ops gicp_msi_parent_ops =3D { .supported_flags =3D GICP_MSI_FLAGS_SUPPORTED, .required_flags =3D GICP_MSI_FLAGS_REQUIRED, - .chip_flags =3D MSI_CHIP_FLAG_SET_EOI | MSI_CHIP_FLAG_SET_ACK, + .chip_flags =3D MSI_CHIP_FLAG_SET_EOI, .bus_select_token =3D DOMAIN_BUS_GENERIC_MSI, .bus_select_mask =3D MATCH_PLATFORM_MSI, .prefix =3D "GICP-", diff --git a/drivers/irqchip/irq-mvebu-odmi.c b/drivers/irqchip/irq-mvebu-o= dmi.c index e6049f647a017..fe99888b8134d 100644 --- a/drivers/irqchip/irq-mvebu-odmi.c +++ b/drivers/irqchip/irq-mvebu-odmi.c @@ -157,7 +157,7 @@ static const struct irq_domain_ops odmi_domain_ops =3D { static const struct msi_parent_ops odmi_msi_parent_ops =3D { .supported_flags =3D ODMI_MSI_FLAGS_SUPPORTED, .required_flags =3D ODMI_MSI_FLAGS_REQUIRED, - .chip_flags =3D MSI_CHIP_FLAG_SET_EOI | MSI_CHIP_FLAG_SET_ACK, + .chip_flags =3D MSI_CHIP_FLAG_SET_EOI, .bus_select_token =3D DOMAIN_BUS_GENERIC_MSI, .bus_select_mask =3D MATCH_PLATFORM_MSI, .prefix =3D "ODMI-", --=20 2.39.2 From nobody Thu Dec 18 20:15:58 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9C2762BF970; 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SAEximRunCond expanded to false Content-Type: text/plain; charset="utf-8" Bad MSI implementations multiplex MSIs onto a single downstream interrupt, meaning they have no concept of individual affinity. The old MSI code did a reasonable job at this by honouring the MSI_FLAG_NO_AFFINITY, but the new shiny device MSI code doesn't. Teach it about the sad reality of existing hardware. Signed-off-by: Marc Zyngier --- drivers/irqchip/irq-msi-lib.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/irqchip/irq-msi-lib.c b/drivers/irqchip/irq-msi-lib.c index 2a61c06c4da07..246c30205af40 100644 --- a/drivers/irqchip/irq-msi-lib.c +++ b/drivers/irqchip/irq-msi-lib.c @@ -105,8 +105,13 @@ bool msi_lib_init_dev_msi_info(struct device *dev, str= uct irq_domain *domain, * MSI message into the hardware which is the whole purpose of the * device MSI domain aside of mask/unmask which is provided e.g. by * PCI/MSI device domains. + * + * The exception to the rule is when the underlying domain + * tells you that affinity is not a thing -- for example when + * everything is muxed behind a single interrupt. */ - chip->irq_set_affinity =3D msi_domain_set_affinity; + if (!chip->irq_set_affinity && !(info->flags & MSI_FLAG_NO_AFFINITY)) + chip->irq_set_affinity =3D msi_domain_set_affinity; return true; } EXPORT_SYMBOL_GPL(msi_lib_init_dev_msi_info); --=20 2.39.2 From nobody Thu Dec 18 20:15:58 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CAC2C2BF980; Tue, 13 May 2025 17:28:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747157311; cv=none; b=jZeiO4xcIZYgJFeTScTxTQBaWsPCR/2E1wyyBk2nrZOtj6Dc/KajdSFfEwYNaex85Fh/GqCDFcQ1xfBOfzMihh3SHZRFLXjPXGNqcCRuaA5mzYUp3yqZqzS0l3f32/B2t/DHo6g2YUjzMZ/M7u2x8t7Zrykh9rhh0XmZaQK150E= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747157311; c=relaxed/simple; bh=gmbXoFaITb4zPThfd6bxcc1micuU2rdahzJdEqv2nno=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=sNJSM8G9Nr+BRR0N/m47wk6dp8oknAQ00Etq091sbmgON1QP7cFjPtIAnEWeDtOn3GoYrmJkMFA4OigxNhrhBK8gSE6cuF3Pp+p9AfLH0yQ0UJBz9fp92JTspHX8JjOPKsUNGe485QBAcr07tpmy9GgRfnPR8Rpnmr6nIWCcZAI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=k7KjNaUp; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="k7KjNaUp" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 46325C4CEF2; Tue, 13 May 2025 17:28:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1747157311; bh=gmbXoFaITb4zPThfd6bxcc1micuU2rdahzJdEqv2nno=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=k7KjNaUpV8mqRS2Sqf10f9sz62ek6Q9bF4vxalN+DyghCKrrl70xK2jWvB2BpW1N8 CV57PM2MyqV0WxSRWpJjXn1lkKyoVf9mdmALnWghGPoDmUMvNeKXGX1yVvItGyJ5Hq rFT9DRuT9gxSY8QH+xu8yBih7YuVedUDPFVBo0XEi3IdbY1rp1prRW4vWh8loaDyJC xq4EK3bXihcKExnAqyiPtUCfrqUiuIfLZOrTmiQ0wB5YsMVzrC0RxYm+CzZ1NSRauM AAVnbOZWkLIkFmBVlrvnC92QEDYBWEl/jcoUFdClDbyETS3AHKyTGbo5OMnvGgNHUI C4N4lORsnX7KA== Received: from sofa.misterjones.org ([185.219.108.64] helo=valley-girl.lan) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1uEtQb-00EbRz-Et; Tue, 13 May 2025 18:28:29 +0100 From: Marc Zyngier To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org Cc: Thomas Gleixner , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Manivannan Sadhasivam , Bjorn Helgaas , Toan Le , Alyssa Rosenzweig , Thierry Reding , Jonathan Hunter Subject: [PATCH v2 7/9] PCI: apple: Convert to MSI parent infrastructure Date: Tue, 13 May 2025 18:28:17 +0100 Message-Id: <20250513172819.2216709-8-maz@kernel.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20250513172819.2216709-1-maz@kernel.org> References: <20250513172819.2216709-1-maz@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org, tglx@linutronix.de, andrew@lunn.ch, gregory.clement@bootlin.com, sebastian.hesselbarth@gmail.com, lpieralisi@kernel.org, kw@linux.com, manivannan.sadhasivam@linaro.org, bhelgaas@google.com, toan@os.amperecomputing.com, alyssa@rosenzweig.io, thierry.reding@gmail.com, jonathanh@nvidia.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Content-Type: text/plain; charset="utf-8" In an effort to move arm64 away from the legacy MSI setup, convert the apple PCIe driver to the MSI-parent infrastructure and let each device have its own MSI domain. Signed-off-by: Marc Zyngier Acked-by: Alyssa Rosenzweig --- drivers/pci/controller/Kconfig | 1 + drivers/pci/controller/pcie-apple.c | 62 ++++++++++------------------- 2 files changed, 22 insertions(+), 41 deletions(-) diff --git a/drivers/pci/controller/Kconfig b/drivers/pci/controller/Kconfig index 9800b76810540..98a62f4559dfd 100644 --- a/drivers/pci/controller/Kconfig +++ b/drivers/pci/controller/Kconfig @@ -40,6 +40,7 @@ config PCIE_APPLE depends on OF depends on PCI_MSI select PCI_HOST_COMMON + select IRQ_MSI_LIB help Say Y here if you want to enable PCIe controller support on Apple system-on-chips, like the Apple M1. This is required for the USB diff --git a/drivers/pci/controller/pcie-apple.c b/drivers/pci/controller/p= cie-apple.c index 18e11b9a7f464..6c88b4dd34151 100644 --- a/drivers/pci/controller/pcie-apple.c +++ b/drivers/pci/controller/pcie-apple.c @@ -22,6 +22,7 @@ #include #include #include +#include #include #include #include @@ -133,7 +134,6 @@ struct apple_pcie { struct mutex lock; struct device *dev; void __iomem *base; - struct irq_domain *domain; unsigned long *bitmap; struct list_head ports; struct completion event; @@ -162,27 +162,6 @@ static void rmw_clear(u32 clr, void __iomem *addr) writel_relaxed(readl_relaxed(addr) & ~clr, addr); } =20 -static void apple_msi_top_irq_mask(struct irq_data *d) -{ - pci_msi_mask_irq(d); - irq_chip_mask_parent(d); -} - -static void apple_msi_top_irq_unmask(struct irq_data *d) -{ - pci_msi_unmask_irq(d); - irq_chip_unmask_parent(d); -} - -static struct irq_chip apple_msi_top_chip =3D { - .name =3D "PCIe MSI", - .irq_mask =3D apple_msi_top_irq_mask, - .irq_unmask =3D apple_msi_top_irq_unmask, - .irq_eoi =3D irq_chip_eoi_parent, - .irq_set_affinity =3D irq_chip_set_affinity_parent, - .irq_set_type =3D irq_chip_set_type_parent, -}; - static void apple_msi_compose_msg(struct irq_data *data, struct msi_msg *m= sg) { msg->address_hi =3D upper_32_bits(DOORBELL_ADDR); @@ -226,8 +205,7 @@ static int apple_msi_domain_alloc(struct irq_domain *do= main, unsigned int virq, =20 for (i =3D 0; i < nr_irqs; i++) { irq_domain_set_hwirq_and_chip(domain, virq + i, hwirq + i, - &apple_msi_bottom_chip, - domain->host_data); + &apple_msi_bottom_chip, pcie); } =20 return 0; @@ -251,12 +229,6 @@ static const struct irq_domain_ops apple_msi_domain_op= s =3D { .free =3D apple_msi_domain_free, }; =20 -static struct msi_domain_info apple_msi_info =3D { - .flags =3D (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS | - MSI_FLAG_MULTI_PCI_MSI | MSI_FLAG_PCI_MSIX), - .chip =3D &apple_msi_top_chip, -}; - static void apple_port_irq_mask(struct irq_data *data) { struct apple_pcie_port *port =3D irq_data_get_irq_chip_data(data); @@ -595,6 +567,18 @@ static int apple_pcie_setup_port(struct apple_pcie *pc= ie, return 0; } =20 +static const struct msi_parent_ops apple_msi_parent_ops =3D { + .supported_flags =3D (MSI_GENERIC_FLAGS_MASK | + MSI_FLAG_PCI_MSIX | + MSI_FLAG_MULTI_PCI_MSI), + .required_flags =3D (MSI_FLAG_USE_DEF_DOM_OPS | + MSI_FLAG_USE_DEF_CHIP_OPS | + MSI_FLAG_PCI_MSI_MASK_PARENT), + .chip_flags =3D MSI_CHIP_FLAG_SET_EOI, + .bus_select_token =3D DOMAIN_BUS_PCI_MSI, + .init_dev_msi_info =3D msi_lib_init_dev_msi_info, +}; + static int apple_msi_init(struct apple_pcie *pcie) { struct fwnode_handle *fwnode =3D dev_fwnode(pcie->dev); @@ -625,21 +609,17 @@ static int apple_msi_init(struct apple_pcie *pcie) return -ENXIO; } =20 - parent =3D irq_domain_create_hierarchy(parent, 0, pcie->nvecs, fwnode, - &apple_msi_domain_ops, pcie); + parent =3D msi_create_parent_irq_domain(&(struct irq_domain_info){ + .fwnode =3D fwnode, + .ops =3D &apple_msi_domain_ops, + .size =3D pcie->nvecs, + .host_data =3D pcie, + .parent =3D parent, + }, &apple_msi_parent_ops); if (!parent) { dev_err(pcie->dev, "failed to create IRQ domain\n"); return -ENOMEM; } - irq_domain_update_bus_token(parent, DOMAIN_BUS_NEXUS); - - pcie->domain =3D pci_msi_create_irq_domain(fwnode, &apple_msi_info, - parent); - if (!pcie->domain) { - dev_err(pcie->dev, "failed to create MSI domain\n"); - irq_domain_remove(parent); - return -ENOMEM; - } =20 return 0; } --=20 2.39.2 From nobody Thu Dec 18 20:15:58 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CAC922BF981; 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SAEximRunCond expanded to false Content-Type: text/plain; charset="utf-8" In an effort to move arm64 away from the legacy MSI setup, convert the xgene PCIe driver to the MSI-parent infrastructure and let each device have its own MSI domain. Signed-off-by: Marc Zyngier --- drivers/pci/controller/Kconfig | 1 + drivers/pci/controller/pci-xgene-msi.c | 46 ++++++++++---------------- 2 files changed, 18 insertions(+), 29 deletions(-) diff --git a/drivers/pci/controller/Kconfig b/drivers/pci/controller/Kconfig index 98a62f4559dfd..205e0e365c6b1 100644 --- a/drivers/pci/controller/Kconfig +++ b/drivers/pci/controller/Kconfig @@ -304,6 +304,7 @@ config PCI_XGENE_MSI bool "X-Gene v1 PCIe MSI feature" depends on PCI_XGENE depends on PCI_MSI + select IRQ_MSI_LIB default y help Say Y here if you want PCIe MSI support for the APM X-Gene v1 SoC. diff --git a/drivers/pci/controller/pci-xgene-msi.c b/drivers/pci/controlle= r/pci-xgene-msi.c index 7bce327897c93..857177ab3d30f 100644 --- a/drivers/pci/controller/pci-xgene-msi.c +++ b/drivers/pci/controller/pci-xgene-msi.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include @@ -32,7 +33,6 @@ struct xgene_msi_group { struct xgene_msi { struct device_node *node; struct irq_domain *inner_domain; - struct irq_domain *msi_domain; u64 msi_addr; void __iomem *msi_regs; unsigned long *bitmap; @@ -44,20 +44,6 @@ struct xgene_msi { /* Global data */ static struct xgene_msi xgene_msi_ctrl; =20 -static struct irq_chip xgene_msi_top_irq_chip =3D { - .name =3D "X-Gene1 MSI", - .irq_enable =3D pci_msi_unmask_irq, - .irq_disable =3D pci_msi_mask_irq, - .irq_mask =3D pci_msi_mask_irq, - .irq_unmask =3D pci_msi_unmask_irq, -}; - -static struct msi_domain_info xgene_msi_domain_info =3D { - .flags =3D (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS | - MSI_FLAG_PCI_MSIX), - .chip =3D &xgene_msi_top_irq_chip, -}; - /* * X-Gene v1 has 16 groups of MSI termination registers MSInIRx, where * n is group number (0..F), x is index of registers in each group (0..7) @@ -235,34 +221,36 @@ static void xgene_irq_domain_free(struct irq_domain *= domain, irq_domain_free_irqs_parent(domain, virq, nr_irqs); } =20 -static const struct irq_domain_ops msi_domain_ops =3D { +static const struct irq_domain_ops xgene_msi_domain_ops =3D { .alloc =3D xgene_irq_domain_alloc, .free =3D xgene_irq_domain_free, }; =20 +static const struct msi_parent_ops xgene_msi_parent_ops =3D { + .supported_flags =3D (MSI_GENERIC_FLAGS_MASK | + MSI_FLAG_PCI_MSIX), + .required_flags =3D (MSI_FLAG_USE_DEF_DOM_OPS | + MSI_FLAG_USE_DEF_CHIP_OPS), + .bus_select_token =3D DOMAIN_BUS_PCI_MSI, + .init_dev_msi_info =3D msi_lib_init_dev_msi_info, +}; + static int xgene_allocate_domains(struct xgene_msi *msi) { - msi->inner_domain =3D irq_domain_add_linear(NULL, NR_MSI_VEC, - &msi_domain_ops, msi); + msi->inner_domain =3D msi_create_parent_irq_domain(&(struct irq_domain_in= fo){ + .fwnode =3D of_node_to_fwnode(msi->node), + .ops =3D &xgene_msi_domain_ops, + .size =3D NR_MSI_VEC, + .host_data =3D msi, + }, &xgene_msi_parent_ops); if (!msi->inner_domain) return -ENOMEM; =20 - msi->msi_domain =3D pci_msi_create_irq_domain(of_node_to_fwnode(msi->node= ), - &xgene_msi_domain_info, - msi->inner_domain); - - if (!msi->msi_domain) { - irq_domain_remove(msi->inner_domain); - return -ENOMEM; - } - return 0; } =20 static void xgene_free_domains(struct xgene_msi *msi) { - if (msi->msi_domain) - irq_domain_remove(msi->msi_domain); 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Tue, 13 May 2025 18:28:30 +0100 From: Marc Zyngier To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org Cc: Thomas Gleixner , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Manivannan Sadhasivam , Bjorn Helgaas , Toan Le , Alyssa Rosenzweig , Thierry Reding , Jonathan Hunter Subject: [PATCH v2 9/9] PCI: tegra: Convert to MSI parent infrastructure Date: Tue, 13 May 2025 18:28:19 +0100 Message-Id: <20250513172819.2216709-10-maz@kernel.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20250513172819.2216709-1-maz@kernel.org> References: <20250513172819.2216709-1-maz@kernel.org> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org, tglx@linutronix.de, andrew@lunn.ch, gregory.clement@bootlin.com, sebastian.hesselbarth@gmail.com, lpieralisi@kernel.org, kw@linux.com, manivannan.sadhasivam@linaro.org, bhelgaas@google.com, toan@os.amperecomputing.com, alyssa@rosenzweig.io, thierry.reding@gmail.com, jonathanh@nvidia.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false Content-Type: text/plain; charset="utf-8" In an effort to move arm64 away from the legacy MSI setup, convert the tegra PCIe driver to the MSI-parent infrastructure and let each device have its own MSI domain. Signed-off-by: Marc Zyngier --- drivers/pci/controller/Kconfig | 1 + drivers/pci/controller/pci-tegra.c | 60 +++++++++--------------------- 2 files changed, 19 insertions(+), 42 deletions(-) diff --git a/drivers/pci/controller/Kconfig b/drivers/pci/controller/Kconfig index 205e0e365c6b1..eb3cc28d43f82 100644 --- a/drivers/pci/controller/Kconfig +++ b/drivers/pci/controller/Kconfig @@ -228,6 +228,7 @@ config PCI_TEGRA bool "NVIDIA Tegra PCIe controller" depends on ARCH_TEGRA || COMPILE_TEST depends on PCI_MSI + select IRQ_MSI_LIB help Say Y here if you want support for the PCIe host controller found on NVIDIA Tegra SoCs. diff --git a/drivers/pci/controller/pci-tegra.c b/drivers/pci/controller/pc= i-tegra.c index d2f88997283ae..def9384bd6ff0 100644 --- a/drivers/pci/controller/pci-tegra.c +++ b/drivers/pci/controller/pci-tegra.c @@ -22,6 +22,7 @@ #include #include #include +#include #include #include #include @@ -1547,7 +1548,7 @@ static void tegra_pcie_msi_irq(struct irq_desc *desc) unsigned int index =3D i * 32 + offset; int ret; =20 - ret =3D generic_handle_domain_irq(msi->domain->parent, index); + ret =3D generic_handle_domain_irq(msi->domain, index); if (ret) { /* * that's weird who triggered this? @@ -1565,30 +1566,6 @@ static void tegra_pcie_msi_irq(struct irq_desc *desc) chained_irq_exit(chip, desc); } =20 -static void tegra_msi_top_irq_ack(struct irq_data *d) -{ - irq_chip_ack_parent(d); -} - -static void tegra_msi_top_irq_mask(struct irq_data *d) -{ - pci_msi_mask_irq(d); - irq_chip_mask_parent(d); -} - -static void tegra_msi_top_irq_unmask(struct irq_data *d) -{ - pci_msi_unmask_irq(d); - irq_chip_unmask_parent(d); -} - -static struct irq_chip tegra_msi_top_chip =3D { - .name =3D "Tegra PCIe MSI", - .irq_ack =3D tegra_msi_top_irq_ack, - .irq_mask =3D tegra_msi_top_irq_mask, - .irq_unmask =3D tegra_msi_top_irq_unmask, -}; - static void tegra_msi_irq_ack(struct irq_data *d) { struct tegra_msi *msi =3D irq_data_get_irq_chip_data(d); @@ -1690,30 +1667,32 @@ static const struct irq_domain_ops tegra_msi_domain= _ops =3D { .free =3D tegra_msi_domain_free, }; =20 -static struct msi_domain_info tegra_msi_info =3D { - .flags =3D MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS | - MSI_FLAG_NO_AFFINITY | MSI_FLAG_PCI_MSIX, - .chip =3D &tegra_msi_top_chip, +static const struct msi_parent_ops tegra_msi_parent_ops =3D { + .supported_flags =3D (MSI_GENERIC_FLAGS_MASK | + MSI_FLAG_PCI_MSIX), + .required_flags =3D (MSI_FLAG_USE_DEF_DOM_OPS | + MSI_FLAG_USE_DEF_CHIP_OPS | + MSI_FLAG_PCI_MSI_MASK_PARENT | + MSI_FLAG_NO_AFFINITY), + .chip_flags =3D MSI_CHIP_FLAG_SET_ACK, + .bus_select_token =3D DOMAIN_BUS_PCI_MSI, + .init_dev_msi_info =3D msi_lib_init_dev_msi_info, }; =20 static int tegra_allocate_domains(struct tegra_msi *msi) { struct tegra_pcie *pcie =3D msi_to_pcie(msi); struct fwnode_handle *fwnode =3D dev_fwnode(pcie->dev); - struct irq_domain *parent; =20 - parent =3D irq_domain_create_linear(fwnode, INT_PCI_MSI_NR, - &tegra_msi_domain_ops, msi); - if (!parent) { - dev_err(pcie->dev, "failed to create IRQ domain\n"); - return -ENOMEM; - } - irq_domain_update_bus_token(parent, DOMAIN_BUS_NEXUS); + msi->domain =3D msi_create_parent_irq_domain(&(struct irq_domain_info){ + .fwnode =3D fwnode, + .ops =3D &tegra_msi_domain_ops, + .size =3D INT_PCI_MSI_NR, + .host_data =3D msi, + }, &tegra_msi_parent_ops); =20 - msi->domain =3D pci_msi_create_irq_domain(fwnode, &tegra_msi_info, parent= ); if (!msi->domain) { dev_err(pcie->dev, "failed to create MSI domain\n"); - irq_domain_remove(parent); return -ENOMEM; } =20 @@ -1722,10 +1701,7 @@ static int tegra_allocate_domains(struct tegra_msi *= msi) =20 static void tegra_free_domains(struct tegra_msi *msi) { - struct irq_domain *parent =3D msi->domain->parent; - irq_domain_remove(msi->domain); - irq_domain_remove(parent); } =20 static int tegra_pcie_msi_setup(struct tegra_pcie *pcie) --=20 2.39.2