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Tue, 13 May 2025 04:12:16 -0700 (PDT) Date: Tue, 13 May 2025 13:12:01 +0200 In-Reply-To: <20250513111157.717727-8-ardb+git@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20250513111157.717727-8-ardb+git@google.com> X-Developer-Key: i=ardb@kernel.org; a=openpgp; fpr=F43D03328115A198C90016883D200E9CA6329909 X-Developer-Signature: v=1; a=openpgp-sha256; l=2966; i=ardb@kernel.org; h=from:subject; bh=dwocxnQDWmEMf8E6vMAUpfYBmpwDUYGcnjgv0Zwk36w=; b=owGbwMvMwCFmkMcZplerG8N4Wi2JIUNZk8ns9e0OhbzK1dfW2ct9aV7GaJLa4tsrZHS4NsiOm VH32/aOUhYGMQ4GWTFFFoHZf9/tPD1RqtZ5lizMHFYmkCEMXJwCMBHPOIZ/2i9exXQ9DD+itDL+ T8eZ7WwT74e+avNYueLArCnb7kUetWRkePWeM9WZeeHMywcKdCaUCMS0/vxaL8n7hHeZ45ed8b6 TGQE= X-Mailer: git-send-email 2.49.0.1045.g170613ef41-goog Message-ID: <20250513111157.717727-11-ardb+git@google.com> Subject: [RFC PATCH v2 3/6] x86/cpu: Allow caps to be set arbitrarily early From: Ard Biesheuvel To: linux-kernel@vger.kernel.org Cc: x86@kernel.org, Ard Biesheuvel , Ingo Molnar , Linus Torvalds Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Ard Biesheuvel cpu_feature_enabled() uses a ternary alternative, where the late variant is based on code patching and the early variant accesses the capability field in boot_cpu_data directly. This allows cpu_feature_enabled() to be called quite early, but it still requires that the CPU feature detection code runs before being able to rely on the return value of cpu_feature_enabled(). This is a problem for the implementation of pgtable_l5_enabled(), which is based on cpu_feature_enabled(X86_FEATURE_5LEVEL_PAGING), and may be called extremely early. Currently, there is a hacky workaround where some source files that may execute before (but also after) CPU feature detection have a different version of pgtable_l5_enabled(), based on the USE_EARLY_PGTABLE_L5 preprocessor macro. Instead, let's make it possible to set CPU feature arbitrarily early, so that the X86_FEATURE_5LEVEL_PAGING capability can be set before even entering C code. This involves relying on static initialization of boot_cpu_data and the cpu_caps_set/cpu_caps_cleared arrays, so they all need to reside in .data. This ensures that they won't be cleared along with the rest of BSS. Note that forcing a capability involves setting it in both boot_cpu_data.x86_capability[] and cpu_caps_set[]. Signed-off-by: Ard Biesheuvel --- arch/x86/kernel/cpu/common.c | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c index bbec5c4cd8ed..aaa6d9e51ef1 100644 --- a/arch/x86/kernel/cpu/common.c +++ b/arch/x86/kernel/cpu/common.c @@ -704,8 +704,8 @@ static const char *table_lookup_model(struct cpuinfo_x8= 6 *c) } =20 /* Aligned to unsigned long to avoid split lock in atomic bitmap ops */ -__u32 cpu_caps_cleared[NCAPINTS + NBUGINTS] __aligned(sizeof(unsigned long= )); -__u32 cpu_caps_set[NCAPINTS + NBUGINTS] __aligned(sizeof(unsigned long)); +__u32 __read_mostly cpu_caps_cleared[NCAPINTS + NBUGINTS] __aligned(sizeof= (unsigned long)); +__u32 __read_mostly cpu_caps_set[NCAPINTS + NBUGINTS] __aligned(sizeof(uns= igned long)); =20 #ifdef CONFIG_X86_32 /* The 32-bit entry code needs to find cpu_entry_area. */ @@ -1628,9 +1628,6 @@ static void __init cpu_parse_early_param(void) */ static void __init early_identify_cpu(struct cpuinfo_x86 *c) { - memset(&c->x86_capability, 0, sizeof(c->x86_capability)); - c->extended_cpuid_level =3D 0; - if (!have_cpuid_p()) identify_cpu_without_cpuid(c); =20 @@ -1842,7 +1839,8 @@ static void identify_cpu(struct cpuinfo_x86 *c) c->x86_virt_bits =3D 32; #endif c->x86_cache_alignment =3D c->x86_clflush_size; - memset(&c->x86_capability, 0, sizeof(c->x86_capability)); + if (c !=3D &boot_cpu_data) + memset(&c->x86_capability, 0, sizeof(c->x86_capability)); #ifdef CONFIG_X86_VMX_FEATURE_NAMES memset(&c->vmx_capability, 0, sizeof(c->vmx_capability)); #endif --=20 2.49.0.1045.g170613ef41-goog