From nobody Sat Feb 7 11:30:52 2026 Received: from smtpbgjp3.qq.com (smtpbgjp3.qq.com [54.92.39.34]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8D1A913E02A; Tue, 13 May 2025 01:21:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=54.92.39.34 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747099281; cv=none; b=O2eBGkojn8ifXd88E+x/Y16TaNpzEYAsTwLXk4xCfxBIExH8YjImptPKJZOhh4Z8zUT4gH29BmaTdEKytjIehaAtJSM3lVQjbhXqnnOR4p7aqk8jtaO5S2MFahUtynfxetTSNYDuoSUjH0SU+/FlhL/2HOYHRtD3VCl+2PiGPfw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1747099281; c=relaxed/simple; bh=vqGigXA8EmHjZv5xyB30aWNaNpthSwxwCcCPPSpr5jA=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References; b=Ekp/NltFPWttpM4wJ0XQ7M4m8XRH6dFoY0QwLvXrfIeObJ4qD8/bmMexU1Xp00DqcrQ7n7fTl9cas+xge6q/mriP5dtOv3vrXQjR9qcxkRgxLUPCWXsRoJOP0Ql4dX0VrowcsmdgsZQ4xJaUK9ywezUec7K7qLBzhkdg40x8p08= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=airkyi.com; spf=pass smtp.mailfrom=airkyi.com; dkim=pass (1024-bit key) header.d=airkyi.com header.i=@airkyi.com header.b=QNaS7GC/; arc=none smtp.client-ip=54.92.39.34 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=airkyi.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=airkyi.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=airkyi.com header.i=@airkyi.com header.b="QNaS7GC/" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=airkyi.com; s=altu2504; t=1747099217; bh=975XiWevg8IyB7+oWu6bLHHS0g5LCqgBcM0TSyV2q3I=; h=From:To:Subject:Date:Message-Id; b=QNaS7GC/PsSBWhvDyVSDDuCwdGPrDRtWyP92G4EpAvPqHuwzDvzcS5SlcgYwzUYXw 5J9dbP9YMOTf4cr9CDPKbSHiXFVYlnLqc+0XvMHLxo5f2er/33YX8EbgYA81U5jQRq dNLnz+HiC1mhIL63IGp8ylubkpaqL3DDwX5tQO8Q= X-QQ-mid: zesmtpgz8t1747099216t17baa3c6 X-QQ-Originating-IP: ogzTGvVk3wO9+hitY6L5I6pPS+CPHubTZFIWMmaa6Gw= Received: from DESKTOP-8BT1A2O.localdomain ( [58.22.7.114]) by bizesmtp.qq.com (ESMTP) with id ; Tue, 13 May 2025 09:20:11 +0800 (CST) X-QQ-SSF: 0000000000000000000000000000000 X-QQ-GoodBg: 0 X-BIZMAIL-ID: 8353147344841585000 From: Chaoyi Chen To: Sandy Huang , Heiko Stuebner , Andy Yan , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Chaoyi Chen , Dragan Simic , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 1/2] arm64: dts: rockchip: Improve coding style for rk3399 cdn_dp Date: Tue, 13 May 2025 09:19:03 +0800 Message-Id: <20250513011904.102-2-kernel@airkyi.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20250513011904.102-1-kernel@airkyi.com> References: <20250513011904.102-1-kernel@airkyi.com> X-QQ-SENDSIZE: 520 Feedback-ID: zesmtpgz:airkyi.com:qybglogicsvrsz:qybglogicsvrsz4a-0 X-QQ-XMAILINFO: NcfXIs+Ms1qHkJBy+DkuIZkVL0euOXaCO/4/GEZg9K3G9TUtaH4bww1S t4W96OadWm3FMZzE8kYqtC2Vd3iooXRS/woQfl9HBfJ+q7GN4alYWq3YcJppHkZv+9rE7oy fxRSJKeyXejwTM9GemkGFqDGsEiG33nhKi38s3hHJp79cNZXXZDOMT+gqnK/WrcPfgK+h7O N+h7AFTgTNo4jqO7FSFWKHM9w8b7zSl5t6Es642F8ggzb3D8VyCCFq68rrwd8dnKEOsdcid cUM+Mh9CUshyx1Muh5Ed1Y+RJCRF9LDv3Le4EpHCiPCNdLGu+9Bpbnlm9LkMo/JXczOIlne QDLc34/khxV45CtI+Z790xcXylAY1I9jxBIaTxi0aUAex/WNwi2zJNmO5GvdHGUMgMbd48y k+RdFA/TX/bAOF5CkMXWQoW9uxUycylwGovB4SgG+gxsewXGYD9miAjfvGsuLN8nAIUMQDL inDrVp/g4q/igHjBgK7CQ4PTAFer2f1kBZyp8SETB14Ff7TUvsFxq2QerNtLruuRYLtJ70K EbaUYvpsxNjtTkSlF1yajP6TBqWRwm0trIH+f60X2Ku4+nC5c1KlT7Bd+6yQ9MJgZ2Ozq0/ dK8Y2rp9QXbD5kiei0w4tn+mW170Jr0ViCjNw5bZIXqUkZje3Zkqvur/9h6acrUyTahSk6E zsv5hCXn4iP189oH1MGiF5uKbOcByO9sz7DGB/1WLRInnkHFOZR0+obF6p/9QpUNQBPK7T+ ebKnf7hHysBpx/slizbQzSJOkyw/k6oY2ejMRaXECFn+fT2+KWT7t2+gZzlz3ctERmeMKNH vOkE1m1ILIrERXcWk7u54R8OsthvRzeMNWhf7QDsKxq4Fi4neq42BfBTcdxs6HIhjopAWTn MmNGZDiOCzHsiDy/A9jCauUXVxjjBzzxVq2nvIQK1KOtZIJvuBYW/vO59HbJoxYoh8CaHbq x+apups8lsbLS8IpccxM7d3GN X-QQ-XMRINFO: NI4Ajvh11aEj8Xl/2s1/T8w= X-QQ-RECHKSPAM: 0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Chaoyi Chen Let's make the ports nodes of cdn_dp in the same style as the other display interface, and match the style of ports's yaml. Signed-off-by: Chaoyi Chen --- (no changes since v1) arch/arm64/boot/dts/rockchip/rk3399-base.dtsi | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3399-base.dtsi b/arch/arm64/boo= t/dts/rockchip/rk3399-base.dtsi index 9d5f5b083e3c..e340b6df7445 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-base.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399-base.dtsi @@ -618,7 +618,11 @@ cdn_dp: dp@fec00000 { status =3D "disabled"; ports { - dp_in: port { + #address-cells =3D <1>; + #size-cells =3D <0>; + + dp_in: port@0 { + reg =3D <0>; #address-cells =3D <1>; #size-cells =3D <0>; @@ -632,6 +636,10 @@ dp_in_vopl: endpoint@1 { remote-endpoint =3D <&vopl_out_dp>; }; }; + + dp_out: port@1 { + reg =3D <1>; + }; }; }; -- 2.49.0 From nobody Sat Feb 7 11:30:52 2026 Received: from smtpbguseast2.qq.com (smtpbguseast2.qq.com [54.204.34.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id BF998155382; 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charset="utf-8" From: Chaoyi Chen Convert cdn-dp-rockchip.txt to yaml. Signed-off-by: Chaoyi Chen --- Changes in v3: - Add more description about phy/extcon - Fix some coding style Changes in v2: - Rename binding file name to match compatible - Add more description about grf/phy/extcon - Fix coding style .../display/rockchip/cdn-dp-rockchip.txt | 74 -------- .../rockchip/rockchip,rk3399-cdn-dp.yaml | 165 ++++++++++++++++++ 2 files changed, 165 insertions(+), 74 deletions(-) delete mode 100644 Documentation/devicetree/bindings/display/rockchip/cdn-= dp-rockchip.txt create mode 100644 Documentation/devicetree/bindings/display/rockchip/rock= chip,rk3399-cdn-dp.yaml diff --git a/Documentation/devicetree/bindings/display/rockchip/cdn-dp-rock= chip.txt b/Documentation/devicetree/bindings/display/rockchip/cdn-dp-rockch= ip.txt deleted file mode 100644 index 8df7d2e393d6..000000000000 --- a/Documentation/devicetree/bindings/display/rockchip/cdn-dp-rockchip.txt +++ /dev/null @@ -1,74 +0,0 @@ -Rockchip RK3399 specific extensions to the cdn Display Port -=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D - -Required properties: -- compatible: must be "rockchip,rk3399-cdn-dp" - -- reg: physical base address of the controller and length - -- clocks: from common clock binding: handle to dp clock. - -- clock-names: from common clock binding: - Required elements: "core-clk" "pclk" "spdif" "grf" - -- resets : a list of phandle + reset specifier pairs -- reset-names : string of reset names - Required elements: "apb", "core", "dptx", "spdif" -- power-domains : power-domain property defined with a phandle - to respective power domain. -- assigned-clocks: main clock, should be <&cru SCLK_DP_CORE> -- assigned-clock-rates : the DP core clk frequency, shall be: 100000000 - -- rockchip,grf: this soc should set GRF regs, so need get grf here. - -- ports: contain a port nodes with endpoint definitions as defined in - Documentation/devicetree/bindings/media/video-interfaces.txt. - contained 2 endpoints, connecting to the output of vop. - -- phys: from general PHY binding: the phandle for the PHY device. - -- extcon: extcon specifier for the Power Delivery - -- #sound-dai-cells =3D it must be 1 if your system is using 2 DAIs: I2S, S= PDIF - ---------------------------------------------------------------------------= ----- - -Example: - cdn_dp: dp@fec00000 { - compatible =3D "rockchip,rk3399-cdn-dp"; - reg =3D <0x0 0xfec00000 0x0 0x100000>; - interrupts =3D ; - clocks =3D <&cru SCLK_DP_CORE>, <&cru PCLK_DP_CTRL>, - <&cru SCLK_SPDIF_REC_DPTX>, <&cru PCLK_VIO_GRF>; - clock-names =3D "core-clk", "pclk", "spdif", "grf"; - assigned-clocks =3D <&cru SCLK_DP_CORE>; - assigned-clock-rates =3D <100000000>; - power-domains =3D <&power RK3399_PD_HDCP>; - phys =3D <&tcphy0_dp>, <&tcphy1_dp>; - resets =3D <&cru SRST_DPTX_SPDIF_REC>; - reset-names =3D "spdif"; - extcon =3D <&fusb0>, <&fusb1>; - rockchip,grf =3D <&grf>; - #address-cells =3D <1>; - #size-cells =3D <0>; - #sound-dai-cells =3D <1>; - - ports { - #address-cells =3D <1>; - #size-cells =3D <0>; - - dp_in: port { - #address-cells =3D <1>; - #size-cells =3D <0>; - dp_in_vopb: endpoint@0 { - reg =3D <0>; - remote-endpoint =3D <&vopb_out_dp>; - }; - - dp_in_vopl: endpoint@1 { - reg =3D <1>; - remote-endpoint =3D <&vopl_out_dp>; - }; - }; - }; - }; diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,rk= 3399-cdn-dp.yaml b/Documentation/devicetree/bindings/display/rockchip/rockc= hip,rk3399-cdn-dp.yaml new file mode 100644 index 000000000000..7c2225204de2 --- /dev/null +++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3399-cd= n-dp.yaml @@ -0,0 +1,165 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/rockchip/rockchip,rk3399-cdn-dp= .yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip RK3399 specific extensions to the CDN Display Port + +maintainers: + - Andy Yan + - Heiko Stuebner + - Sandy Huang + +allOf: + - $ref: /schemas/sound/dai-common.yaml# + +properties: + compatible: + items: + - const: rockchip,rk3399-cdn-dp + + reg: + maxItems: 1 + + clocks: + items: + - description: DP core work clock + - description: APB clock + - description: SPDIF interface clock + - description: GRF clock + + clock-names: + items: + - const: core-clk + - const: pclk + - const: spdif + - const: grf + + extcon: + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + maxItems: 1 + maxItems: 2 + description: + List of phandle to the extcon device providing the cable state for t= he DP PHY. + + interrupts: + maxItems: 1 + + phys: + items: + maxItems: 1 + maxItems: 2 + description: | + List of phandle to the PHY device for DP output. + RK3399 have two DP-TPYEC PHY, specifying one PHY which want to use, + or specify two PHYs here to let the driver determine which PHY to us= e. + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + properties: + port@0: + $ref: /schemas/graph.yaml#/properties/port + description: Input of the CDN DP + properties: + endpoint@0: + description: Connection to the VOPB + endpoint@1: + description: Connection to the VOPL + port@1: + $ref: /schemas/graph.yaml#/properties/port + description: Output of the CDN DP + + required: + - port@0 + - port@1 + + power-domains: + maxItems: 1 + + resets: + maxItems: 4 + + reset-names: + items: + - const: spdif + - const: dptx + - const: apb + - const: core + + rockchip,grf: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Phandle to GRF register to control HPD. + + "#sound-dai-cells": + const: 1 + +required: + - compatible + - reg + - clocks + - clock-names + - interrupts + - phys + - ports + - resets + - reset-names + - rockchip,grf + +unevaluatedProperties: false + +examples: + - | + #include + #include + #include + soc { + #address-cells =3D <2>; + #size-cells =3D <2>; + + dp@fec00000 { + compatible =3D "rockchip,rk3399-cdn-dp"; + reg =3D <0x0 0xfec00000 0x0 0x100000>; + assigned-clocks =3D <&cru SCLK_DP_CORE>; + assigned-clock-rates =3D <100000000>; + interrupts =3D ; + clocks =3D <&cru SCLK_DP_CORE>, <&cru PCLK_DP_CTRL>, <&cru SCL= K_SPDIF_REC_DPTX>, + <&cru PCLK_VIO_GRF>; + clock-names =3D "core-clk", "pclk", "spdif", "grf"; + power-domains =3D <&power RK3399_PD_HDCP>; + phys =3D <&tcphy0_dp>, <&tcphy1_dp>; + resets =3D <&cru SRST_DPTX_SPDIF_REC>, <&cru SRST_P_UPHY0_DPTX= >, + <&cru SRST_P_UPHY0_APB>, <&cru SRST_DP_CORE>; + reset-names =3D "spdif", "dptx", "apb", "core"; + rockchip,grf =3D <&grf>; + #sound-dai-cells =3D <1>; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + dp_in: port@0 { + reg =3D <0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + dp_in_vopb: endpoint@0 { + reg =3D <0>; + remote-endpoint =3D <&vopb_out_dp>; + }; + + dp_in_vopl: endpoint@1 { + reg =3D <1>; + remote-endpoint =3D <&vopl_out_dp>; + }; + }; + + dp_out: port@1 { + reg =3D <1>; + }; + }; + }; + }; -- 2.49.0