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[96.255.20.42]) by smtp.gmail.com with ESMTPSA id d75a77b69052e-49452583961sm52461791cf.58.2025.05.12.09.21.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 May 2025 09:21:43 -0700 (PDT) From: Gregory Price To: linux-cxl@vger.kernel.org Cc: linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, kernel-team@meta.com, dave@stgolabs.net, jonathan.cameron@huawei.com, dave.jiang@intel.com, alison.schofield@intel.com, vishal.l.verma@intel.com, ira.weiny@intel.com, dan.j.williams@intel.com, corbet@lwn.net Subject: [PATCH v3 01/17] cxl: update documentation structure in prep for new docs Date: Mon, 12 May 2025 12:21:18 -0400 Message-ID: <20250512162134.3596150-2-gourry@gourry.net> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250512162134.3596150-1-gourry@gourry.net> References: <20250512162134.3596150-1-gourry@gourry.net> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Restructure the cxl folder to make adding docs per-page cleaner. Signed-off-by: Gregory Price Reviewed-by: Dave Jiang --- Documentation/driver-api/cxl/index.rst | 16 +++++++++++++--- .../cxl/{ =3D> linux}/access-coordinates.rst | 0 ...emory-devices.rst =3D> theory-of-operation.rst} | 10 +++++----- 3 files changed, 18 insertions(+), 8 deletions(-) rename Documentation/driver-api/cxl/{ =3D> linux}/access-coordinates.rst (= 100%) rename Documentation/driver-api/cxl/{memory-devices.rst =3D> theory-of-ope= ration.rst} (98%) diff --git a/Documentation/driver-api/cxl/index.rst b/Documentation/driver-= api/cxl/index.rst index 965ba90e8fb7..fe1594dc6778 100644 --- a/Documentation/driver-api/cxl/index.rst +++ b/Documentation/driver-api/cxl/index.rst @@ -4,12 +4,22 @@ Compute Express Link =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D =20 +CXL device configuration has a complex handoff between platform (Hardware, +BIOS, EFI), OS (early boot, core kernel, driver), and user policy decisions +that have impacts on each other. The docs here break up configurations st= eps. + +.. toctree:: + :maxdepth: 2 + :caption: Overview + + theory-of-operation + maturity-map + .. toctree:: :maxdepth: 1 + :caption: Linux Kernel Configuration =20 - memory-devices - access-coordinates + linux/access-coordinates =20 - maturity-map =20 .. only:: subproject and html diff --git a/Documentation/driver-api/cxl/access-coordinates.rst b/Document= ation/driver-api/cxl/linux/access-coordinates.rst similarity index 100% rename from Documentation/driver-api/cxl/access-coordinates.rst rename to Documentation/driver-api/cxl/linux/access-coordinates.rst diff --git a/Documentation/driver-api/cxl/memory-devices.rst b/Documentatio= n/driver-api/cxl/theory-of-operation.rst similarity index 98% rename from Documentation/driver-api/cxl/memory-devices.rst rename to Documentation/driver-api/cxl/theory-of-operation.rst index d732c42526df..32739e253453 100644 --- a/Documentation/driver-api/cxl/memory-devices.rst +++ b/Documentation/driver-api/cxl/theory-of-operation.rst @@ -1,9 +1,9 @@ .. SPDX-License-Identifier: GPL-2.0 .. include:: =20 -=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D -Compute Express Link Memory Devices -=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D +Compute Express Link Driver Theory of Operation +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D =20 A Compute Express Link Memory Device is a CXL component that implements the CXL.mem protocol. It contains some amount of volatile memory, persistent m= emory, @@ -14,8 +14,8 @@ that optionally define a device's contribution to an inte= rleaved address range across multiple devices underneath a host-bridge or interleaved across host-bridges. =20 -CXL Bus: Theory of Operation -=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D +The CXL Bus +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D Similar to how a RAID driver takes disk objects and assembles them into a = new logical device, the CXL subsystem is tasked to take PCIe and ACPI objects = and assemble them into a CXL.mem decode topology. The need for runtime configu= ration --=20 2.49.0