From nobody Tue Oct 7 18:49:28 2025 Received: from smtpbgeu2.qq.com (smtpbgeu2.qq.com [18.194.254.142]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3F3FA26A0AB; Fri, 9 May 2025 07:03:51 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=18.194.254.142 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746774236; cv=none; b=HWmoB0h2ts7gvoBQ/qCdA9G4Tq6etTgzXiIA1KN4Is6fEEqCn3nQLPyjmYuFfIvvqSsAvdqNbVNWFKp2nJea2ZGh3BkB7wjjyYHKtBYQhD96WzcW2+SzoAiBrcsaxi00cgn+v31A99yz8BJ6z+3MziodjkUgZ10W7Bwxv5ELbMI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746774236; c=relaxed/simple; bh=vqGigXA8EmHjZv5xyB30aWNaNpthSwxwCcCPPSpr5jA=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References; b=fwEpWUKKmuCH9AbvhPAxOxekH6oPntKOCGU/qzuLA2EyemTEjzZkiuw9/CKZQZ0RcjdkP/VDQYoRWyy2Ye3g/TuPUBz7SajCdurfeZwpXpj0uuyBfRiWcSJ9JSEoVyqoT7CM8JJHRT5fYp1nyrwxaYIBolv5wfSAVCE4RXq500w= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=airkyi.com; spf=pass smtp.mailfrom=airkyi.com; dkim=pass (1024-bit key) header.d=airkyi.com header.i=@airkyi.com header.b=AVI6UVSN; arc=none smtp.client-ip=18.194.254.142 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=airkyi.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=airkyi.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=airkyi.com header.i=@airkyi.com header.b="AVI6UVSN" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=airkyi.com; s=altu2504; t=1746774185; bh=975XiWevg8IyB7+oWu6bLHHS0g5LCqgBcM0TSyV2q3I=; h=From:To:Subject:Date:Message-Id; b=AVI6UVSNVa9NnAoqNA1uvl0vG4/WxN3CMDXcf106qzS1dpYDTHEO7kXsdxUEWUN7L 1mU2l/wt++hcO/HmSvwZCE4PeWWsF3UYLQLDTikq7vla6ys56aEU1JQFwCV1ChubYb gNSVpL0xDzVQVLbmZ83oGJWrAUXxtoRGU/S6iaaQ= X-QQ-mid: zesmtpsz9t1746774184t6495fff1 X-QQ-Originating-IP: 72XqEkqkGIqj0oHxXYEJJIT73eX1FhATDdwbuVl96Fo= Received: from DESKTOP-8BT1A2O.localdomain ( [58.22.7.114]) by bizesmtp.qq.com (ESMTP) with id ; Fri, 09 May 2025 15:03:01 +0800 (CST) X-QQ-SSF: 0000000000000000000000000000000 X-QQ-GoodBg: 0 X-BIZMAIL-ID: 18013972026225453354 From: Chaoyi Chen To: Sandy Huang , Heiko Stuebner , Andy Yan , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Chaoyi Chen , Dragan Simic , dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 1/2] arm64: dts: rockchip: Improve coding style for rk3399 cdn_dp Date: Fri, 9 May 2025 15:02:46 +0800 Message-Id: <20250509070247.868-2-kernel@airkyi.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20250509070247.868-1-kernel@airkyi.com> References: <20250509070247.868-1-kernel@airkyi.com> X-QQ-SENDSIZE: 520 Feedback-ID: zesmtpsz:airkyi.com:qybglogicsvrsz:qybglogicsvrsz4a-0 X-QQ-XMAILINFO: ORpsEWb2hdyl3Xg85DUhZGHVgKw/34d1DS8fdr7DfZncxXlsk7AhQEIb F/9rG3GxGsrfXrETmCc8c5SgKNc0T8eJGD8G3Sud6CLNqcZAHIp+ESs2emW6BF/gafrt2Po X/jokV4U1GDFxiPfUVEbwuUd4V5XmYAcUKTGW5ug7AKo9mb0QGCI6vVnCJqkzNmrKVQaWRJ shlX2EsGYjsrK4AdZA7lfcNyFRHetW/QEv85/3hGP4Nc54y8NYmAFa1uRbhfHgOPrnhFWd/ JmEZbYzQQ4jCVjgS/KlM0HPecr1lWY0LaQKBBNG0TOIDzvX3WDSZx5rACMCVkZTC4tymDaV WOF/Zi64P5bcpVXNUuF+cnM/Ni4NOcnuHHrsQ5RRaSNMjbAK44nRQy5iPCSH6susdl17/fd l1nadC43Q29nJEStSM6zsrl4risb3V6uAF9+zJ5ZKLMISPF6nWeA3oBSeLL6mj/gZaMie/n 43GJ6YDI5jM4IWUOYgNmsxdsuE8ehsbh3wOTClaNdesp+M6h9TDUW11W78WBXrphf+IVnHA 6nLoVVEkS1VLRxnK8wcoOy5xdT6/hsqWwah9hN89rucsxwwEt+qfZY2Q+yFxXEgT0PBillt QMfHA3wcU4zwI+fBUVXr7SsFQO1aLTK1JIc+eXJs+FfVllzPe307cr/nenpax1rRhkDJf3s ikLRwBap4Xx4vfrdJ9GquEA/BFaZljKxHlXQ+In2brsSKZQmAgLFR7JFQopDh6Ab7TtgGt2 hz/IPNmCJJ2b/KaP+1pU/ABd7eFHc/36/cGIvq42ORF6Flu7hel1lbblVT+/fR4ClzjPsPh 8qFuaoN1PIpnxDLs+9CXk6AcpYrScIuzoQLHlcSx3tkOaAfSHPq/+WjdpLSRCcGUh/fCVdZ SubTaIX6zI7xZhzGB09vrlcwFesITAWqbv93J9eh4Kd/9VYP5FscaApiBzsGewGA4RXyUAI fxc8j5XU8KRqyT/L9KblbcDReCkcwjLDDl9iYxjs0KuwW+X5qeEKE+GLVw6O4iZZwbUp6DU RVEIHtVQ== X-QQ-XMRINFO: NS+P29fieYNw95Bth2bWPxk= X-QQ-RECHKSPAM: 0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Chaoyi Chen Let's make the ports nodes of cdn_dp in the same style as the other display interface, and match the style of ports's yaml. Signed-off-by: Chaoyi Chen --- (no changes since v1) arch/arm64/boot/dts/rockchip/rk3399-base.dtsi | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3399-base.dtsi b/arch/arm64/boo= t/dts/rockchip/rk3399-base.dtsi index 9d5f5b083e3c..e340b6df7445 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-base.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399-base.dtsi @@ -618,7 +618,11 @@ cdn_dp: dp@fec00000 { status =3D "disabled"; ports { - dp_in: port { + #address-cells =3D <1>; + #size-cells =3D <0>; + + dp_in: port@0 { + reg =3D <0>; #address-cells =3D <1>; #size-cells =3D <0>; @@ -632,6 +636,10 @@ dp_in_vopl: endpoint@1 { remote-endpoint =3D <&vopl_out_dp>; }; }; + + dp_out: port@1 { + reg =3D <1>; + }; }; }; -- 2.49.0 From nobody Tue Oct 7 18:49:28 2025 Received: from bg4.exmail.qq.com (bg4.exmail.qq.com [43.154.54.12]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C15532550DD; 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charset="utf-8" From: Chaoyi Chen Convert cdn-dp-rockchip.txt to yaml. Signed-off-by: Chaoyi Chen --- Changes in v2: - Rename binding file name to match compatible - Add more description about grf/phy/extcon - Fix coding style .../display/rockchip/cdn-dp-rockchip.txt | 74 -------- .../rockchip/rockchip,rk3399-cdn-dp.yaml | 158 ++++++++++++++++++ 2 files changed, 158 insertions(+), 74 deletions(-) delete mode 100644 Documentation/devicetree/bindings/display/rockchip/cdn-= dp-rockchip.txt create mode 100644 Documentation/devicetree/bindings/display/rockchip/rock= chip,rk3399-cdn-dp.yaml diff --git a/Documentation/devicetree/bindings/display/rockchip/cdn-dp-rock= chip.txt b/Documentation/devicetree/bindings/display/rockchip/cdn-dp-rockch= ip.txt deleted file mode 100644 index 8df7d2e393d6..000000000000 --- a/Documentation/devicetree/bindings/display/rockchip/cdn-dp-rockchip.txt +++ /dev/null @@ -1,74 +0,0 @@ -Rockchip RK3399 specific extensions to the cdn Display Port -=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D - -Required properties: -- compatible: must be "rockchip,rk3399-cdn-dp" - -- reg: physical base address of the controller and length - -- clocks: from common clock binding: handle to dp clock. - -- clock-names: from common clock binding: - Required elements: "core-clk" "pclk" "spdif" "grf" - -- resets : a list of phandle + reset specifier pairs -- reset-names : string of reset names - Required elements: "apb", "core", "dptx", "spdif" -- power-domains : power-domain property defined with a phandle - to respective power domain. -- assigned-clocks: main clock, should be <&cru SCLK_DP_CORE> -- assigned-clock-rates : the DP core clk frequency, shall be: 100000000 - -- rockchip,grf: this soc should set GRF regs, so need get grf here. - -- ports: contain a port nodes with endpoint definitions as defined in - Documentation/devicetree/bindings/media/video-interfaces.txt. - contained 2 endpoints, connecting to the output of vop. - -- phys: from general PHY binding: the phandle for the PHY device. - -- extcon: extcon specifier for the Power Delivery - -- #sound-dai-cells =3D it must be 1 if your system is using 2 DAIs: I2S, S= PDIF - ---------------------------------------------------------------------------= ----- - -Example: - cdn_dp: dp@fec00000 { - compatible =3D "rockchip,rk3399-cdn-dp"; - reg =3D <0x0 0xfec00000 0x0 0x100000>; - interrupts =3D ; - clocks =3D <&cru SCLK_DP_CORE>, <&cru PCLK_DP_CTRL>, - <&cru SCLK_SPDIF_REC_DPTX>, <&cru PCLK_VIO_GRF>; - clock-names =3D "core-clk", "pclk", "spdif", "grf"; - assigned-clocks =3D <&cru SCLK_DP_CORE>; - assigned-clock-rates =3D <100000000>; - power-domains =3D <&power RK3399_PD_HDCP>; - phys =3D <&tcphy0_dp>, <&tcphy1_dp>; - resets =3D <&cru SRST_DPTX_SPDIF_REC>; - reset-names =3D "spdif"; - extcon =3D <&fusb0>, <&fusb1>; - rockchip,grf =3D <&grf>; - #address-cells =3D <1>; - #size-cells =3D <0>; - #sound-dai-cells =3D <1>; - - ports { - #address-cells =3D <1>; - #size-cells =3D <0>; - - dp_in: port { - #address-cells =3D <1>; - #size-cells =3D <0>; - dp_in_vopb: endpoint@0 { - reg =3D <0>; - remote-endpoint =3D <&vopb_out_dp>; - }; - - dp_in_vopl: endpoint@1 { - reg =3D <1>; - remote-endpoint =3D <&vopl_out_dp>; - }; - }; - }; - }; diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,rk= 3399-cdn-dp.yaml b/Documentation/devicetree/bindings/display/rockchip/rockc= hip,rk3399-cdn-dp.yaml new file mode 100644 index 000000000000..99d1f0ad9cda --- /dev/null +++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,rk3399-cd= n-dp.yaml @@ -0,0 +1,158 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/rockchip/rockchip,cdn-dp.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip RK3399 specific extensions to the CDN Display Port + +maintainers: + - Andy Yan + - Heiko Stuebner + - Sandy Huang + +allOf: + - $ref: /schemas/sound/dai-common.yaml# + +properties: + compatible: + items: + - const: rockchip,rk3399-cdn-dp + + reg: + maxItems: 1 + + clocks: + items: + - description: DP core work clock + - description: APB clock + - description: SPDIF interface clock + - description: GRF clock + + clock-names: + items: + - const: core-clk + - const: pclk + - const: spdif + - const: grf + + extcon: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: + Phandle to the extcon device providing the cable state for the DP PH= Y. + + interrupts: + maxItems: 1 + + phys: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: + Phandle to the PHY device for DP output. + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + properties: + port@0: + $ref: /schemas/graph.yaml#/properties/port + description: Input of the CDN DP + properties: + endpoint@0: + description: Connection to the VOPB + endpoint@1: + description: Connection to the VOPL + port@1: + $ref: /schemas/graph.yaml#/properties/port + description: Output of the CDN DP + + required: + - port@0 + - port@1 + + power-domains: + maxItems: 1 + + resets: + maxItems: 4 + + reset-names: + items: + - const: spdif + - const: dptx + - const: apb + - const: core + + rockchip,grf: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Phandle to GRF register to control HPD. + + "#sound-dai-cells": + const: 1 + +required: + - compatible + - reg + - clocks + - clock-names + - interrupts + - phys + - ports + - resets + - reset-names + - rockchip,grf + +additionalProperties: false + +examples: + - | + #include + #include + #include + soc { + #address-cells =3D <2>; + #size-cells =3D <2>; + + dp@fec00000 { + compatible =3D "rockchip,rk3399-cdn-dp"; + reg =3D <0x0 0xfec00000 0x0 0x100000>; + assigned-clocks =3D <&cru SCLK_DP_CORE>; + assigned-clock-rates =3D <100000000>; + interrupts =3D ; + clocks =3D <&cru SCLK_DP_CORE>, <&cru PCLK_DP_CTRL>, <&cru SCL= K_SPDIF_REC_DPTX>, + <&cru PCLK_VIO_GRF>; + clock-names =3D "core-clk", "pclk", "spdif", "grf"; + power-domains =3D <&power RK3399_PD_HDCP>; + phys =3D <&tcphy0_dp>, <&tcphy1_dp>; + resets =3D <&cru SRST_DPTX_SPDIF_REC>, <&cru SRST_P_UPHY0_DPTX= >, + <&cru SRST_P_UPHY0_APB>, <&cru SRST_DP_CORE>; + reset-names =3D "spdif", "dptx", "apb", "core"; + rockchip,grf =3D <&grf>; + #sound-dai-cells =3D <1>; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + dp_in: port@0 { + reg =3D <0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + dp_in_vopb: endpoint@0 { + reg =3D <0>; + remote-endpoint =3D <&vopb_out_dp>; + }; + + dp_in_vopl: endpoint@1 { + reg =3D <1>; + remote-endpoint =3D <&vopl_out_dp>; + }; + }; + + dp_out: port@1 { + reg =3D <1>; + }; + }; + }; + }; -- 2.49.0