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Fri, 09 May 2025 04:07:02 -0700 (PDT) From: James Clark Date: Fri, 09 May 2025 12:05:53 +0100 Subject: [PATCH 06/14] spi: spi-fsl-dspi: Avoid setup_accel logic for DMA transfers Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250509-james-nxp-spi-v1-6-32bfcd2fea11@linaro.org> References: <20250509-james-nxp-spi-v1-0-32bfcd2fea11@linaro.org> In-Reply-To: <20250509-james-nxp-spi-v1-0-32bfcd2fea11@linaro.org> To: Vladimir Oltean , Mark Brown , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Frank Li , Chester Lin , Matthias Brugger , Ghennadi Procopciuc , NXP S32 Linux Team , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , larisa.grigore@nxp.com, arnd@linaro.org, andrei.stefanescu@nxp.com, dan.carpenter@linaro.org Cc: linux-spi@vger.kernel.org, imx@lists.linux.dev, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, James Clark X-Mailer: b4 0.14.0 From: Larisa Grigore DMA can't repack the buffer like the CPU can, so skip the accel path which may change the word size and break DMA assumptions. Signed-off-by: Larisa Grigore Signed-off-by: James Clark --- drivers/spi/spi-fsl-dspi.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/drivers/spi/spi-fsl-dspi.c b/drivers/spi/spi-fsl-dspi.c index f7f9425a19e1..902bf23d276a 100644 --- a/drivers/spi/spi-fsl-dspi.c +++ b/drivers/spi/spi-fsl-dspi.c @@ -849,8 +849,8 @@ static void dspi_setup_accel(struct fsl_dspi *dspi) struct spi_transfer *xfer =3D dspi->cur_transfer; bool odd =3D !!(dspi->len & 1); =20 - /* No accel for frames not multiple of 8 bits at the moment */ - if (xfer->bits_per_word % 8) + /* No accel for DMA transfers or frames not multiples of 8 bits at the mo= ment */ + if (dspi->devtype_data->trans_mode =3D=3D DSPI_DMA_MODE || xfer->bits_per= _word % 8) goto no_accel; =20 if (!odd && dspi->len <=3D dspi->devtype_data->fifo_size * 2) { @@ -859,10 +859,7 @@ static void dspi_setup_accel(struct fsl_dspi *dspi) dspi->oper_bits_per_word =3D 8; } else { /* Start off with maximum supported by hardware */ - if (dspi->devtype_data->trans_mode =3D=3D DSPI_XSPI_MODE) - dspi->oper_bits_per_word =3D 32; - else - dspi->oper_bits_per_word =3D 16; + dspi->oper_bits_per_word =3D 32; =20 /* * And go down only if the buffer can't be sent with --=20 2.34.1