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client-ip=165.204.84.17; helo=SATLEXMB03.amd.com; pr=C Received: from SATLEXMB03.amd.com (165.204.84.17) by BL6PEPF0001AB78.mail.protection.outlook.com (10.167.242.171) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.8722.18 via Frontend Transport; Thu, 8 May 2025 05:01:30 +0000 Received: from SATLEXMB06.amd.com (10.181.40.147) by SATLEXMB03.amd.com (10.181.40.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Thu, 8 May 2025 00:01:29 -0500 Received: from SATLEXMB03.amd.com (10.181.40.144) by SATLEXMB06.amd.com (10.181.40.147) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Thu, 8 May 2025 00:01:29 -0500 Received: from xhdipdslab61.xilinx.com (10.180.168.240) by SATLEXMB03.amd.com (10.181.40.144) with Microsoft SMTP Server id 15.1.2507.39 via Frontend Transport; Thu, 8 May 2025 00:01:25 -0500 From: Abhijit Gangurde To: , , , , , , , , , CC: , , , , , , Abhijit Gangurde , Andrew Boyer Subject: [PATCH v2 12/14] RDMA/ionic: Register device ops for miscellaneous functionality Date: Thu, 8 May 2025 10:29:55 +0530 Message-ID: <20250508045957.2823318-13-abhijit.gangurde@amd.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250508045957.2823318-1-abhijit.gangurde@amd.com> References: <20250508045957.2823318-1-abhijit.gangurde@amd.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BL6PEPF0001AB78:EE_|CH3PR12MB8970:EE_ X-MS-Office365-Filtering-Correlation-Id: 79deb0c7-df16-4d97-65ad-08dd8ded653e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|36860700013|7416014|82310400026|1800799024|376014|921020; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 08 May 2025 05:01:30.1373 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 79deb0c7-df16-4d97-65ad-08dd8ded653e X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF0001AB78.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH3PR12MB8970 Content-Type: text/plain; charset="utf-8" Implement idbdev ops for device and port information. Co-developed-by: Andrew Boyer Signed-off-by: Andrew Boyer Co-developed-by: Allen Hubbe Signed-off-by: Allen Hubbe Signed-off-by: Abhijit Gangurde --- drivers/infiniband/hw/ionic/ionic_ibdev.c | 224 ++++++++++++++++++++ drivers/infiniband/hw/ionic/ionic_ibdev.h | 5 + drivers/infiniband/hw/ionic/ionic_lif_cfg.c | 10 + drivers/infiniband/hw/ionic/ionic_lif_cfg.h | 2 + 4 files changed, 241 insertions(+) diff --git a/drivers/infiniband/hw/ionic/ionic_ibdev.c b/drivers/infiniband= /hw/ionic/ionic_ibdev.c index e7c5b15b27cf..1fe58ca2238f 100644 --- a/drivers/infiniband/hw/ionic/ionic_ibdev.c +++ b/drivers/infiniband/hw/ionic/ionic_ibdev.c @@ -3,7 +3,11 @@ =20 #include #include +#include +#include #include +#include +#include =20 #include "ionic_ibdev.h" =20 @@ -33,6 +37,219 @@ void ionic_port_event(struct ionic_ibdev *dev, enum ib_= event_type event) ib_dispatch_event(&ev); } =20 +static int ionic_query_device(struct ib_device *ibdev, + struct ib_device_attr *attr, + struct ib_udata *udata) +{ + struct ionic_ibdev *dev =3D to_ionic_ibdev(ibdev); + + addrconf_ifid_eui48((u8 *)&attr->sys_image_guid, + ionic_lif_netdev(dev->lif_cfg.lif)); + attr->max_mr_size =3D dev->lif_cfg.npts_per_lif * PAGE_SIZE / 2; + attr->page_size_cap =3D dev->lif_cfg.page_size_supported; + + attr->vendor_id =3D to_pci_dev(dev->lif_cfg.hwdev)->vendor; + attr->vendor_part_id =3D to_pci_dev(dev->lif_cfg.hwdev)->device; + + attr->hw_ver =3D ionic_lif_asic_rev(dev->lif_cfg.lif); + attr->fw_ver =3D 0; + attr->max_qp =3D dev->lif_cfg.qp_count; + attr->max_qp_wr =3D IONIC_MAX_DEPTH; + attr->device_cap_flags =3D + IB_DEVICE_MEM_WINDOW | + IB_DEVICE_MEM_MGT_EXTENSIONS | + IB_DEVICE_MEM_WINDOW_TYPE_2B | + 0; + attr->kernel_cap_flags =3D IBK_LOCAL_DMA_LKEY; + attr->max_send_sge =3D + min(ionic_v1_send_wqe_max_sge(dev->lif_cfg.max_stride, 0, false), + IONIC_SPEC_HIGH); + attr->max_recv_sge =3D + min(ionic_v1_recv_wqe_max_sge(dev->lif_cfg.max_stride, 0, false), + IONIC_SPEC_HIGH); + attr->max_sge_rd =3D attr->max_send_sge; + attr->max_cq =3D dev->lif_cfg.cq_count / dev->lif_cfg.udma_count; + attr->max_cqe =3D IONIC_MAX_CQ_DEPTH - IONIC_CQ_GRACE; + attr->max_mr =3D dev->lif_cfg.nmrs_per_lif; + attr->max_pd =3D IONIC_MAX_PD; + attr->max_qp_rd_atom =3D IONIC_MAX_RD_ATOM; + attr->max_ee_rd_atom =3D 0; + attr->max_res_rd_atom =3D IONIC_MAX_RD_ATOM; + attr->max_qp_init_rd_atom =3D IONIC_MAX_RD_ATOM; + attr->max_ee_init_rd_atom =3D 0; + attr->atomic_cap =3D IB_ATOMIC_GLOB; + attr->masked_atomic_cap =3D IB_ATOMIC_GLOB; + attr->max_mw =3D dev->lif_cfg.nmrs_per_lif; + attr->max_mcast_grp =3D 0; + attr->max_mcast_qp_attach =3D 0; + attr->max_ah =3D dev->lif_cfg.nahs_per_lif; + attr->max_fast_reg_page_list_len =3D dev->lif_cfg.npts_per_lif / 2; + attr->max_pkeys =3D IONIC_PKEY_TBL_LEN; + + return 0; +} + +static int ionic_query_port(struct ib_device *ibdev, u32 port, + struct ib_port_attr *attr) +{ + struct net_device *ndev; + + if (port !=3D 1) + return -EINVAL; + + ndev =3D ib_device_get_netdev(ibdev, port); + + if (netif_running(ndev) && netif_carrier_ok(ndev)) { + attr->state =3D IB_PORT_ACTIVE; + attr->phys_state =3D IB_PORT_PHYS_STATE_LINK_UP; + } else if (netif_running(ndev)) { + attr->state =3D IB_PORT_DOWN; + attr->phys_state =3D IB_PORT_PHYS_STATE_POLLING; + } else { + attr->state =3D IB_PORT_DOWN; + attr->phys_state =3D IB_PORT_PHYS_STATE_DISABLED; + } + + attr->max_mtu =3D iboe_get_mtu(ndev->max_mtu); + attr->active_mtu =3D min(attr->max_mtu, iboe_get_mtu(ndev->mtu)); + attr->gid_tbl_len =3D IONIC_GID_TBL_LEN; + attr->ip_gids =3D true; + attr->port_cap_flags =3D 0; + attr->max_msg_sz =3D 0x80000000; + attr->pkey_tbl_len =3D IONIC_PKEY_TBL_LEN; + attr->max_vl_num =3D 1; + attr->subnet_prefix =3D 0xfe80000000000000ull; + + dev_put(ndev); + + return ib_get_eth_speed(ibdev, port, + &attr->active_speed, + &attr->active_width); +} + +static enum rdma_link_layer ionic_get_link_layer(struct ib_device *ibdev, + u32 port) +{ + return IB_LINK_LAYER_ETHERNET; +} + +static int ionic_query_pkey(struct ib_device *ibdev, u32 port, u16 index, + u16 *pkey) +{ + if (port !=3D 1) + return -EINVAL; + + if (index !=3D 0) + return -EINVAL; + + *pkey =3D IB_DEFAULT_PKEY_FULL; + + return 0; +} + +static int ionic_modify_device(struct ib_device *ibdev, int mask, + struct ib_device_modify *attr) +{ + struct ionic_ibdev *dev =3D to_ionic_ibdev(ibdev); + + if (mask & ~IB_DEVICE_MODIFY_NODE_DESC) + return -EOPNOTSUPP; + + if (mask & IB_DEVICE_MODIFY_NODE_DESC) + memcpy(dev->ibdev.node_desc, attr->node_desc, + IB_DEVICE_NODE_DESC_MAX); + + return 0; +} + +static int ionic_get_port_immutable(struct ib_device *ibdev, u32 port, + struct ib_port_immutable *attr) +{ + if (port !=3D 1) + return -EINVAL; + + attr->core_cap_flags =3D RDMA_CORE_PORT_IBA_ROCE_UDP_ENCAP; + + attr->pkey_tbl_len =3D IONIC_PKEY_TBL_LEN; + attr->gid_tbl_len =3D IONIC_GID_TBL_LEN; + attr->max_mad_size =3D IB_MGMT_MAD_SIZE; + + return 0; +} + +static void ionic_get_dev_fw_str(struct ib_device *ibdev, char *str) +{ + struct ionic_ibdev *dev =3D to_ionic_ibdev(ibdev); + + ionic_lif_fw_version(dev->lif_cfg.lif, str, IB_FW_VERSION_NAME_MAX); +} + +static const struct cpumask *ionic_get_vector_affinity(struct ib_device *i= bdev, + int comp_vector) +{ + struct ionic_ibdev *dev =3D to_ionic_ibdev(ibdev); + + if (comp_vector < 0 || comp_vector >=3D dev->lif_cfg.eq_count) + return NULL; + + return irq_get_affinity_mask(dev->eq_vec[comp_vector]->irq); +} + +static ssize_t hw_rev_show(struct device *device, struct device_attribute = *attr, + char *buf) +{ + struct ionic_ibdev *dev =3D + rdma_device_to_drv_device(device, struct ionic_ibdev, ibdev); + + return sysfs_emit(buf, "0x%x\n", ionic_lif_asic_rev(dev->lif_cfg.lif)); +} +static DEVICE_ATTR_RO(hw_rev); + +static ssize_t hca_type_show(struct device *device, + struct device_attribute *attr, char *buf) +{ + struct ionic_ibdev *dev =3D + rdma_device_to_drv_device(device, struct ionic_ibdev, ibdev); + + return sysfs_emit(buf, "%s\n", dev->ibdev.node_desc); +} +static DEVICE_ATTR_RO(hca_type); + +static struct attribute *ionic_rdma_attributes[] =3D { + &dev_attr_hw_rev.attr, + &dev_attr_hca_type.attr, + NULL +}; + +static const struct attribute_group ionic_rdma_attr_group =3D { + .attrs =3D ionic_rdma_attributes, +}; + +static void ionic_disassociate_ucontext(struct ib_ucontext *ibcontext) +{ + /* + * Dummy define disassociate_ucontext so that it does not + * wait for user context before cleaning up hw resources. + */ +} + +static const struct ib_device_ops ionic_dev_ops =3D { + .owner =3D THIS_MODULE, + .driver_id =3D RDMA_DRIVER_IONIC, + .uverbs_abi_ver =3D IONIC_ABI_VERSION, + .query_device =3D ionic_query_device, + .query_port =3D ionic_query_port, + .get_link_layer =3D ionic_get_link_layer, + .query_pkey =3D ionic_query_pkey, + .modify_device =3D ionic_modify_device, + + .get_port_immutable =3D ionic_get_port_immutable, + .get_dev_fw_str =3D ionic_get_dev_fw_str, + .get_vector_affinity =3D ionic_get_vector_affinity, + .device_group =3D &ionic_rdma_attr_group, + .disassociate_ucontext =3D ionic_disassociate_ucontext, +}; + static int ionic_init_resids(struct ionic_ibdev *dev) { int rc; @@ -174,6 +391,13 @@ static struct ionic_ibdev *ionic_create_ibdev(struct i= onic_aux_dev *ionic_adev) if (rc) goto err_admin; =20 + ibdev->uverbs_cmd_mask =3D + BIT_ULL(IB_USER_VERBS_CMD_GET_CONTEXT) | + BIT_ULL(IB_USER_VERBS_CMD_QUERY_DEVICE) | + BIT_ULL(IB_USER_VERBS_CMD_QUERY_PORT) | + 0; + + ib_set_device_ops(&dev->ibdev, &ionic_dev_ops); ionic_datapath_setops(dev); ionic_controlpath_setops(dev); =20 diff --git a/drivers/infiniband/hw/ionic/ionic_ibdev.h b/drivers/infiniband= /hw/ionic/ionic_ibdev.h index c476f3781090..446cb8d5e334 100644 --- a/drivers/infiniband/hw/ionic/ionic_ibdev.h +++ b/drivers/infiniband/hw/ionic/ionic_ibdev.h @@ -32,6 +32,11 @@ #define IONIC_AQ_COUNT 4 #define IONIC_EQ_ISR_BUDGET 10 #define IONIC_EQ_WORK_BUDGET 1000 +#define IONIC_MAX_RD_ATOM 16 +#define IONIC_PKEY_TBL_LEN 1 +#define IONIC_GID_TBL_LEN 256 + +#define IONIC_SPEC_HIGH 8 #define IONIC_MAX_PD 1024 #define IONIC_SPEC_HIGH 8 #define IONIC_SQCMB_ORDER 5 diff --git a/drivers/infiniband/hw/ionic/ionic_lif_cfg.c b/drivers/infiniba= nd/hw/ionic/ionic_lif_cfg.c index a02eb2f5bd45..a4246de26b9b 100644 --- a/drivers/infiniband/hw/ionic/ionic_lif_cfg.c +++ b/drivers/infiniband/hw/ionic/ionic_lif_cfg.c @@ -119,3 +119,13 @@ int ionic_version_check(const struct device *dev, stru= ct ionic_lif *lif) =20 return 0; } + +void ionic_lif_fw_version(struct ionic_lif *lif, char *str, size_t len) +{ + strscpy(str, lif->ionic->idev.dev_info.fw_version, len); +} + +u8 ionic_lif_asic_rev(struct ionic_lif *lif) +{ + return lif->ionic->idev.dev_info.asic_rev; +} diff --git a/drivers/infiniband/hw/ionic/ionic_lif_cfg.h b/drivers/infiniba= nd/hw/ionic/ionic_lif_cfg.h index b095637c54cf..f92d8aee5af9 100644 --- a/drivers/infiniband/hw/ionic/ionic_lif_cfg.h +++ b/drivers/infiniband/hw/ionic/ionic_lif_cfg.h @@ -61,5 +61,7 @@ struct ionic_lif_cfg { int ionic_version_check(const struct device *dev, struct ionic_lif *lif); void ionic_fill_lif_cfg(struct ionic_lif *lif, struct ionic_lif_cfg *cfg); struct net_device *ionic_lif_netdev(struct ionic_lif *lif); +void ionic_lif_fw_version(struct ionic_lif *lif, char *str, size_t len); +u8 ionic_lif_asic_rev(struct ionic_lif *lif); =20 #endif /* _IONIC_LIF_CFG_H_ */ --=20 2.34.1