From nobody Tue Dec 16 05:55:48 2025 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 99FB028640E; Thu, 8 May 2025 17:49:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746726557; cv=none; b=SSSlq2sh21FBQFPxb3vhaRS0v59UWTQJbR+eIeJQv/W3LQb3seli7T1diZF8zVuebOSTGtvxkCWp15E6j3IgItH9mYmQ1DlX9TaUuSQ17+onxKtZjpLRu3K3pNZxA8EGUr+0ouBnfT9FcBA8bqb13TDD32llLyk6iGNROAbcswM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746726557; c=relaxed/simple; bh=NcPJopNj4QkFL7RS7LVqktzn6/GCRQbuGX0pRkX8TIA=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=SjZFi1SRs51j/+4aR+yoP4ZRN/4kpIslV7cnW5oXeqRmc1fKtjvpmIylxLFZhREQ/daoF4Y2aI9GpjdVOiP1maM3iYW+Baw6Bqj4uw+g1Go7lHB52Z9m4mJoQnPSHh3AK+FE1wwOpe8GoeQg0nSDcRAP4SGYHr8aS/U0AcSgQMg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=XTuAt1Sg; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="XTuAt1Sg" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1746726547; bh=NcPJopNj4QkFL7RS7LVqktzn6/GCRQbuGX0pRkX8TIA=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=XTuAt1SgdJEza/9SbifnqLSJSgjB972/wjCBQ4zB3U7U6nospO3+6eIcYL+rtNfjE sxb3lfhHTGD3oGVRFz79G6Nnb84SAPtqpnRnUd9GQmE8mXINfUkx1idUAysy9c5MQM zoGf09oSbA94/cdhAJymXsALo+SPNw6ewMMYDquq4VBAG8Zsv88Ejj/21PlLvUo1Pm zIYvpsafdbcHvmv+AvWryvuYpcNKbQzdhMcrV1u7/WG3kxj2JnYkfJgTa55lOuXO5X m/p274Pdc+GayWx9HrLuWhoRSBH+pgQCIIWoENfxJocIBvxysx7rUJyzuc6N66EFIz ENXzUZgprlMmw== Received: from jupiter.universe (dyndsl-091-248-213-080.ewe-ip-backbone.de [91.248.213.80]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: sre) by bali.collaboradmins.com (Postfix) with ESMTPSA id C808C17E07E6; Thu, 8 May 2025 19:49:07 +0200 (CEST) Received: by jupiter.universe (Postfix, from userid 1000) id 7069E480033; Thu, 08 May 2025 19:49:07 +0200 (CEST) From: Sebastian Reichel Date: Thu, 08 May 2025 19:48:50 +0200 Subject: [PATCH v2 1/5] arm64: dts: rockchip: move rock 5b to include file Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250508-rock5bp-for-upstream-v2-1-677033cc1ac2@kernel.org> References: <20250508-rock5bp-for-upstream-v2-0-677033cc1ac2@kernel.org> In-Reply-To: <20250508-rock5bp-for-upstream-v2-0-677033cc1ac2@kernel.org> To: Heiko Stuebner Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@collabora.com, Sebastian Reichel X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=992; i=sre@kernel.org; h=from:subject:message-id; bh=NcPJopNj4QkFL7RS7LVqktzn6/GCRQbuGX0pRkX8TIA=; b=owJ4nAFtApL9kA0DAAoB2O7X88g7+poByyZiAGgc7pO+niDJzvLdND9x09wwRxmWRhstVzAud 5dt2ER8DWsTUYkCMwQAAQoAHRYhBO9mDQdGP4tyanlUE9ju1/PIO/qaBQJoHO6TAAoJENju1/PI O/qabLYP/1D279busEQJkEEWFCEGNrbv01oemTLzeZyBXScZgGgvwi7BO4SfPVoOd1CifrkQF5o DCYZLZvmeQP8HgLat/TqO7nlLi4jsIrq2ZWKwfMTUcOd+ENyDgblj0hMusHe6z2rIUaZKIo9DW4 /42RooyfPkzZyclnkZvDSLqXgkAsxff5GslPfx3okLTn2ipP+JYmofhhhmb5+JHKeYI0JJ95IRn 2GbwLltBcd4ztiqaNdtA9dt2OykAF9+sve2903Rw2GIukeT18KbjquCoB+MhFEeTDYXAABQZXD1 I9G35Ehu1fhyfuB0mYfH0MUgUht+2jcj3Ma0f9G8gxZ9onsOlOBo0mtXL2FKj581mvylvFRML5/ ePF2qlM8AH3bDu//gW5Ty/BCuj+PegTQ/dxFvC2rDSeHXvtNWTpfiKYKdyleLvyWQBHl4jHkRpa niU7iIkP+vF2UNfzA9yj21u+BPRDodLJxawG6daTEXuUfZzbMOyMAzLQz3EmiP3qdoKVGoFVrS2 DHOb6WtCIKKCzCT9Fl+FP3L3u/U4SrZ0CEJeQa7/qupMx4k69DEp7+mkporOAJz7ESRV41vGxJo upJFs5awz+Rux9s4PF2y2jj099DJmJFBd3uV9gTCNxweK+dakgiATKHRBJ44IvYVE+JhQw2ADsa DgQ1NasBMWT8GcjUiUSotWA== X-Developer-Key: i=sre@kernel.org; a=openpgp; fpr=EF660D07463F8B726A795413D8EED7F3C83BFA9A Radxa released some more boards, which are based on the original Rock 5B. Move its board description into an include file to avoid unnecessary duplication. NOTE: this should be merged with the following commit to ensure bisectability. The rename happens in a separete commit during development because git does not properly detect the rename when the original filename is reused in the same commit. This means 1. it's a lot harder to review the changes 2. it's a lot harder to rebase the patch series Signed-off-by: Sebastian Reichel --- arch/arm64/boot/dts/rockchip/{rk3588-rock-5b.dts =3D> rk3588-rock-5b.dtsi}= | 0 1 file changed, 0 insertions(+), 0 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts b/arch/arm64/b= oot/dts/rockchip/rk3588-rock-5b.dtsi similarity index 100% rename from arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts rename to arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dtsi --=20 2.47.2 From nobody Tue Dec 16 05:55:48 2025 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 99DE321D3F9; Thu, 8 May 2025 17:49:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; 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Thu, 8 May 2025 19:49:07 +0200 (CEST) Received: by jupiter.universe (Postfix, from userid 1000) id 70B0B480039; Thu, 08 May 2025 19:49:07 +0200 (CEST) From: Sebastian Reichel Date: Thu, 08 May 2025 19:48:51 +0200 Subject: [PATCH v2 2/5] arm64: dts: rockchip: move rock 5b to include file Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250508-rock5bp-for-upstream-v2-2-677033cc1ac2@kernel.org> References: <20250508-rock5bp-for-upstream-v2-0-677033cc1ac2@kernel.org> In-Reply-To: <20250508-rock5bp-for-upstream-v2-0-677033cc1ac2@kernel.org> To: Heiko Stuebner Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@collabora.com, Sebastian Reichel X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; 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a=openpgp; fpr=EF660D07463F8B726A795413D8EED7F3C83BFA9A Radxa released some more boards, which are based on the original Rock 5B. Move its board description into an include file to avoid unnecessary duplication. NOTE: this should be merged with the previous commit to ensure bisectability. The rename happens in a separete commit during development because git does not properly detect the rename when the original filename is reused in the same commit. This means 1. it's a lot harder to review the changes 2. it's a lot harder to rebase the patch series Signed-off-by: Sebastian Reichel --- arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts | 52 ++++++++++++++++++++= ++++ arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dtsi | 40 ------------------ 2 files changed, 52 insertions(+), 40 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts b/arch/arm64/b= oot/dts/rockchip/rk3588-rock-5b.dts new file mode 100644 index 0000000000000000000000000000000000000000..9407a7c9910ada1f6c803d2e157= 85a9cbd9bd655 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts @@ -0,0 +1,52 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +/dts-v1/; + +#include "rk3588-rock-5b.dtsi" + +/ { + model =3D "Radxa ROCK 5B"; + compatible =3D "radxa,rock-5b", "rockchip,rk3588"; +}; + +&sdio { + max-frequency =3D <200000000>; + no-sd; + no-mmc; + non-removable; + bus-width =3D <4>; + cap-sdio-irq; + disable-wp; + keep-power-in-suspend; + wakeup-source; + sd-uhs-sdr12; + sd-uhs-sdr25; + sd-uhs-sdr50; + sd-uhs-sdr104; + vmmc-supply =3D <&vcc3v3_pcie2x1l0>; + vqmmc-supply =3D <&vcc_1v8_s3>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&sdiom0_pins>; + status =3D "okay"; +}; + +&uart6 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&uart6m1_xfer &uart6m1_ctsn &uart6m1_rtsn>; + status =3D "okay"; +}; + +&pinctrl { + usb { + vcc5v0_host_en: vcc5v0-host-en { + rockchip,pins =3D <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&vcc5v0_host { + enable-active-high; + gpio =3D <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&vcc5v0_host_en>; +}; diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dtsi b/arch/arm64/= boot/dts/rockchip/rk3588-rock-5b.dtsi index 17f4fd054cd3d1c4e23ccfe014a9c4b9d7ad1a06..6052787d2560978d2bae6cfbeea= 5fc1d419d583a 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dtsi @@ -8,9 +8,6 @@ #include "rk3588.dtsi" =20 / { - model =3D "Radxa ROCK 5B"; - compatible =3D "radxa,rock-5b", "rockchip,rk3588"; - aliases { mmc0 =3D &sdhci; mmc1 =3D &sdmmc; @@ -139,10 +136,6 @@ vcc5v0_host: regulator-vcc5v0-host { regulator-always-on; regulator-min-microvolt =3D <5000000>; regulator-max-microvolt =3D <5000000>; - enable-active-high; - gpio =3D <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>; - pinctrl-names =3D "default"; - pinctrl-0 =3D <&vcc5v0_host_en>; vin-supply =3D <&vcc5v0_sys>; }; =20 @@ -488,12 +481,6 @@ pcie3_vcc3v3_en: pcie3-vcc3v3-en { rockchip,pins =3D <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; }; }; - - usb { - vcc5v0_host_en: vcc5v0-host-en { - rockchip,pins =3D <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; }; =20 &pwm1 { @@ -530,27 +517,6 @@ &sdmmc { status =3D "okay"; }; =20 -&sdio { - max-frequency =3D <200000000>; - no-sd; - no-mmc; - non-removable; - bus-width =3D <4>; - cap-sdio-irq; - disable-wp; - keep-power-in-suspend; - wakeup-source; - sd-uhs-sdr12; - sd-uhs-sdr25; - sd-uhs-sdr50; - sd-uhs-sdr104; - vmmc-supply =3D <&vcc3v3_pcie2x1l0>; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250508-rock5bp-for-upstream-v2-3-677033cc1ac2@kernel.org> References: <20250508-rock5bp-for-upstream-v2-0-677033cc1ac2@kernel.org> In-Reply-To: <20250508-rock5bp-for-upstream-v2-0-677033cc1ac2@kernel.org> To: Heiko Stuebner Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@collabora.com, Sebastian Reichel , FUKAUMI Naoki , Krzysztof Kozlowski X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1029; i=sre@kernel.org; h=from:subject:message-id; bh=V6ouydAMjeLLipqGubBKzuYUl73fH35Zk0yjK7db6K0=; b=owJ4nAFtApL9kA0DAAoB2O7X88g7+poByyZiAGgc7pP/lcxUraZupIinulSaseR4T++TCK7mG vRYSzu2XWhRRYkCMwQAAQoAHRYhBO9mDQdGP4tyanlUE9ju1/PIO/qaBQJoHO6TAAoJENju1/PI O/qavGYP/RkPQLOkNBmorCW9tusVBfKJORrobUzTjxPoNl97lWZfTiuAOuivXqGyO41aqftmMZy BweHRYWm9iIGJa+woikrjQvQLyNZmhSqtAHL0ZqVB8Wd8bW5S/qZEqNOQ5/kkIOgG9oguuxa22B VzNFv2Uz/f5My8y4AGwQCtLbjNWwoWq/npHfjtC/nYpXjiPZRnZFOaQiPED7Zldh0UgyeEilhfA TvxIDy+KjEeam1IgxFkY/gk8ND8RRBRH1rEfKpP/QrQK2afsr9XGQwS8DYmnWQi0zXSzYZek0Bj 8Em0f5BS1Rbv7o+KXutI+nfKpvDKWqNhQbyhBkW+mEBVsausPpdu+Fu6B2wImx5jlrV4cfdkTfO XAinmqP44GVqe0zJHukc/LJUfEdRQze2wj+LyTgluPe+gg9b/YHRpM2j13Sig3eTZ+KxDCgUipi xEemssYBY5HOYo/CUPcaxazd3nR7Ux9xGzv7VgiqCM6DeeHjJL2w9131ibXAwcZX5NdBVGkc0k0 0sb41bu3oaLXr48YLQ4VsL5rzrDKp3zrP85bK+Vf+INRTXadSyqB4ef9CmFMM+x0WNtLCnhEVTJ QvxYThhSFJg7PBcz5xzvO81KoGDQnieVoVjhkKDp1jG39ecU5QfEi/7X6gLQViaiIxyjH43H0LU vqws8+kyuegFDBowHlYQs5Q== X-Developer-Key: i=sre@kernel.org; a=openpgp; fpr=EF660D07463F8B726A795413D8EED7F3C83BFA9A From: FUKAUMI Naoki The Radxa ROCK 5B+ is an improved version of the ROCK 5B. Signed-off-by: FUKAUMI Naoki Acked-by: Krzysztof Kozlowski Signed-off-by: Sebastian Reichel --- Documentation/devicetree/bindings/arm/rockchip.yaml | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Document= ation/devicetree/bindings/arm/rockchip.yaml index 455fbb290b777bca5ae69ca8644bc41380b94272..8f324417a3bdb3f5e11b03c86d1= 8df4b6f60a43c 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -946,6 +946,11 @@ properties: - const: radxa,rock-5b - const: rockchip,rk3588 =20 + - description: Radxa ROCK 5B+ + items: + - const: radxa,rock-5b-plus + - const: rockchip,rk3588 + - description: Radxa ROCK 5C items: - const: radxa,rock-5c --=20 2.47.2 From nobody Tue Dec 16 05:55:48 2025 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 99F43284B55; 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fpr=EF660D07463F8B726A795413D8EED7F3C83BFA9A Add ROCK 5B+, which is an improved version of the ROCK 5B with the following changes: * Memory LPDDR4X -> LPDDR5 * HDMI input connector size * eMMC socket -> onboard * M.2 E-Key is replaced by onboard RTL8852BE WLAN/BT * M.2 M-Key 1x4 lanes is replaced by 2x2 lanes * Added M.2 B-Key for USB connected WWAN modules (untested) * Add second camera port (not yet supported in upstream Linux) * Add dedicated USB-C port for device power (no impact in DT; the existing port has not been changed and the new port is handled by CH224D standalone chip) Signed-off-by: Sebastian Reichel --- arch/arm64/boot/dts/rockchip/Makefile | 1 + .../boot/dts/rockchip/rk3588-rock-5b-plus.dts | 113 +++++++++++++++++= ++++ 2 files changed, 114 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/ro= ckchip/Makefile index 7948522cb225cbbe54099fb7537fc70357164f13..7a05bd885d5ecb96c3decbd3f48= 3a6c58b81e0ab 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -165,6 +165,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-rock-5-itx.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-rock-5b.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-rock-5b-pcie-ep.dtbo dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-rock-5b-pcie-srns.dtbo +dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-rock-5b-plus.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-tiger-haikou.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-tiger-haikou-video-demo.dtbo dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-toybrick-x0.dtb diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus.dts b/arch/ar= m64/boot/dts/rockchip/rk3588-rock-5b-plus.dts new file mode 100644 index 0000000000000000000000000000000000000000..74c7b6502e4dda4b774f43c704e= baee350703c0d --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus.dts @@ -0,0 +1,113 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +/dts-v1/; + +#include "rk3588-rock-5b.dtsi" + +/ { + model =3D "Radxa ROCK 5B+"; + compatible =3D "radxa,rock-5b-plus", "rockchip,rk3588"; + + rfkill-wwan { + compatible =3D "rfkill-gpio"; + label =3D "rfkill-m2-wwan"; + radio-type =3D "wwan"; + shutdown-gpios =3D <&gpio3 RK_PA6 GPIO_ACTIVE_HIGH>; + }; + + vcc3v3_4g: regulator-vcc3v3-4g { + compatible =3D "regulator-fixed"; + enable-active-high; + gpios =3D <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>; + /* pinctrl for the GPIO is requested by vcc3v3_pcie2x1l0 */ + regulator-name =3D "vcc3v3_4g"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + startup-delay-us =3D <50000>; + vin-supply =3D <&vcc5v0_sys>; + }; + + vcc3v3_wwan_pwr: regulator-vcc3v3-wwan { + compatible =3D "regulator-fixed"; + enable-active-high; + gpios =3D <&gpio2 RK_PB1 GPIO_ACTIVE_HIGH>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&wwan_power_en>; + regulator-name =3D "vcc3v3_wwan_pwr"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + vin-supply =3D <&vcc3v3_4g>; + }; +}; + +&gpio0 { + wwan-disable2-n-hog { + gpios =3D ; + output-low; + line-name =3D "M.2 B-key W_DISABLE2#"; + gpio-hog; + }; +}; + +&gpio2 { + wwan-reset-n-hog { + gpios =3D ; + output-low; + line-name =3D "M.2 B-key RESET#"; + gpio-hog; + }; + + wwan-wake-n-hog { + gpios =3D ; + input; + line-name =3D "M.2 B-key WoWWAN#"; + gpio-hog; + }; +}; + +&pcie30phy { + data-lanes =3D <1 1 2 2>; +}; + +&pcie3x2 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pcie3x2_rst>; + reset-gpios =3D <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply =3D <&vcc3v3_pcie30>; + status =3D "okay"; +}; + +&pcie3x4 { + num-lanes =3D <2>; +}; + +&pinctrl { + wwan { + wwan_power_en: wwan-pwr-en { + rockchip,pins =3D <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pcie3 { + pcie3x2_rst: pcie3x2-rst { + rockchip,pins =3D <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250508-rock5bp-for-upstream-v2-5-677033cc1ac2@kernel.org> References: <20250508-rock5bp-for-upstream-v2-0-677033cc1ac2@kernel.org> In-Reply-To: <20250508-rock5bp-for-upstream-v2-0-677033cc1ac2@kernel.org> To: Heiko Stuebner Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@collabora.com, Sebastian Reichel X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=7862; i=sre@kernel.org; h=from:subject:message-id; bh=ab6aAqtGy1bZZeuXPkx80OYbA7f4f4wlEr4vVLzuEQA=; b=owJ4nAFtApL9kA0DAAoB2O7X88g7+poByyZiAGgc7pMbQcTDAcrfXIVmLGh2WY7Fc08UDMBsL MJMInhM7LYmzokCMwQAAQoAHRYhBO9mDQdGP4tyanlUE9ju1/PIO/qaBQJoHO6TAAoJENju1/PI O/qa5GQP/2kUyL6+9dqKxVJ286w782CmymK+LslLrNBBVUvuegbAx737nXymg1niQqZUv2qLiwC XL4B/erg+DqV6ccPD2Bd0JVKf+X8Wr5KYsKqk1lXt6jOOMLTsE2im8hk52JzsIhz8Gg6g8l1smg QYIB1AiDaAfBKPN00SUnN32C+UDqN7Z5VEVQDFjfXP61KmC+xmkOPrzZwlckoUWeyKAGHRRpUVb oPfn5Z083GSpm+4gy3Ltto/ESauVf/kQcwM/146++/yC8+3P/dTiKsFwHaeS0r0KODAufYUCArR b73MDjlFUeoAIEfNGFeTcIjmghUZVrJ9d6FYXgM/Fe4+UyslbTcFQZcMlmOB3g/6l2RrrRdHTAw IzufS14vVJYq/AVAuKobO0BTai+P9wIHTQjIeXNewPzWWNxIvWHWp89BB1vivxrGV8lGsI12T1U AB3CU11sFxvw+6Yk4H6nch5l25sMPOD7uIX7FkGpxNRxsDDsGdbqBQCnepmFTIoKtU7tVjo2Rnl ticuQ1rGKMGPxsRr1Owj1ijnuupJsaab8ziAvASSj4oZgH6WE0VoY5tTWSS2fEVBMj7cJtOisJ0 1E+5EfqNOHrZMVY8aawt2lyj7d3xLg5EUjLfoWGVeOPjED+cLK5NSJj29Xp6NdEsyOhOnvlkxHH S/wAnEj/wwdm8Hp7HltcspQ== X-Developer-Key: i=sre@kernel.org; a=openpgp; fpr=EF660D07463F8B726A795413D8EED7F3C83BFA9A Add hardware description for the USB-C port in the Radxa ROCK 5 Model B+ This describes the OHCI, EHCI and XHCI USB parts, but not yet the DisplayPo= rt AltMode, since the bindings for that are not yet upstream. Support for the ROCK 5B is prepared, but not exposed at the moment, since it results in unreliable boot behavior due to hard resets killing the supply voltage. Some further investigation and fixes in the kernel's Type-C Port Manager (TCPM) state machine is needed before exposing the port. The ROCK 5B+ has a dedicated port for powering the board and thus is not affected. Signed-off-by: Sebastian Reichel --- .../boot/dts/rockchip/rk3588-rock-5b-plus.dts | 16 +++ arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts | 23 ++++ arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dtsi | 137 +++++++++++++++++= ++++ 3 files changed, 176 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus.dts b/arch/ar= m64/boot/dts/rockchip/rk3588-rock-5b-plus.dts index 74c7b6502e4dda4b774f43c704ebaee350703c0d..4096cd853f9a909e4233d2c61a1= fe5ee83904c4c 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus.dts @@ -99,12 +99,28 @@ pcie3x2_rst: pcie3x2-rst { }; =20 usb { + usbc_sbu_dc: usbc-sbu-dc { + rockchip,pins =3D <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>, + <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + vcc5v0_host_en: vcc5v0-host-en { rockchip,pins =3D <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; }; }; }; =20 +&usbc0 { + status =3D "okay"; +}; + +&usbdp_phy0 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&usbc_sbu_dc>; + sbu1-dc-gpios =3D <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; + sbu2-dc-gpios =3D <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>; +}; + &vcc5v0_host { enable-active-high; gpio =3D <&gpio1 RK_PA1 GPIO_ACTIVE_HIGH>; diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts b/arch/arm64/b= oot/dts/rockchip/rk3588-rock-5b.dts index 9407a7c9910ada1f6c803d2e15785a9cbd9bd655..ab0c572ea9234f373af4a47db93= fc1786f0e6fbf 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts @@ -36,8 +36,20 @@ &uart6 { status =3D "okay"; }; =20 +&usbdp_phy0 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&usbc_sbu_dc>; + sbu1-dc-gpios =3D <&gpio4 RK_PA6 GPIO_ACTIVE_HIGH>; + sbu2-dc-gpios =3D <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>; +}; + &pinctrl { usb { + usbc_sbu_dc: usbc-sbu-dc { + rockchip,pins =3D <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>, + <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + vcc5v0_host_en: vcc5v0-host-en { rockchip,pins =3D <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; }; @@ -50,3 +62,14 @@ &vcc5v0_host { pinctrl-names =3D "default"; pinctrl-0 =3D <&vcc5v0_host_en>; }; + +/* + * Do not yet offer USB-C support on the Rock 5B. The current U-Boot + * Linux setup is quite unstable and for many power-supplies needs multiple + * hard resets to boot to userspace. Let's enable this once the issues + * in the TCPM kernel code have been solved. Without this any automated + * boot tests will run into problems. + */ +/delete-node/ &usbc0; +/delete-node/ &usb_host0_xhci; +/delete-node/ &usbdp_phy0; diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dtsi b/arch/arm64/= boot/dts/rockchip/rk3588-rock-5b.dtsi index 6052787d2560978d2bae6cfbeea5fc1d419d583a..314fdc0c1c20b25b0fdc5254f3b= 090586c169a00 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dtsi @@ -5,6 +5,7 @@ #include #include #include +#include #include "rk3588.dtsi" =20 / { @@ -92,6 +93,15 @@ rfkill-bt { shutdown-gpios =3D <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>; }; =20 + vcc12v_dcin: regulator-vcc12v-dcin { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc12v_dcin"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <12000000>; + regulator-max-microvolt =3D <12000000>; + }; + vcc3v3_pcie2x1l0: regulator-vcc3v3-pcie2x1l0 { compatible =3D "regulator-fixed"; enable-active-high; @@ -146,6 +156,19 @@ vcc5v0_sys: regulator-vcc5v0-sys { regulator-boot-on; regulator-min-microvolt =3D <5000000>; regulator-max-microvolt =3D <5000000>; + vin-supply =3D <&vcc12v_dcin>; + }; + + vbus5v0_typec: vbus5v0-typec { + compatible =3D "regulator-fixed"; + enable-active-high; + gpio =3D <&gpio2 RK_PB6 GPIO_ACTIVE_HIGH>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&vbus5v0_typec_en>; + regulator-name =3D "vbus5v0_typec"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + vin-supply =3D <&vcc5v0_sys>; }; =20 vcc_1v1_nldo_s3: regulator-vcc-1v1-nldo-s3 { @@ -309,6 +332,67 @@ regulator-state-mem { }; }; =20 +&i2c4 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&i2c4m1_xfer>; + status =3D "okay"; + + usbc0: usb-typec@22 { + compatible =3D "fcs,fusb302"; + reg =3D <0x22>; + interrupt-parent =3D <&gpio3>; + interrupts =3D ; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&usbc0_int>; + vbus-supply =3D <&vbus5v0_typec>; + /* + * When the board is starting to send power-delivery messages + * too late (5 seconds according to the specification), the + * power-supply reacts with a hard-reset. That removes the + * power from VBUS for some time, which resets te whole board. + */ + status =3D "fail"; + + usb_con: connector { + compatible =3D "usb-c-connector"; + label =3D "USB-C"; + data-role =3D "dual"; + power-role =3D "sink"; + try-power-role =3D "sink"; + op-sink-microwatt =3D <1000000>; + sink-pdos =3D + , + ; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + usbc0_role_sw: endpoint { + remote-endpoint =3D <&dwc3_0_role_switch>; + }; + }; + + port@1 { + reg =3D <1>; + usbc0_orien_sw: endpoint { + remote-endpoint =3D <&usbdp_phy0_orientation_switch>; + }; + }; + + port@2 { + reg =3D <2>; + dp_altmode_mux: endpoint { + remote-endpoint =3D <&usbdp_phy0_dp_altmode_mux>; + }; + }; + }; + }; + }; +}; + &i2c6 { status =3D "okay"; =20 @@ -481,6 +565,16 @@ pcie3_vcc3v3_en: pcie3-vcc3v3-en { rockchip,pins =3D <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; }; }; + + usb { + usbc0_int: usbc0-int { + rockchip,pins =3D <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + vbus5v0_typec_en: vbus5v0-typec-en { + rockchip,pins =3D <2 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; }; =20 &pwm1 { @@ -866,6 +960,14 @@ &uart2 { status =3D "okay"; }; =20 +&u2phy0 { + status =3D "okay"; +}; + +&u2phy0_otg { + status =3D "okay"; +}; + &u2phy1 { status =3D "okay"; }; @@ -893,6 +995,27 @@ &u2phy3_host { status =3D "okay"; }; =20 +&usbdp_phy0 { + mode-switch; + orientation-switch; + status =3D "okay"; + + port { + #address-cells =3D <1>; + #size-cells =3D <0>; + + usbdp_phy0_orientation_switch: endpoint@0 { + reg =3D <0>; + remote-endpoint =3D <&usbc0_orien_sw>; + }; + + usbdp_phy0_dp_altmode_mux: endpoint@1 { + reg =3D <1>; + remote-endpoint =3D <&dp_altmode_mux>; + }; + }; +}; + &usbdp_phy1 { status =3D "okay"; }; @@ -905,6 +1028,20 @@ &usb_host0_ohci { status =3D "okay"; }; =20 +&usb_host0_xhci { + usb-role-switch; + status =3D "okay"; + + port { + #address-cells =3D <1>; + #size-cells =3D <0>; + + dwc3_0_role_switch: endpoint { + remote-endpoint =3D <&usbc0_role_sw>; + }; + }; +}; + &usb_host1_ehci { status =3D "okay"; }; --=20 2.47.2