From nobody Wed Dec 17 03:48:32 2025 Received: from mail.cjdns.fr (mail.cjdns.fr [5.135.140.105]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9D79F280A57; Wed, 7 May 2025 13:45:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=5.135.140.105 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746625530; cv=none; b=S7EyKZTZ/Sb3Z/XKb4k9SqYA9nzzpJlGvLxSPT4FkwjmI9UNeUG2ZmHHkFJ+cfhosdkC62g3LwvQmEZAVvC50fFQm8jpZvDcNk/RWm8z5+OvyhUWMdAqbis/zCG6yNMJVEk7hSfTUYFTQNUBCHw/RISRHWP+IqTx3TxjE2v2XIg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746625530; c=relaxed/simple; bh=f2oLBUqEKwI8nm4Ixf3s6Ljc+BL+7kIYtFBoN6/s6Zc=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=DRgkSNbcKovsFv/H38oq15OAOScoEcTc1DwHv54TaTW+I7SH+Chuga2sPpAlnkkawAM1tdz6NTvgsQmLz+u1SZWQjNSFeD0gVj4ypARZrp8P70t6HVIl7N2An7wqF2z5CltzmQYkMCq1g6vTh+Plus/ROM4Y/0Rk+nHkrindCDI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=cjdns.fr; spf=none smtp.mailfrom=cjdns.fr; dkim=pass (2048-bit key) header.d=cjdns.fr header.i=@cjdns.fr header.b=lxqmvzjo; arc=none smtp.client-ip=5.135.140.105 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=cjdns.fr Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=cjdns.fr Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=cjdns.fr header.i=@cjdns.fr header.b="lxqmvzjo" Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 9B862DBBF0; Wed, 7 May 2025 15:45:18 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cjdns.fr; s=dkim; t=1746625519; h=from:subject:date:message-id:to:cc:mime-version: content-transfer-encoding:in-reply-to:references; bh=8xUpIOJ31WmrvP6c37F2pwlE8Ac11OcAayqXYM/2Q9s=; b=lxqmvzjoFgZLMi822BVsm9RiDf5rQRpnWcGwXR0/wTbx3RI3y+g2muifdAnNxGypE90F5i a+8LQQ6ueobNUJEULWGWyvW+pwz96QXShkASCtikjaArtC0utAd7R8xM2tGCMZ2dEjAsVn qL00emLbzpeh3XuE9H1d04aRdJieyvZf75+j66h5uCwhWuyttS6XUxWC0FChOc5q1NxMaH ONcEjHCRCZxwiglcOQEuSv0YE/kjpYfpZGGZzxJdNXjffGCmxNLFC6KPf0tgFFBvMsgZI6 +vIZLPoMAcfIxz6ckWJB7NCoZlLlNOA9j2JNwwrATQShIqJhs2xIzgvR542/WQ== From: Caleb James DeLisle To: linux-mips@vger.kernel.org Cc: tglx@linutronix.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, tsbogend@alpha.franken.de, daniel.lezcano@linaro.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, benjamin.larsson@genexis.eu, linux-mediatek@lists.infradead.org, cjd@cjdns.fr, Krzysztof Kozlowski Subject: [PATCH v5 1/7] dt-bindings: timer: Add EcoNet EN751221 "HPT" CPU Timer Date: Wed, 7 May 2025 13:44:54 +0000 Message-Id: <20250507134500.390547-2-cjd@cjdns.fr> In-Reply-To: <20250507134500.390547-1-cjd@cjdns.fr> References: <20250507134500.390547-1-cjd@cjdns.fr> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Last-TLS-Session-Version: TLSv1.3 Content-Type: text/plain; charset="utf-8" Add device tree bindings for the so-called high-precision timer (HPT) in the EcoNet EN751221 SoC. Signed-off-by: Caleb James DeLisle Reviewed-by: Krzysztof Kozlowski acked-by. --- .../bindings/timer/econet,en751221-timer.yaml | 80 +++++++++++++++++++ 1 file changed, 80 insertions(+) create mode 100644 Documentation/devicetree/bindings/timer/econet,en751221= -timer.yaml diff --git a/Documentation/devicetree/bindings/timer/econet,en751221-timer.= yaml b/Documentation/devicetree/bindings/timer/econet,en751221-timer.yaml new file mode 100644 index 000000000000..c1e7c2b6afde --- /dev/null +++ b/Documentation/devicetree/bindings/timer/econet,en751221-timer.yaml @@ -0,0 +1,80 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/timer/econet,en751221-timer.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: EcoNet EN751221 High Precision Timer (HPT) + +maintainers: + - Caleb James DeLisle + +description: + The EcoNet High Precision Timer (HPT) is a timer peripheral found in var= ious + EcoNet SoCs, including the EN751221 and EN751627 families. It provides p= er-VPE + count/compare registers and a per-CPU control register, with a single in= terrupt + line using a percpu-devid interrupt mechanism. + +properties: + compatible: + oneOf: + - const: econet,en751221-timer + - items: + - const: econet,en751627-timer + - const: econet,en751221-timer + + reg: + minItems: 1 + maxItems: 2 + + interrupts: + maxItems: 1 + description: A percpu-devid timer interrupt shared across CPUs. + + clocks: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - clocks + +allOf: + - if: + properties: + compatible: + contains: + const: econet,en751627-timer + then: + properties: + reg: + items: + - description: VPE timers 0 and 1 + - description: VPE timers 2 and 3 + else: + properties: + reg: + items: + - description: VPE timers 0 and 1 + +additionalProperties: false + +examples: + - | + timer@1fbf0400 { + compatible =3D "econet,en751627-timer", "econet,en751221-timer"; + reg =3D <0x1fbf0400 0x100>, <0x1fbe0000 0x100>; + interrupt-parent =3D <&intc>; + interrupts =3D <30>; + clocks =3D <&hpt_clock>; + }; + - | + timer@1fbf0400 { + compatible =3D "econet,en751221-timer"; + reg =3D <0x1fbe0400 0x100>; + interrupt-parent =3D <&intc>; + interrupts =3D <30>; + clocks =3D <&hpt_clock>; + }; +... --=20 2.39.5 From nobody Wed Dec 17 03:48:32 2025 Received: from mail.cjdns.fr (mail.cjdns.fr [5.135.140.105]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8256828982A; Wed, 7 May 2025 13:45:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=5.135.140.105 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746625531; cv=none; b=KsPUIUVypj2iIIAnhl41+1Dh9VMlRuikG8/jZ7edeYNZp4gswnZ3XoZxYLsbqZPziUIQjO429FdG9/6+2w3elvE8YxuKKwKvGDKGEqSNbyLKHX1/6rSHjs3rWqyy8xjPoy92unGjl/WXrajR3BOV8nmr+Ggc5avWiavrQuL06XA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746625531; c=relaxed/simple; bh=denqK+0ncZOh1lyM4N8SCmbXVF0x/SlnbAJyPFPYhGg=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=bJTTEOImaoIm5h+N3jg4rk3xc3Ys567+MYzvWr1zAslLKfCO+0vzlsumQ7R7Ae9xzbQXd4XKGY687TdCApyoxSdqax0iN01CZlImMtXd33w15MpgLKhzk3GV7TxD3QAWv7N2KPYLVnpjSJeeIRRmqp9Yl+bpGOPIrLrrmqj012U= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=cjdns.fr; spf=none smtp.mailfrom=cjdns.fr; dkim=pass (2048-bit key) header.d=cjdns.fr header.i=@cjdns.fr header.b=QcGBMbt5; arc=none smtp.client-ip=5.135.140.105 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=cjdns.fr Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=cjdns.fr Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=cjdns.fr header.i=@cjdns.fr header.b="QcGBMbt5" Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 8E16DDC2C6; Wed, 7 May 2025 15:45:20 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cjdns.fr; s=dkim; t=1746625521; h=from:subject:date:message-id:to:cc:mime-version: content-transfer-encoding:in-reply-to:references; bh=/09Yyq+y4toudhD56yMocjaQ6fgipi1SWyWNNEl+nIg=; b=QcGBMbt5qc0U4e3sFZVqbGujOxU9ZsjVgHqvBikGtAIHUJKIaIbps2PwkNLEoIwZDn1Dd5 9yBgi5eySprMc53Yh59cZ0zffepI5KRVHnqK+YqozuwBGudfYewgaTOIgQTxenKJ4DrjBG q79YBJx2KhQz+AcBqDvquHyc16e93Cfsz+qNx94PaBTcldmMKiUbd52JPBCdCQyw8PjD3E E4pw341nqUFO7H9TKdWoP27tKLn46ETbcsb85K3U8rUrrvasVPbP/MhPkzDG/MZIBe2F0Z f6b3lgSUeTwnQa5FLO5O/4/N1KXXnzNJxPCxOqXNup1jYKe60+/ht4cPZmzu2A== From: Caleb James DeLisle To: linux-mips@vger.kernel.org Cc: tglx@linutronix.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, tsbogend@alpha.franken.de, daniel.lezcano@linaro.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, benjamin.larsson@genexis.eu, linux-mediatek@lists.infradead.org, cjd@cjdns.fr Subject: [PATCH v5 2/7] clocksource/drivers: Add EcoNet Timer HPT driver Date: Wed, 7 May 2025 13:44:55 +0000 Message-Id: <20250507134500.390547-3-cjd@cjdns.fr> In-Reply-To: <20250507134500.390547-1-cjd@cjdns.fr> References: <20250507134500.390547-1-cjd@cjdns.fr> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Last-TLS-Session-Version: TLSv1.3 Content-Type: text/plain; charset="utf-8" Introduce a clocksource driver for the so-called high-precision timer (HPT) in the EcoNet EN751221 and EN751627 MIPS SoCs. It's a 32 bit upward-counting one-shot timer which relies on the crystal so= it is unaffected by CPU power mode. On MIPS 34K devices (single core) there is one timer, and on 1004K devices (dual core) there are two. Each timer has two sets of count/compare registers so that there is one for each of the VPEs on the core. Because each core has 2 VPEs, register select= ion takes the CPU number / 2 for the timer corrisponding to the core, then CPU number % 2 for the register corrisponding to the VPE. These timers use a percpu-devid IRQ to route interrupts to the VPE which set the event. Signed-off-by: Caleb James DeLisle acked-by. --- Re: https://patchwork.kernel.org/project/linux-mips/patch/20250430133433.22= 222-3-cjd@cjdns.fr/#26372668 I tested CPUHP_AP_ONLINE_DYN on my patched SMP kernel and confirmed it to be working. --- drivers/clocksource/Kconfig | 8 + drivers/clocksource/Makefile | 1 + drivers/clocksource/timer-econet-en751221.c | 216 ++++++++++++++++++++ 3 files changed, 225 insertions(+) create mode 100644 drivers/clocksource/timer-econet-en751221.c diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig index 487c85259967..976afb0b2312 100644 --- a/drivers/clocksource/Kconfig +++ b/drivers/clocksource/Kconfig @@ -73,6 +73,14 @@ config DW_APB_TIMER_OF select DW_APB_TIMER select TIMER_OF =20 +config ECONET_EN751221_TIMER + bool "EcoNet EN751221 High Precision Timer" if COMPILE_TEST + depends on HAS_IOMEM + select CLKSRC_MMIO + select TIMER_OF + help + Support for CPU timer found on EcoNet MIPS based SoCs. + config FTTMR010_TIMER bool "Faraday Technology timer driver" if COMPILE_TEST depends on HAS_IOMEM diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile index 43ef16a4efa6..d2998601eda5 100644 --- a/drivers/clocksource/Makefile +++ b/drivers/clocksource/Makefile @@ -17,6 +17,7 @@ obj-$(CONFIG_CLKBLD_I8253) +=3D i8253.o obj-$(CONFIG_CLKSRC_MMIO) +=3D mmio.o obj-$(CONFIG_DAVINCI_TIMER) +=3D timer-davinci.o obj-$(CONFIG_DIGICOLOR_TIMER) +=3D timer-digicolor.o +obj-$(CONFIG_ECONET_EN751221_TIMER) +=3D timer-econet-en751221.o obj-$(CONFIG_OMAP_DM_TIMER) +=3D timer-ti-dm.o obj-$(CONFIG_OMAP_DM_SYSTIMER) +=3D timer-ti-dm-systimer.o obj-$(CONFIG_DW_APB_TIMER) +=3D dw_apb_timer.o diff --git a/drivers/clocksource/timer-econet-en751221.c b/drivers/clocksou= rce/timer-econet-en751221.c new file mode 100644 index 000000000000..3b449fdaafee --- /dev/null +++ b/drivers/clocksource/timer-econet-en751221.c @@ -0,0 +1,216 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Timer present on EcoNet EN75xx MIPS based SoCs. + * + * Copyright (C) 2025 by Caleb James DeLisle + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define ECONET_BITS 32 +#define ECONET_MIN_DELTA 0x00001000 +#define ECONET_MAX_DELTA GENMASK(ECONET_BITS - 2, 0) +/* 34Kc hardware has 1 block and 1004Kc has 2. */ +#define ECONET_NUM_BLOCKS DIV_ROUND_UP(NR_CPUS, 2) + +static struct { + void __iomem *membase[ECONET_NUM_BLOCKS]; + u32 freq_hz; +} econet_timer __ro_after_init; + +static DEFINE_PER_CPU(struct clock_event_device, econet_timer_pcpu); + +/* Each memory block has 2 timers, the order of registers is: + * CTL, CMR0, CNT0, CMR1, CNT1 + */ +static inline void __iomem *reg_ctl(u32 timer_n) +{ + return econet_timer.membase[timer_n >> 1]; +} + +static inline void __iomem *reg_compare(u32 timer_n) +{ + return econet_timer.membase[timer_n >> 1] + (timer_n & 1) * 0x08 + 0x04; +} + +static inline void __iomem *reg_count(u32 timer_n) +{ + return econet_timer.membase[timer_n >> 1] + (timer_n & 1) * 0x08 + 0x08; +} + +static inline u32 ctl_bit_enabled(u32 timer_n) +{ + return 1U << (timer_n & 1); +} + +static inline u32 ctl_bit_pending(u32 timer_n) +{ + return 1U << ((timer_n & 1) + 16); +} + +static bool cevt_is_pending(int cpu_id) +{ + return ioread32(reg_ctl(cpu_id)) & ctl_bit_pending(cpu_id); +} + +static irqreturn_t cevt_interrupt(int irq, void *dev_id) +{ + struct clock_event_device *dev =3D this_cpu_ptr(&econet_timer_pcpu); + int cpu =3D cpumask_first(dev->cpumask); + + /* Each VPE has its own events, + * so this will only happen on spurious interrupt. + */ + if (!cevt_is_pending(cpu)) + return IRQ_NONE; + + iowrite32(ioread32(reg_count(cpu)), reg_compare(cpu)); + dev->event_handler(dev); + return IRQ_HANDLED; +} + +static int cevt_set_next_event(ulong delta, struct clock_event_device *dev) +{ + u32 next; + int cpu; + + cpu =3D cpumask_first(dev->cpumask); + next =3D ioread32(reg_count(cpu)) + delta; + iowrite32(next, reg_compare(cpu)); + + if ((s32)(next - ioread32(reg_count(cpu))) < ECONET_MIN_DELTA / 2) + return -ETIME; + + return 0; +} + +static int cevt_init_cpu(uint cpu) +{ + struct clock_event_device *cd =3D &per_cpu(econet_timer_pcpu, cpu); + u32 reg; + + pr_debug("%s: Setting up clockevent for CPU %d\n", cd->name, cpu); + + reg =3D ioread32(reg_ctl(cpu)) | ctl_bit_enabled(cpu); + iowrite32(reg, reg_ctl(cpu)); + + enable_percpu_irq(cd->irq, IRQ_TYPE_NONE); + + /* Do this last because it synchronously configures the timer */ + clockevents_config_and_register(cd, econet_timer.freq_hz, + ECONET_MIN_DELTA, ECONET_MAX_DELTA); + + return 0; +} + +static u64 notrace sched_clock_read(void) +{ + /* Always read from clock zero no matter the CPU */ + return (u64)ioread32(reg_count(0)); +} + +/* Init */ + +static void __init cevt_dev_init(uint cpu) +{ + iowrite32(0, reg_count(cpu)); + iowrite32(U32_MAX, reg_compare(cpu)); +} + +static int __init cevt_init(struct device_node *np) +{ + int i, irq, ret; + + irq =3D irq_of_parse_and_map(np, 0); + if (irq <=3D 0) { + pr_err("%pOFn: irq_of_parse_and_map failed", np); + return -EINVAL; + } + + ret =3D request_percpu_irq(irq, cevt_interrupt, np->name, &econet_timer_p= cpu); + + if (ret < 0) { + pr_err("%pOFn: IRQ %d setup failed (%d)\n", np, irq, ret); + goto err_unmap_irq; + } + + for_each_possible_cpu(i) { + struct clock_event_device *cd =3D &per_cpu(econet_timer_pcpu, i); + + cd->rating =3D 310, + cd->features =3D CLOCK_EVT_FEAT_ONESHOT | + CLOCK_EVT_FEAT_C3STOP | + CLOCK_EVT_FEAT_PERCPU; + cd->set_next_event =3D cevt_set_next_event; + cd->irq =3D irq; + cd->cpumask =3D cpumask_of(i); + cd->name =3D np->name; + + cevt_dev_init(i); + } + + cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, + "clockevents/econet/timer:starting", + cevt_init_cpu, NULL); + return 0; + +err_unmap_irq: + irq_dispose_mapping(irq); + return ret; +} + +static int __init timer_init(struct device_node *np) +{ + int num_blocks =3D DIV_ROUND_UP(num_possible_cpus(), 2); + struct clk *clk; + int ret; + + clk =3D of_clk_get(np, 0); + if (IS_ERR(clk)) { + pr_err("%pOFn: Failed to get CPU clock from DT %ld\n", np, PTR_ERR(clk)); + return PTR_ERR(clk); + } + + econet_timer.freq_hz =3D clk_get_rate(clk); + + for (int i =3D 0; i < num_blocks; i++) { + econet_timer.membase[i] =3D of_iomap(np, i); + if (!econet_timer.membase[i]) { + pr_err("%pOFn: failed to map register [%d]\n", np, i); + return -ENXIO; + } + } + + /* For clocksource purposes always read clock zero, whatever the CPU */ + ret =3D clocksource_mmio_init(reg_count(0), np->name, + econet_timer.freq_hz, 301, ECONET_BITS, + clocksource_mmio_readl_up); + if (ret) { + pr_err("%pOFn: clocksource_mmio_init failed: %d", np, ret); + return ret; + } + + ret =3D cevt_init(np); + if (ret < 0) + return ret; + + sched_clock_register(sched_clock_read, ECONET_BITS, + econet_timer.freq_hz); + + pr_info("%pOFn: using %u.%03u MHz high precision timer\n", np, + econet_timer.freq_hz / 1000000, + (econet_timer.freq_hz / 1000) % 1000); + + return 0; +} + +TIMER_OF_DECLARE(econet_timer_hpt, "econet,en751221-timer", timer_init); --=20 2.39.5 From nobody Wed Dec 17 03:48:32 2025 Received: from mail.cjdns.fr (mail.cjdns.fr [5.135.140.105]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 942E728C2A9; Wed, 7 May 2025 13:45:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=5.135.140.105 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746625534; cv=none; b=eTKaeKCQuBqdCFk8Yk3eFk0XcHxspiXQjJL0nbOhwlfksRRfYNbv4HQYWCaV76uHMAvyfTwsGDhQynPlwdjI8M11sJ7MyBGLCtiwJneMQpBpGmISUs8r4Q0apOsLFtIcaJAawS3T90pW6nkGZeDyabSQq60MVYqotfhO6PpLyHg= ARC-Message-Signature: i=1; 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Wed, 7 May 2025 15:45:22 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cjdns.fr; s=dkim; t=1746625523; h=from:subject:date:message-id:to:cc:mime-version: content-transfer-encoding:in-reply-to:references; bh=WFuKeZ2Mgo5yTqNGhX/kKLsejXNkpw0wnwsa5YPEGN4=; b=ogUM7LJPbnLQIHnxka/HXJbvFDi0SF9Q5Umf+kSJ3t0HLkOvFZiVQ9CHNP94Z3KwdOQ9yJ IciAPUvVkgyQOKgmP0ndh2yyBQQqaI8jx/auNc77qJn8EGQOAcrnQ/qCLAEBp1thUlqz7e wVXt2YUbVAZSzX62q6AzxjBPsr2yAJQyguRPNgtIeksOyl4Bltehn0JSnbxWPF+ZFlSrDf kkzeQ14mcpoA/ghOt/wewUe9Wg27tcRUReI9BMMMgMsyqIHr/y22keNGCgxt1KUQOAbeWX L8wBpThMihowkLaduDvnW8Ieu4urdaMygJvdtLqmrfZbNWKPa2EurWCSWCQk2Q== From: Caleb James DeLisle To: linux-mips@vger.kernel.org Cc: tglx@linutronix.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, tsbogend@alpha.franken.de, daniel.lezcano@linaro.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, benjamin.larsson@genexis.eu, linux-mediatek@lists.infradead.org, cjd@cjdns.fr, Krzysztof Kozlowski Subject: [PATCH v5 3/7] dt-bindings: mips: Add EcoNet platform binding Date: Wed, 7 May 2025 13:44:56 +0000 Message-Id: <20250507134500.390547-4-cjd@cjdns.fr> In-Reply-To: <20250507134500.390547-1-cjd@cjdns.fr> References: <20250507134500.390547-1-cjd@cjdns.fr> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Last-TLS-Session-Version: TLSv1.3 Content-Type: text/plain; charset="utf-8" Document the top-level device tree binding for EcoNet MIPS-based SoCs. Signed-off-by: Caleb James DeLisle Reviewed-by: Krzysztof Kozlowski acked-by. --- .../devicetree/bindings/mips/econet.yaml | 26 +++++++++++++++++++ 1 file changed, 26 insertions(+) create mode 100644 Documentation/devicetree/bindings/mips/econet.yaml diff --git a/Documentation/devicetree/bindings/mips/econet.yaml b/Documenta= tion/devicetree/bindings/mips/econet.yaml new file mode 100644 index 000000000000..d8181b58c781 --- /dev/null +++ b/Documentation/devicetree/bindings/mips/econet.yaml @@ -0,0 +1,26 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mips/econet.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: EcoNet MIPS SoCs + +maintainers: + - Caleb James DeLisle + +properties: + $nodename: + const: '/' + + compatible: + oneOf: + - description: Boards with EcoNet EN751221 family SoC + items: + - enum: + - smartfiber,xp8421-b + - const: econet,en751221 + +additionalProperties: true + +... --=20 2.39.5 From nobody Wed Dec 17 03:48:32 2025 Received: from mail.cjdns.fr (mail.cjdns.fr [5.135.140.105]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B54E4223DF1; Wed, 7 May 2025 13:45:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=5.135.140.105 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746625529; cv=none; b=L3lnNxNaXeTPsm3doY4wsoFvMWCNqOStRJSz55fr6iMFPcKMnIBHIuZdjQKWAAPPPScUlKHhf4G852x1uoHMOYDlW5Sk0DOia1qM3n9Wo5o6XewYPZ9gOWtUYCuYtBcembNm3azvVOPgcP6RlmkkVDgknZduWo5DPtN8XZgqx5M= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746625529; c=relaxed/simple; bh=E/Q/2B/8HGFcYfTNIcOEC+iIF57GHPFB6Ji15bPzudk=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=Tqllx5gBqSKjIBMOncqZ56BUGskSOBQmdC9KMLBxmst6uAlAy2zbQ5bkC01oCCdy1nM4n1QMLnW5cK8HR/PEU9u3aaxvipLPnws+z9K/m1ASxLWxHCEO8c9l0u1dR+lBt54C8RBMPKRzbOIo1GL4UPYELhJ6py4La7gr3KGBQDA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=cjdns.fr; spf=none smtp.mailfrom=cjdns.fr; dkim=pass (2048-bit key) header.d=cjdns.fr header.i=@cjdns.fr header.b=IpSWT+Aj; arc=none smtp.client-ip=5.135.140.105 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=cjdns.fr Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=cjdns.fr Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=cjdns.fr header.i=@cjdns.fr header.b="IpSWT+Aj" Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id F2051DAE5F; Wed, 7 May 2025 15:45:23 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cjdns.fr; s=dkim; t=1746625525; h=from:subject:date:message-id:to:cc:mime-version: content-transfer-encoding:in-reply-to:references; bh=1zx7YDdH6fuEhBMxor2eO5pbMGS8qLPBBpxZ7MXsTD8=; b=IpSWT+Aj5LZg37tlEwSK9bNtzYj4ltYKJlgRUOKgX3Ju3wuw2kkdgtFERZC5WMy62kAzU4 JXGHJw2Kv9Rxm3OcWlsKvKElLpaoSc9vs4lGtpRgX6wkPQFRtaDD3yKg549fVao4zGQPgG GG4DAgNnGo5vs018M324bo/pEpnCbuW1s5FyH4cVgJbkn9r1Y+fMynqzaE45CbhAwqTJTn d7Y51jb9F9ISt/BSMy5g+Ym1ScNFd45qZG4vo3jH5dgc/XWVd7Dg2Haa9BkDtFHCJnslEF X7DJsa8nTvYUW9tK83WfDCcKhzHeQ6ScKIkZKlEK7kKOoWgDl1GKKnHEfxh3Jw== From: Caleb James DeLisle To: linux-mips@vger.kernel.org Cc: tglx@linutronix.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, tsbogend@alpha.franken.de, daniel.lezcano@linaro.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, benjamin.larsson@genexis.eu, linux-mediatek@lists.infradead.org, cjd@cjdns.fr Subject: [PATCH v5 4/7] mips: Add EcoNet MIPS platform support Date: Wed, 7 May 2025 13:44:57 +0000 Message-Id: <20250507134500.390547-5-cjd@cjdns.fr> In-Reply-To: <20250507134500.390547-1-cjd@cjdns.fr> References: <20250507134500.390547-1-cjd@cjdns.fr> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Last-TLS-Session-Version: TLSv1.3 Content-Type: text/plain; charset="utf-8" Add platform support for EcoNet MIPS SoCs. Signed-off-by: Caleb James DeLisle acked-by. --- arch/mips/Kbuild.platforms | 1 + arch/mips/Kconfig | 25 +++++++++ arch/mips/boot/compressed/uart-16550.c | 5 ++ arch/mips/econet/Kconfig | 37 ++++++++++++ arch/mips/econet/Makefile | 2 + arch/mips/econet/Platform | 5 ++ arch/mips/econet/init.c | 78 ++++++++++++++++++++++++++ 7 files changed, 153 insertions(+) create mode 100644 arch/mips/econet/Kconfig create mode 100644 arch/mips/econet/Makefile create mode 100644 arch/mips/econet/Platform create mode 100644 arch/mips/econet/init.c diff --git a/arch/mips/Kbuild.platforms b/arch/mips/Kbuild.platforms index bca37ddf974b..41a00fa860c1 100644 --- a/arch/mips/Kbuild.platforms +++ b/arch/mips/Kbuild.platforms @@ -11,6 +11,7 @@ platform-$(CONFIG_CAVIUM_OCTEON_SOC) +=3D cavium-octeon/ platform-$(CONFIG_EYEQ) +=3D mobileye/ platform-$(CONFIG_MIPS_COBALT) +=3D cobalt/ platform-$(CONFIG_MACH_DECSTATION) +=3D dec/ +platform-$(CONFIG_ECONET) +=3D econet/ platform-$(CONFIG_MIPS_GENERIC) +=3D generic/ platform-$(CONFIG_MACH_JAZZ) +=3D jazz/ platform-$(CONFIG_LANTIQ) +=3D lantiq/ diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index e0e6ce2592b4..c3dbdc808664 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -391,6 +391,30 @@ config MACH_DECSTATION =20 otherwise choose R3000. =20 +config ECONET + bool "EcoNet MIPS family" + select BOOT_RAW + select CPU_BIG_ENDIAN + select DEBUG_ZBOOT + select EARLY_PRINTK_8250 + select ECONET_EN751221_TIMER + select SERIAL_OF_PLATFORM + select SYS_SUPPORTS_BIG_ENDIAN + select SYS_HAS_CPU_MIPS32_R1 + select SYS_HAS_CPU_MIPS32_R2 + select SYS_HAS_EARLY_PRINTK + select SYS_SUPPORTS_32BIT_KERNEL + select SYS_SUPPORTS_MIPS16 + select SYS_SUPPORTS_ZBOOT_UART16550 + select USE_GENERIC_EARLY_PRINTK_8250 + select USE_OF + help + EcoNet EN75xx MIPS devices are big endian MIPS machines used + in XPON (fiber) and DSL applications. They have SPI, PCI, USB, + GPIO, and Ethernet, with optional XPON, DSL, and VoIP DSP cores. + Don't confuse these with the Airoha ARM devices sometimes referred + to as "EcoNet", this family is for MIPS based devices only. + config MACH_JAZZ bool "Jazz family of machines" select ARC_MEMORY @@ -1021,6 +1045,7 @@ source "arch/mips/ath79/Kconfig" source "arch/mips/bcm47xx/Kconfig" source "arch/mips/bcm63xx/Kconfig" source "arch/mips/bmips/Kconfig" +source "arch/mips/econet/Kconfig" source "arch/mips/generic/Kconfig" source "arch/mips/ingenic/Kconfig" source "arch/mips/jazz/Kconfig" diff --git a/arch/mips/boot/compressed/uart-16550.c b/arch/mips/boot/compre= ssed/uart-16550.c index db618e72a0c4..529e77a6487c 100644 --- a/arch/mips/boot/compressed/uart-16550.c +++ b/arch/mips/boot/compressed/uart-16550.c @@ -20,6 +20,11 @@ #define PORT(offset) (CKSEG1ADDR(INGENIC_UART_BASE_ADDR) + (4 * offset)) #endif =20 +#ifdef CONFIG_ECONET +#define EN75_UART_BASE 0x1fbf0003 +#define PORT(offset) (CKSEG1ADDR(EN75_UART_BASE) + (4 * (offset))) +#endif + #ifndef IOTYPE #define IOTYPE char #endif diff --git a/arch/mips/econet/Kconfig b/arch/mips/econet/Kconfig new file mode 100644 index 000000000000..d03f90f3daa4 --- /dev/null +++ b/arch/mips/econet/Kconfig @@ -0,0 +1,37 @@ +# SPDX-License-Identifier: GPL-2.0 +if ECONET + +choice + prompt "EcoNet SoC selection" + default SOC_ECONET_EN751221 + help + Select EcoNet MIPS SoC type. Individual SoCs within a family are + very similar, so is it enough to select the right family, and + then customize to the specific SoC using the device tree only. + + config SOC_ECONET_EN751221 + bool "EN751221 family" + select COMMON_CLK + select ECONET_EN751221_INTC + select IRQ_MIPS_CPU + select SMP + select SMP_UP + select SYS_SUPPORTS_SMP + help + The EN751221 family includes EN7512, RN7513, EN7521, EN7526. + They are based on single core MIPS 34Kc processors. To boot + this kernel, you will need a device tree such as + MIPS_RAW_APPENDED_DTB=3Dy, and a root filesystem. +endchoice + +choice + prompt "Devicetree selection" + default DTB_ECONET_NONE + help + Select the devicetree. + + config DTB_ECONET_NONE + bool "None" +endchoice + +endif diff --git a/arch/mips/econet/Makefile b/arch/mips/econet/Makefile new file mode 100644 index 000000000000..7e4529e7d3d7 --- /dev/null +++ b/arch/mips/econet/Makefile @@ -0,0 +1,2 @@ + +obj-y :=3D init.o diff --git a/arch/mips/econet/Platform b/arch/mips/econet/Platform new file mode 100644 index 000000000000..ea5616447bcd --- /dev/null +++ b/arch/mips/econet/Platform @@ -0,0 +1,5 @@ +# To address a 7.2MB kernel size limit in the EcoNet SDK bootloader, +# we put the load address well above where the bootloader loads and then u= se +# zboot. So please set CONFIG_ZBOOT_LOAD_ADDRESS to the address where your +# bootloader actually places the kernel. +load-$(CONFIG_ECONET) +=3D 0xffffffff81000000 diff --git a/arch/mips/econet/init.c b/arch/mips/econet/init.c new file mode 100644 index 000000000000..6f43ffb209cb --- /dev/null +++ b/arch/mips/econet/init.c @@ -0,0 +1,78 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * EcoNet setup code + * + * Copyright (C) 2025 Caleb James DeLisle + */ + +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include + +#define CR_AHB_RSTCR ((void __iomem *)CKSEG1ADDR(0x1fb00040)) +#define RESET BIT(31) + +#define UART_BASE CKSEG1ADDR(0x1fbf0003) +#define UART_REG_SHIFT 2 + +static void hw_reset(char *command) +{ + iowrite32(RESET, CR_AHB_RSTCR); +} + +/* 1. Bring up early printk. */ +void __init prom_init(void) +{ + setup_8250_early_printk_port(UART_BASE, UART_REG_SHIFT, 0); + _machine_restart =3D hw_reset; +} + +/* 2. Parse the DT and find memory */ +void __init plat_mem_setup(void) +{ + void *dtb; + + set_io_port_base(KSEG1); + + dtb =3D get_fdt(); + if (!dtb) + panic("no dtb found"); + + __dt_setup_arch(dtb); + + early_init_dt_scan_memory(); +} + +/* 3. Overload __weak device_tree_init(), add SMP_UP ops */ +void __init device_tree_init(void) +{ + unflatten_and_copy_device_tree(); + + register_up_smp_ops(); +} + +const char *get_system_type(void) +{ + return "EcoNet-EN75xx"; +} + +/* 4. Initialize the IRQ subsystem */ +void __init arch_init_irq(void) +{ + irqchip_init(); +} + +/* 5. Timers */ +void __init plat_time_init(void) +{ + of_clk_init(NULL); + timer_probe(); +} --=20 2.39.5 From nobody Wed Dec 17 03:48:32 2025 Received: from mail.cjdns.fr (mail.cjdns.fr [5.135.140.105]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 27BED289E25; Wed, 7 May 2025 13:45:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=5.135.140.105 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746625533; cv=none; b=YH4S4ncGC/ypP6x3r+h36GH+owSYoBNPYxlv4WnqvqrBbMfJNiYKWYJq9XQ7PpWumzV0PMoEPv761ZHUYpIUBpUhxQEG/3UP4iaS1/IlOwflorE5ZgtY3w4t7FdVnV9ZtnNyB2tqeeiRS12loxg4IXVLhJ8HS3eMsKAXOk4phDg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746625533; c=relaxed/simple; bh=w/28cHd7sQVZd4bwz0tqFSqlXQVwghn1QbYmCYK1D60=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; b=Z4L9tnTXbz73/Ox35THCH9o6/O8AI7VYXxFLZ29J/4fx81cLqwFBe64BiPvJBqkhEI6bk9+fXyKS60XzTxCpxrpBvZy2EIqkMIfw7j6jT2FLiRp/6rJCBdrIkLDuV1aiw/lUhSqsYdel/qS8dT3b0DqkW0K7n61kfjCPb/EvcvU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=cjdns.fr; spf=none smtp.mailfrom=cjdns.fr; dkim=pass (2048-bit key) header.d=cjdns.fr header.i=@cjdns.fr header.b=HtdWb82G; arc=none smtp.client-ip=5.135.140.105 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=cjdns.fr Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=cjdns.fr Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=cjdns.fr header.i=@cjdns.fr header.b="HtdWb82G" Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id AE9E3DC0BD; Wed, 7 May 2025 15:45:25 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cjdns.fr; s=dkim; t=1746625527; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=GIq50VzAPDRvLfqv8bBnT6iyvFUQl6Hp2zh7m8sObPA=; b=HtdWb82G5zQkpA68ouf6UH5dh8CDKtDKpSW3/mS+wtaQh4NDizUO1L1EhL0VDwmZGKr9f1 VXek7LWdJ5bKMWnFJBNcR5ReS8OoN1DoCCX/LZlmYwn8eno7DbcpuJC1slkfnL13Tj4RU9 CGDOSUKPkk5qGLH7SkBdenVpDDsvkBnSGlQWJuXSYwI6U3n8YBsk2ryUCb6HHmQ6l8vkrH iNQbu0I96Vf/wtR0vVkyKadRyczKvxKvrKUirBY1YhlxTrD8WK3fP1uR283QlRb+wkjmu7 uhwY2T7Oo7sYbLyL9twz1LrebYswzXg4R8fokR9OM9ML7rPk/ILbaDcseqN0VQ== From: Caleb James DeLisle To: linux-mips@vger.kernel.org Cc: tglx@linutronix.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, tsbogend@alpha.franken.de, daniel.lezcano@linaro.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, benjamin.larsson@genexis.eu, linux-mediatek@lists.infradead.org, cjd@cjdns.fr, Krzysztof Kozlowski , =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH v5 5/7] dt-bindings: vendor-prefixes: Add SmartFiber Date: Wed, 7 May 2025 13:44:58 +0000 Message-Id: <20250507134500.390547-6-cjd@cjdns.fr> In-Reply-To: <20250507134500.390547-1-cjd@cjdns.fr> References: <20250507134500.390547-1-cjd@cjdns.fr> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Last-TLS-Session-Version: TLSv1.3 Add "smartfiber" vendor prefix for manufactorer of EcoNet based boards. Signed-off-by: Caleb James DeLisle Acked-by: Krzysztof Kozlowski Reviewed-by: Philippe Mathieu-Daud=C3=A9 acked-by. --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Docum= entation/devicetree/bindings/vendor-prefixes.yaml index 86f6a19b28ae..421fd5c2e41c 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -1396,6 +1396,8 @@ patternProperties: description: SKOV A/S "^skyworks,.*": description: Skyworks Solutions, Inc. + "^smartfiber,.*": + description: ShenZhen Smartfiber Technology Co, Ltd. "^smartlabs,.*": description: SmartLabs LLC "^smartrg,.*": --=20 2.39.5 From nobody Wed Dec 17 03:48:32 2025 Received: from mail.cjdns.fr (mail.cjdns.fr [5.135.140.105]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 56F7B289E31; Wed, 7 May 2025 13:45:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=5.135.140.105 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746625533; cv=none; b=XVBzD2pgEu7adoul9cReZG7Ywoo70RNnH71RP6t/ZirhxZCUZSjmXxtM9+4Em10fXj83+ssNNA1HEaQ0ZIfJe0CHsI+RyOfgT0FrUwouZEDle/1IuoX1fyK/ISeorWoWeLBo2LjNQb1iZofBcUGAwufTQnfM2BT/rY0eZSDJMlQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746625533; c=relaxed/simple; bh=oX+Ztd25v66Sb5REJQd42xqs/ojNkFh/oLIAFsDAtw0=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=hTl8RbRdEUhBN1LLtEPRNOvQpvvCh2Q6KtoMKsPWmZM0it8gcuCHv8fuUkFCAtyOkquINuYS3/7dS1RBIiGuMym/Pz/qYF6tSlwiZddCVy4bBH/u23BS3yffJaGbmDimf6EPOfA5X8nCxRflQD4fK6xxNbMDW14PuYCCcdJ2aGs= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=cjdns.fr; spf=none smtp.mailfrom=cjdns.fr; dkim=pass (2048-bit key) header.d=cjdns.fr header.i=@cjdns.fr header.b=A1rgmmI/; arc=none smtp.client-ip=5.135.140.105 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=cjdns.fr Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=cjdns.fr Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=cjdns.fr header.i=@cjdns.fr header.b="A1rgmmI/" Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id EF2D4DCBA1; Wed, 7 May 2025 15:45:27 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cjdns.fr; s=dkim; t=1746625529; h=from:subject:date:message-id:to:cc:mime-version: content-transfer-encoding:in-reply-to:references; bh=YUv2jrm/2nVKMFeBecycu6Y/zhH0/c7aL9vxZ/qJMkw=; b=A1rgmmI/lev6kS1xcuFO2Y/SUuTN1eaMucREkY4ZmVHtFZqf+R1zNQNL3sHXtIWiS0kiZY WG0VjWlC/WlIdw9gUDXvV9SwWV2s/2vOIBo4J7PPkunzKp2/LWU83+VVPNCmOTixRHRjd+ pm5lWetPkVfI6mv5F2TFEonFhvIKnGRDF7alO+2dtcpiHCKFtuPSjkuuCPXNWy7wtwQnC0 QL3YM8Gc3NhbQwYKyPFwUhPimq3vot0FUqFXgyP25gSDW+Dj9fjF3FUqoUr2hQXq2sOI58 dHPCjVXy1NE8iwlgBsmPiLZO5Z0IYZbO82rIrs+G3p8GBaVkAs6fG6Xg1nMfqw== From: Caleb James DeLisle To: linux-mips@vger.kernel.org Cc: tglx@linutronix.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, tsbogend@alpha.franken.de, daniel.lezcano@linaro.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, benjamin.larsson@genexis.eu, linux-mediatek@lists.infradead.org, cjd@cjdns.fr Subject: [PATCH v5 6/7] mips: dts: Add EcoNet DTS with EN751221 and SmartFiber XP8421-B board Date: Wed, 7 May 2025 13:44:59 +0000 Message-Id: <20250507134500.390547-7-cjd@cjdns.fr> In-Reply-To: <20250507134500.390547-1-cjd@cjdns.fr> References: <20250507134500.390547-1-cjd@cjdns.fr> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Last-TLS-Session-Version: TLSv1.3 Content-Type: text/plain; charset="utf-8" Add DTS files in support of EcoNet platform, including SmartFiber XP8421-B, a low cost commercially available board based on EN751221. Signed-off-by: Caleb James DeLisle acked-by. --- arch/mips/boot/dts/Makefile | 1 + arch/mips/boot/dts/econet/Makefile | 2 + arch/mips/boot/dts/econet/en751221.dtsi | 67 +++++++++++++++++++ .../econet/en751221_smartfiber_xp8421-b.dts | 19 ++++++ arch/mips/econet/Kconfig | 11 +++ 5 files changed, 100 insertions(+) create mode 100644 arch/mips/boot/dts/econet/Makefile create mode 100644 arch/mips/boot/dts/econet/en751221.dtsi create mode 100644 arch/mips/boot/dts/econet/en751221_smartfiber_xp8421-b.= dts diff --git a/arch/mips/boot/dts/Makefile b/arch/mips/boot/dts/Makefile index ff468439a8c4..7375c6ced82b 100644 --- a/arch/mips/boot/dts/Makefile +++ b/arch/mips/boot/dts/Makefile @@ -1,6 +1,7 @@ # SPDX-License-Identifier: GPL-2.0 subdir-$(CONFIG_BMIPS_GENERIC) +=3D brcm subdir-$(CONFIG_CAVIUM_OCTEON_SOC) +=3D cavium-octeon +subdir-$(CONFIG_ECONET) +=3D econet subdir-$(CONFIG_EYEQ) +=3D mobileye subdir-$(CONFIG_FIT_IMAGE_FDT_MARDUK) +=3D img subdir-$(CONFIG_FIT_IMAGE_FDT_BOSTON) +=3D img diff --git a/arch/mips/boot/dts/econet/Makefile b/arch/mips/boot/dts/econet= /Makefile new file mode 100644 index 000000000000..b467d5624e39 --- /dev/null +++ b/arch/mips/boot/dts/econet/Makefile @@ -0,0 +1,2 @@ +# SPDX-License-Identifier: GPL-2.0 +dtb-$(CONFIG_DTB_ECONET_SMARTFIBER_XP8421_B) +=3D en751221_smartfiber_xp84= 21-b.dtb diff --git a/arch/mips/boot/dts/econet/en751221.dtsi b/arch/mips/boot/dts/e= conet/en751221.dtsi new file mode 100644 index 000000000000..66197e73d4f0 --- /dev/null +++ b/arch/mips/boot/dts/econet/en751221.dtsi @@ -0,0 +1,67 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +/dts-v1/; + +/ { + compatible =3D "econet,en751221"; + #address-cells =3D <1>; + #size-cells =3D <1>; + + hpt_clock: clock { + compatible =3D "fixed-clock"; + #clock-cells =3D <0>; + clock-frequency =3D <200000000>; /* 200 MHz */ + }; + + cpus: cpus { + #address-cells =3D <1>; + #size-cells =3D <0>; + + cpu@0 { + device_type =3D "cpu"; + compatible =3D "mips,mips24KEc"; + reg =3D <0>; + }; + }; + + cpuintc: interrupt-controller { + compatible =3D "mti,cpu-interrupt-controller"; + interrupt-controller; + #address-cells =3D <0>; + #interrupt-cells =3D <1>; + }; + + intc: interrupt-controller@1fb40000 { + compatible =3D "econet,en751221-intc"; + reg =3D <0x1fb40000 0x100>; + interrupt-parent =3D <&cpuintc>; + interrupts =3D <2>; + + interrupt-controller; + #interrupt-cells =3D <1>; + econet,shadow-interrupts =3D <7 2>, <8 3>, <13 12>, <30 29>; + }; + + uart: serial@1fbf0000 { + compatible =3D "ns16550"; + reg =3D <0x1fbf0000 0x30>; + reg-io-width =3D <4>; + reg-shift =3D <2>; + interrupt-parent =3D <&intc>; + interrupts =3D <0>; + /* + * Conversion of baud rate to clock frequency requires a + * computation that is not in the ns16550 driver, so this + * uart is fixed at 115200 baud. + */ + clock-frequency =3D <1843200>; + }; + + timer_hpt: timer@1fbf0400 { + compatible =3D "econet,en751221-timer"; + reg =3D <0x1fbf0400 0x100>; + + interrupt-parent =3D <&intc>; + interrupts =3D <30>; + clocks =3D <&hpt_clock>; + }; +}; diff --git a/arch/mips/boot/dts/econet/en751221_smartfiber_xp8421-b.dts b/a= rch/mips/boot/dts/econet/en751221_smartfiber_xp8421-b.dts new file mode 100644 index 000000000000..8223c5bce67f --- /dev/null +++ b/arch/mips/boot/dts/econet/en751221_smartfiber_xp8421-b.dts @@ -0,0 +1,19 @@ +// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +/dts-v1/; + +#include "en751221.dtsi" + +/ { + model =3D "SmartFiber XP8421-B"; + compatible =3D "smartfiber,xp8421-b", "econet,en751221"; + + memory@0 { + device_type =3D "memory"; + reg =3D <0x00000000 0x1c000000>; + }; + + chosen { + stdout-path =3D "/serial@1fbf0000:115200"; + linux,usable-memory-range =3D <0x00020000 0x1bfe0000>; + }; +}; diff --git a/arch/mips/econet/Kconfig b/arch/mips/econet/Kconfig index d03f90f3daa4..fd69884cc9a8 100644 --- a/arch/mips/econet/Kconfig +++ b/arch/mips/econet/Kconfig @@ -32,6 +32,17 @@ choice =20 config DTB_ECONET_NONE bool "None" + + config DTB_ECONET_SMARTFIBER_XP8421_B + bool "EN751221 SmartFiber XP8421-B" + depends on SOC_ECONET_EN751221 + select BUILTIN_DTB + help + The SmartFiber XP8421-B is a device based on the EN751221 SoC. + It has 512MB of memory and 256MB of NAND flash. This kernel + needs only an appended initramfs to boot. It can be loaded + through XMODEM and booted from memory in the bootloader, or + it can be packed in tclinux.trx format and written to flash. endchoice =20 endif --=20 2.39.5 From nobody Wed Dec 17 03:48:32 2025 Received: from mail.cjdns.fr (mail.cjdns.fr [5.135.140.105]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3576928CF45; Wed, 7 May 2025 13:45:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=5.135.140.105 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746625534; cv=none; b=acPyryi91h4cWkebGpRAx9SfYVJ3u5yR2Z2CGpVtl+vAA3x8hX38hC3/aAvZ4Fj8yxp0MKA+dSOUxj2deM+TaVR/EXIKziLQGE2VRMG6TgIehdS8r4U49dDTW/PuVD9F/UCp1HJu2RKh13DAN1sWDUtRlzbLy4Ql9g2BSkXGMUE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746625534; c=relaxed/simple; bh=UyLSGrPjMNhTJSLUqGX4FZHiCmrxwwb/RNLZ4loGzhA=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; b=oO2ySaQ1kPtBRlC/y441o6mFrnIDtHAaEsWKpHuJi0i3SRInHd1CK3hnVwt5mQaXExB34ha9LwLw7ctuK6jZB+TsRWDGjAoGbV+bt7nVxdzBEeyzjd9YvsCdbkCtveCR4BmWFDgC2vO5tPuWCx8mMcF+M0+DsONAPWWUaIVKleI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=cjdns.fr; spf=none smtp.mailfrom=cjdns.fr; dkim=pass (2048-bit key) header.d=cjdns.fr header.i=@cjdns.fr header.b=YfrfliAf; arc=none smtp.client-ip=5.135.140.105 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=cjdns.fr Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=cjdns.fr Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=cjdns.fr header.i=@cjdns.fr header.b="YfrfliAf" Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 9A800DCC5F; Wed, 7 May 2025 15:45:29 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cjdns.fr; s=dkim; t=1746625531; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=lrjxiKt7lKLcOgSH2fhDYWG/J++M1ZtRLxV3n+zZByw=; b=YfrfliAfVwmRInkw0wX0s6Jq9OXbEAZINo2ysDegfPFdv4uK0AqxMe8kfOOXOaLb01U8tc ReDRmpGvanRTAOttouvbfsg7nzBGhGKHGOnpVNmXBzVlgyPHl/Na1UvwKcFmmNoX/JsPqD i8s1+1RPjxmfCBGfgZBf0OF5vvYst0tr9BQelpz4CuumzyWAkCeBD64gaulNfuSyImHZn4 dycayg7KB2OIxaryaaygJwefQ/WZRRPUP/95KiCwWwxQrWfiNFlbSf2iEt+70Au7q4AYHp luS+TyeK7tIQE8qGVQ7LKpGWgEe1EhEPG546aSysgjsIxF02Z+zdQ58XU5txpg== From: Caleb James DeLisle To: linux-mips@vger.kernel.org Cc: tglx@linutronix.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, tsbogend@alpha.franken.de, daniel.lezcano@linaro.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, benjamin.larsson@genexis.eu, linux-mediatek@lists.infradead.org, cjd@cjdns.fr, =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= Subject: [PATCH v5 7/7] MAINTAINERS: Add entry for newly added EcoNet platform. Date: Wed, 7 May 2025 13:45:00 +0000 Message-Id: <20250507134500.390547-8-cjd@cjdns.fr> In-Reply-To: <20250507134500.390547-1-cjd@cjdns.fr> References: <20250507134500.390547-1-cjd@cjdns.fr> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Last-TLS-Session-Version: TLSv1.3 Add a MAINTAINERS entry as part of integration of the EcoNet MIPS platform. Signed-off-by: Caleb James DeLisle Reviewed-by: Philippe Mathieu-Daud=C3=A9 acked-by. --- MAINTAINERS | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 96b827049501..5b2536150996 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -8352,6 +8352,18 @@ W: https://linuxtv.org Q: http://patchwork.linuxtv.org/project/linux-media/list/ F: drivers/media/dvb-frontends/ec100* =20 +ECONET MIPS PLATFORM +M: Caleb James DeLisle +L: linux-mips@vger.kernel.org +S: Maintained +F: Documentation/devicetree/bindings/interrupt-controller/econet,en751221-= intc.yaml +F: Documentation/devicetree/bindings/mips/econet.yaml +F: Documentation/devicetree/bindings/timer/econet,en751221-timer.yaml +F: arch/mips/boot/dts/econet/ +F: arch/mips/econet/ +F: drivers/clocksource/timer-econet-en751221.c +F: drivers/irqchip/irq-econet-en751221.c + ECRYPT FILE SYSTEM M: Tyler Hicks L: ecryptfs@vger.kernel.org --=20 2.39.5