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Tue, 06 May 2025 08:49:07 -0700 (PDT) Date: Tue, 6 May 2025 17:45:36 +0200 In-Reply-To: <20250506154532.1281909-5-ardb+git@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20250506154532.1281909-5-ardb+git@google.com> X-Developer-Key: i=ardb@kernel.org; a=openpgp; fpr=F43D03328115A198C90016883D200E9CA6329909 X-Developer-Signature: v=1; a=openpgp-sha256; l=3372; i=ardb@kernel.org; h=from:subject; bh=U4da3pe3bayT4rcjjKJgvtQ0xfj6r7owSlhpuJafX3c=; b=owGbwMvMwCFmkMcZplerG8N4Wi2JIUNKb2HD/ZvhzAv3vPySeXGuVVOLg9tElXsBb/u+GiopP 7z17IxERykLgxgHg6yYIovA7L/vdp6eKFXrPEsWZg4rE8gQBi5OAZhIzXyGf4qTzh+/p2r0Y82X 8P2rVsy4WKd0pXReyxHt/463bKynNagzMvx/tlGkOnn7m217Uxb4xTv9E131NNpYIFTiX1yPsBU nGycA X-Mailer: git-send-email 2.49.0.987.g0cc8ee98dc-goog Message-ID: <20250506154532.1281909-8-ardb+git@google.com> Subject: [RFC PATCH 3/3] x86/boot: Use alternatives based selector for 5-level paging constants From: Ard Biesheuvel To: linux-kernel@vger.kernel.org Cc: x86@kernel.org, Ard Biesheuvel , Ingo Molnar , Linus Torvalds Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Ard Biesheuvel There are a couple of cases where pgtable_l5_enabled() is not used for control flow, but for selecting the value of a global constant. There are some other occurrences of such constants where the value is stored in a global variable that needs to be assigned sufficiently early. To make this more robust, base all of these on a new helper that uses alternatives based code patching to select one of two immediate values, based on whether 5 level paging is in use. Base this on __pgtable_l5_enabled, which is guaranteed to be set to the right value before C code ever observes it. This allows the helper to have the 'const' attribute. Signed-off-by: Ard Biesheuvel --- arch/x86/include/asm/page_64_types.h | 2 +- arch/x86/include/asm/pgtable_64_types.h | 28 +++++++++++++++++--- 2 files changed, 26 insertions(+), 4 deletions(-) diff --git a/arch/x86/include/asm/page_64_types.h b/arch/x86/include/asm/pa= ge_64_types.h index 1faa8f88850a..c5631dc4ab16 100644 --- a/arch/x86/include/asm/page_64_types.h +++ b/arch/x86/include/asm/page_64_types.h @@ -54,7 +54,7 @@ #define __PHYSICAL_MASK_SHIFT 52 =20 #ifdef CONFIG_X86_5LEVEL -#define __VIRTUAL_MASK_SHIFT (pgtable_l5_enabled() ? 56 : 47) +#define __VIRTUAL_MASK_SHIFT (choose_l5_enabled(56, 47)) /* See task_size_max() in */ #else #define __VIRTUAL_MASK_SHIFT 47 diff --git a/arch/x86/include/asm/pgtable_64_types.h b/arch/x86/include/asm= /pgtable_64_types.h index 2c498d16609c..bb4f54ac2e62 100644 --- a/arch/x86/include/asm/pgtable_64_types.h +++ b/arch/x86/include/asm/pgtable_64_types.h @@ -43,6 +43,28 @@ static inline bool __attribute_const__ pgtable_l5_enable= d(void) t_no: return false; } + +static inline int __attribute_const__ choose_l5_enabled(int yes, int no) +{ + int ret =3D no; + + asm_inline(ALTERNATIVE_TERNARY("jmp 6f; 8:", %c[feat], "movl %[yes], %[re= t]", "") + " .pushsection .altinstr_aux,\"ax\" \n" + "6: pushfq \n" + " testb $1, %a[l5en] \n" + " jz 7f \n" + " movl %[yes], %[ret] \n" + "7: popfq \n" + " jmp 8b \n" + " .popsection \n" + : [ret] "+rm" (ret) + : [feat] "i" (X86_FEATURE_LA57), + [yes] "i" (yes), + [l5en] "i" (&__pgtable_l5_enabled)); + + return ret; +} + #else #define pgtable_l5_enabled() 0 #endif /* CONFIG_X86_5LEVEL */ @@ -59,7 +81,7 @@ extern unsigned int ptrs_per_p4d; /* * PGDIR_SHIFT determines what a top-level page table entry can map */ -#define PGDIR_SHIFT pgdir_shift +#define PGDIR_SHIFT choose_l5_enabled(48, 39) #define PTRS_PER_PGD 512 =20 /* @@ -67,7 +89,7 @@ extern unsigned int ptrs_per_p4d; */ #define P4D_SHIFT 39 #define MAX_PTRS_PER_P4D 512 -#define PTRS_PER_P4D ptrs_per_p4d +#define PTRS_PER_P4D choose_l5_enabled(MAX_PTRS_PER_P4D, 1) #define P4D_SIZE (_AC(1, UL) << P4D_SHIFT) #define P4D_MASK (~(P4D_SIZE - 1)) =20 @@ -138,7 +160,7 @@ extern unsigned int ptrs_per_p4d; =20 #ifdef CONFIG_DYNAMIC_MEMORY_LAYOUT # define VMALLOC_START vmalloc_base -# define VMALLOC_SIZE_TB (pgtable_l5_enabled() ? VMALLOC_SIZE_TB_L5 : VMAL= LOC_SIZE_TB_L4) +# define VMALLOC_SIZE_TB ((unsigned long)choose_l5_enabled(VMALLOC_SIZE_TB= _L5, VMALLOC_SIZE_TB_L4)) # define VMEMMAP_START vmemmap_base #else # define VMALLOC_START __VMALLOC_BASE_L4 --=20 2.49.0.987.g0cc8ee98dc-goog