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Peter Anvin" , John Ogness , x86@kernel.org, x86-cpuid@lists.linux.dev, LKML , "Ahmed S. Darwish" Subject: [PATCH v1 14/26] x86/cpuid: Introduce scanned CPUID(0x2) API Date: Tue, 6 May 2025 07:04:25 +0200 Message-ID: <20250506050437.10264-15-darwi@linutronix.de> In-Reply-To: <20250506050437.10264-1-darwi@linutronix.de> References: <20250506050437.10264-1-darwi@linutronix.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add a new iterator macro, for_each_scanned_leaf_0x2_entry(), for parsing scanned CPUID(0x2) entries as 1-byte descriptors. Unlike the existing for_each_leaf_0x2_entry() macro, which operates on directly retrieved CPUID data, the new one takes its input from the scanned CPUID data access API. That is, it is expected to be used as: const struct leaf_0x2_table *entry; const struct cpuid_regs *regs; u8 *ptr; regs =3D cpudata_cpuid_regs(c, 0x2); // Scanned CPUID access for_each_scanned_leaf_0x2_entry(regs, ptr, entry) { ... } which should replace the older method: const struct leaf_0x2_table *entry; union leaf_0x2_regs regs; u8 *ptr; cpuid_get_leaf_0x2_regs(®s); // Direct CPUID access for_each_leaf_0x2_entry(regs, ptr, entry) { ... } In the new macro, assert that the passed 'regs' is the same size as a 'union leaf_0x2_regs'. This is necessary since the macro internally casts 'regs' to that union in order to iterate over the CPUID(0x2) output as a 1-byte array. A size equivalence assert is used, instead of a typeof() check, to give callers the freedom to either pass a 'struct cpuid_regs' pointer or a 'struct leaf_0x2_0' pointer, both as returned by the scanned CPUID API at . That size comparison matches what other kernel CPUID do; e.g. cpuid_leaf() and cpuid_leaf_reg() at . Note, put the size equivalence check inside a GNU statement expression, ({..}), so that it can be placed inside the macro's loop initialization. Signed-off-by: Ahmed S. Darwish --- arch/x86/include/asm/cpuid/leaf_0x2_api.h | 35 +++++++++++++++++++++++ 1 file changed, 35 insertions(+) diff --git a/arch/x86/include/asm/cpuid/leaf_0x2_api.h b/arch/x86/include/a= sm/cpuid/leaf_0x2_api.h index 09fa3070b271..be3d7e113421 100644 --- a/arch/x86/include/asm/cpuid/leaf_0x2_api.h +++ b/arch/x86/include/asm/cpuid/leaf_0x2_api.h @@ -70,4 +70,39 @@ static inline void cpuid_get_leaf_0x2_regs(union leaf_0x= 2_regs *regs) __ptr < &(regs).desc[16] && (entry =3D &cpuid_0x2_table[*__ptr]); \ __ptr++) =20 +/** + * for_each_scanned_leaf_0x2_entry() - Iterator for parsed CPUID(0x2) desc= riptors + * @regs: Leaf 0x2 register output, as returned by cpudata_cpuid_regs() + * @__ptr: u8 pointer, for macro internal use only + * @entry: Pointer to parsed descriptor information at each iteration + * + * Loop over the 1-byte descriptors in the passed CPUID(0x2) output regist= ers + * @regs. Provide the parsed information for each descriptor through @ent= ry. + * + * To handle cache-specific descriptors, switch on @entry->c_type. For TLB + * descriptors, switch on @entry->t_type. + * + * Example usage for cache descriptors:: + * + * const struct leaf_0x2_table *entry; + * struct cpuid_regs *regs; + * u8 *ptr; + * + * regs =3D cpudata_cpuid_regs(c, 0x2); + * if (!regs) { + * // Handle error + * } + * + * for_each_scanned_leaf_0x2_entry(regs, ptr, entry) { + * switch (entry->c_type) { + * ... + * } + * } + */ +#define for_each_scanned_leaf_0x2_entry(regs, __ptr, entry) \ + for (({ static_assert(sizeof(*regs) =3D=3D sizeof(union leaf_0x2_regs)); = }), \ + __ptr =3D &((union leaf_0x2_regs *)(regs))->desc[1]; \ + __ptr < &((union leaf_0x2_regs *)(regs))->desc[16] && (entry =3D &cp= uid_0x2_table[*__ptr]);\ + __ptr++) + #endif /* _ASM_X86_CPUID_LEAF_0x2_API_H */ --=20 2.49.0