From nobody Thu Dec 18 11:11:21 2025 Received: from mail-m8188.xmail.ntesmail.com (mail-m8188.xmail.ntesmail.com [156.224.81.88]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0A9C222DF8D; Tue, 6 May 2025 03:33:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=156.224.81.88 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746502388; cv=none; b=VWH1AlXIEr9K8/xN84WzxwYFjlQdjHcy4+TBrPfZ0eV2BOruoUyAZ0jQO3JUfagv3js7h3q1mU8+xZFPRlGS3W8bzxFIO7hWh3eT/90PGZaRryGiV2E/aT8lO1ZKb7UytMWOhfsx/7uHuy2MGiGpiKiC/BJC06WxnY9B2Kk/yl8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746502388; c=relaxed/simple; bh=GByPNizvxz53udB6YFf8T1WJ8zPb1fuXxWJL7OZhfzg=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=oguR2lHPwiC1kDm0i0XPoDBJS+KpsnY4zyKiZo8Bfck57MsevzvYy8qDGsERTliMWL22qfwC3tKOGmx2o2oT/nx6OkSkmYYdNGEuvytTfZEOCLD8+PhSFuK9vNFDhV7nKOy8Il+fute5h8NcJngTCUhWIpa9148cHFNe6clG538= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=rock-chips.com; spf=pass smtp.mailfrom=rock-chips.com; dkim=pass (1024-bit key) header.d=rock-chips.com header.i=@rock-chips.com header.b=Bbd2kagB; arc=none smtp.client-ip=156.224.81.88 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=rock-chips.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rock-chips.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=rock-chips.com header.i=@rock-chips.com header.b="Bbd2kagB" Received: from localhost.localdomain (unknown [58.22.7.114]) by smtp.qiye.163.com (Hmail) with ESMTP id 140c6eb23; Tue, 6 May 2025 10:57:30 +0800 (GMT+08:00) From: Kever Yang To: heiko@sntech.de Cc: linux-rockchip@lists.infradead.org, Finley Xiao , Kever Yang , devicetree@vger.kernel.org, Conor Dooley , Rob Herring , FUKAUMI Naoki , Dragan Simic , Jonas Karlman , linux-kernel@vger.kernel.org, Diederik de Haas , Quentin Schulz , Johan Jonker , Krzysztof Kozlowski , linux-arm-kernel@lists.infradead.org Subject: [PATCH v5 6/6] arm64: dts: rockchip: Add RK3562 evb2 devicetree Date: Tue, 6 May 2025 10:57:15 +0800 Message-Id: <20250506025715.33595-7-kever.yang@rock-chips.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20250506025715.33595-1-kever.yang@rock-chips.com> References: <20250506025715.33595-1-kever.yang@rock-chips.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFDSUNOT01LS0k3V1ktWUFJV1kPCRoVCBIfWUFZGh8YGVZCHxgYS0MZQh8dHU5WFRQJFh oXVRMBExYaEhckFA4PWVdZGBILWUFZTkNVSUlVTFVKSk9ZV1kWGg8SFR0UWUFZT0tIVUpLSU9PT0 hVSktLVUpCS0tZBg++ X-HM-Tid: 0a96a386ea2603afkunm140c6eb23 X-HM-MType: 1 X-HM-Sender-Digest: e1kMHhlZQR0aFwgeV1kSHx4VD1lBWUc6NDo6IQw5EjJJLxEMST41MCMs Ki4aFC9VSlVKTE9NTktLSU5KQk5JVTMWGhIXVRAeDR4JVQIaFRw7CRQYEFYYExILCFUYFBZFWVdZ EgtZQVlOQ1VJSVVMVUpKT1lXWQgBWUFKT09DQzcG DKIM-Signature: a=rsa-sha256; b=Bbd2kagBxh8YJEBDu04pYhlJv8cjhwLgg0DLz7cwSPgRfMpoOsvNYYaYkq6P0mP8W06bwBYfaNkaQTkX4CxXVR1Q1UsNaLgiQ3ZUoso+QQ+2w8RZPifK2XRQPDfSGj4NyyxB0f8YpEjVuIpLN7hXZ2XMXJsku5gXAhocN2GN1mg=; c=relaxed/relaxed; s=default; d=rock-chips.com; v=1; bh=2wOvY6LoPKXLh4TcDTfWpyFQGSltxZqhMXHFIDv5Qnw=; h=date:mime-version:subject:message-id:from; Content-Type: text/plain; charset="utf-8" From: Finley Xiao DRAM: DDR4 Storage: eMMC PMIC: RK809 Audio: Headphone and speaker Interface: - USB3.0 HOST - USB2.0 HOST - PCIe x4 slot(pcie2x1 available) - SD card slot - GMAC - debug UART0 NOTE: the USB3.0 and the PCIe reuse the comboPHY, so the USB3.0 work in USB2 only mode. Signed-off-by: Finley Xiao Signed-off-by: Kever Yang --- Changes in v5: None Changes in v4: - remove gmac nodes Changes in v3: None Changes in v2: None arch/arm64/boot/dts/rockchip/Makefile | 1 + .../boot/dts/rockchip/rk3562-evb2-v10.dts | 488 ++++++++++++++++++ 2 files changed, 489 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3562-evb2-v10.dts diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/ro= ckchip/Makefile index 7948522cb225..faf6264a772c 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -81,6 +81,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3399-sapphire.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3399-sapphire-excavator.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3399pro-rock-pi-n10.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3528-radxa-e20c.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3562-evb2-v10.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3566-anbernic-rg-arc-d.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3566-anbernic-rg-arc-s.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3566-anbernic-rg353p.dtb diff --git a/arch/arm64/boot/dts/rockchip/rk3562-evb2-v10.dts b/arch/arm64/= boot/dts/rockchip/rk3562-evb2-v10.dts new file mode 100644 index 000000000000..b7e01cfe2f5a --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3562-evb2-v10.dts @@ -0,0 +1,488 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2024 Rockchip Electronics Co., Ltd. + * + */ + +/dts-v1/; + +#include +#include +#include +#include +#include "rk3562.dtsi" + +/ { + model =3D "Rockchip RK3562 EVB V20 Board"; + compatible =3D "rockchip,rk3562-evb2-v10", "rockchip,rk3562"; + + chosen: chosen { + stdout-path =3D "serial0:1500000n8"; + }; + + adc_keys: adc-keys { + compatible =3D "adc-keys"; + io-channels =3D <&saradc0 1>; + io-channel-names =3D "buttons"; + keyup-threshold-microvolt =3D <1800000>; + poll-interval =3D <100>; + + button-vol-up { + linux,code =3D ; + label =3D "volume up"; + press-threshold-microvolt =3D <17000>; + }; + + button-vol-down { + linux,code =3D ; + label =3D "volume down"; + press-threshold-microvolt =3D <414000>; + }; + + button-menu { + linux,code =3D ; + label =3D "menu"; + press-threshold-microvolt =3D <800000>; + }; + + button-back { + linux,code =3D ; + label =3D "back"; + press-threshold-microvolt =3D <1200000>; + }; + }; + + leds: leds { + compatible =3D "gpio-leds"; + work_led: led-0 { + gpios =3D <&gpio0 RK_PB4 GPIO_ACTIVE_HIGH>; + linux,default-trigger =3D "heartbeat"; + }; + }; + + dc_12v: dc-12v { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc12v_dcin"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <12000000>; + regulator-max-microvolt =3D <12000000>; + }; + + sdio_pwrseq: sdio-pwrseq { + compatible =3D "mmc-pwrseq-simple"; + clocks =3D <&rk809 1>; + clock-names =3D "ext_clock"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&wifi_enable_h>; + + /* + * On the module itself this is one of these (depending + * on the actual card populated): + * - SDIO_RESET_L_WL_REG_ON + * - PDN (power down when low) + */ + post-power-on-delay-ms =3D <200>; + reset-gpios =3D <&gpio0 RK_PB3 GPIO_ACTIVE_LOW>; + }; + + vcc3v3_pcie20: vcc3v3-pcie20 { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc3v3_pcie20"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + enable-active-high; + gpios =3D <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; + startup-delay-us =3D <5000>; + vin-supply =3D <&dc_12v>; + }; + + vcc5v0_sys: vcc5v0-sys { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + vin-supply =3D <&dc_12v>; + }; + + vcc5v0_usb: vcc5v0-usb { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc5v0_usb"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + vin-supply =3D <&dc_12v>; + }; + + vcc5v0_usb_host: vcc5v0-usb-host { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc5v0_usb_host"; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + enable-active-high; + gpio =3D <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>; + vin-supply =3D <&vcc5v0_usb>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&usb_host_pwren>; + }; + + vcc5v0_usb_otg: vcc5v0-usb-otg { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc5v0_usb_otg"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + enable-active-high; + gpio =3D <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>; + vin-supply =3D <&vcc5v0_usb>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&usb_otg_pwren>; + }; + + vcc3v3_clk: vcc3v3-clk { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc3v3_clk"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + vin-supply =3D <&vcc5v0_sys>; + }; + + vcc3v3_sys: vcc-sys { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc3v3_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + vin-supply =3D <&dc_12v>; + }; +}; + +&combphy_pu { + status =3D "okay"; +}; + +&i2c0 { + status =3D "okay"; + + rk809: pmic@20 { + compatible =3D "rockchip,rk809"; + reg =3D <0x20>; + interrupt-parent =3D <&gpio0>; + interrupts =3D <3 IRQ_TYPE_LEVEL_LOW>; + + pinctrl-names =3D "default", "pmic-sleep", + "pmic-power-off", "pmic-reset"; + pinctrl-0 =3D <&pmic_int>; + rockchip,system-power-controller; + wakeup-source; + #clock-cells =3D <1>; + clock-output-names =3D "rk808-clkout1", "rk808-clkout2"; + + vcc1-supply =3D <&vcc3v3_sys>; + vcc2-supply =3D <&vcc3v3_sys>; + vcc3-supply =3D <&vcc3v3_sys>; + vcc4-supply =3D <&vcc3v3_sys>; + vcc5-supply =3D <&vcc3v3_sys>; + vcc6-supply =3D <&vcc3v3_sys>; + vcc7-supply =3D <&vcc3v3_sys>; + vcc8-supply =3D <&vcc3v3_sys>; + vcc9-supply =3D <&vcc3v3_sys>; + + regulators { + vdd_logic: DCDC_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <500000>; + regulator-max-microvolt =3D <1350000>; + regulator-ramp-delay =3D <6001>; + regulator-initial-mode =3D <0x2>; + regulator-name =3D "vdd_logic"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_cpu: DCDC_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <500000>; + regulator-max-microvolt =3D <1350000>; + regulator-ramp-delay =3D <6001>; + regulator-initial-mode =3D <0x2>; + regulator-name =3D "vdd_cpu"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-always-on; + regulator-boot-on; + regulator-initial-mode =3D <0x2>; + regulator-name =3D "vcc_ddr"; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vdd_gpu: DCDC_REG4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <500000>; + regulator-max-microvolt =3D <1350000>; + regulator-ramp-delay =3D <6001>; + regulator-initial-mode =3D <0x2>; + regulator-name =3D "vdd_gpu"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc2v8_dvp: LDO_REG1 { + regulator-min-microvolt =3D <2800000>; + regulator-max-microvolt =3D <2800000>; + regulator-name =3D "vcc2v8_dvp"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda_0v9: LDO_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <900000>; + regulator-max-microvolt =3D <900000>; + regulator-name =3D "vdda_0v9"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda0v9_pmu: LDO_REG3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <900000>; + regulator-max-microvolt =3D <900000>; + regulator-name =3D "vdda0v9_pmu"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <900000>; + }; + }; + + vccio_acodec: LDO_REG4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3000000>; + regulator-max-microvolt =3D <3000000>; + regulator-name =3D "vccio_acodec"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vccio_sd: LDO_REG5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <3300000>; + regulator-name =3D "vccio_sd"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_pmu: LDO_REG6 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + regulator-name =3D "vcc3v3_pmu"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <3300000>; + }; + }; + + vcca_1v8: LDO_REG7 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-name =3D "vcca_1v8"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcca1v8_pmu: LDO_REG8 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-name =3D "vcca1v8_pmu"; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <1800000>; + }; + }; + + vcc1v8_dvp: LDO_REG9 { + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-name =3D "vcc1v8_dvp"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v8: DCDC_REG5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-name =3D "vcc_1v8"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_3v3: SWITCH_REG1 { + regulator-always-on; + regulator-boot-on; + regulator-name =3D "vcc_3v3"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_sd: SWITCH_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-name =3D "vcc3v3_sd"; + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + }; +}; + +&pcie2x1 { + reset-gpios =3D <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply =3D <&vcc3v3_pcie20>; + status =3D "okay"; +}; + +&pinctrl { + sdio-pwrseq { + wifi_enable_h: wifi-enable-h { + rockchip,pins =3D <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + usb { + usb_host_pwren: usb-host-pwren { + rockchip,pins =3D <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + usb_otg_pwren: usb-otg-pwren { + rockchip,pins =3D <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&saradc0 { + status =3D "okay"; + vref-supply =3D <&vcc_1v8>; +}; + +&sdhci { + bus-width =3D <8>; + no-sdio; + no-sd; + non-removable; + mmc-hs400-1_8v; + mmc-hs400-enhanced-strobe; + full-pwr-cycle-in-suspend; + status =3D "okay"; +}; + +&sdmmc0 { + no-sdio; + no-mmc; + bus-width =3D <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + disable-wp; + sd-uhs-sdr104; + vmmc-supply =3D <&vcc3v3_sd>; + vqmmc-supply =3D <&vccio_sd>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; + status =3D "okay"; +}; + +&sdmmc1 { + no-sd; + no-mmc; + bus-width =3D <4>; + disable-wp; + cap-sd-highspeed; + cap-sdio-irq; + keep-power-in-suspend; + mmc-pwrseq =3D <&sdio_pwrseq>; + non-removable; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>; + sd-uhs-sdr104; + status =3D "okay"; +}; + +&u2phy { + status =3D "okay"; +}; + +&u2phy_host { + status =3D "okay"; + phy-supply =3D <&vcc5v0_usb_host>; +}; + +&u2phy_otg { + status =3D "okay"; + phy-supply =3D <&vcc5v0_usb_otg>; +}; + +&uart0 { + status =3D "okay"; +}; + +&uart1 { + status =3D "okay"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&uart1m0_xfer &uart1m0_ctsn>; +}; + +&usb_host0_ehci { + status =3D "okay"; +}; + +&usb_host0_ohci { + status =3D "okay"; +}; + +&usbdrd_dwc3 { + status =3D "okay"; + dr_mode =3D "host"; + extcon =3D <&u2phy>; + maximum-speed =3D "high-speed"; + phys =3D <&u2phy_otg>; + phy-names =3D "usb2-phy"; + snps,dis_u2_susphy_quirk; + snps,usb2-lpm-disable; +}; --=20 2.25.1