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[87.8.31.78]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-441d4351abdsm6794475e9.23.2025.05.06.14.05.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 06 May 2025 14:05:27 -0700 (PDT) From: Angelo Dureghello X-Google-Original-From: Angelo Dureghello Date: Tue, 06 May 2025 23:03:51 +0200 Subject: [PATCH v3 5/5] iio: adc: ad7606: add gain calibration support Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250506-wip-bl-ad7606-calibration-v3-5-6eb7b6e72307@baylibre.com> References: <20250506-wip-bl-ad7606-calibration-v3-0-6eb7b6e72307@baylibre.com> In-Reply-To: <20250506-wip-bl-ad7606-calibration-v3-0-6eb7b6e72307@baylibre.com> To: Jonathan Cameron , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , Andy Shevchenko , Lars-Peter Clausen , Michael Hennerich , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, Michael Hennerich , devicetree@vger.kernel.org, Angelo Dureghello X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=5739; i=adureghello@baylibre.com; h=from:subject:message-id; bh=P/FuxJZA+9kES7o8SpZCT2TnVHvYO5j9LvTN2jJFlis=; b=owGbwMvMwCXGf3bn1e/btlsznlZLYsiQqvSYb7upmDlGwPPAjCt+jzb1+BmrOz3byPtZXjL22 xdt5d08HaUsDGJcDLJiiix1iREmobdDpZQXMM6GmcPKBDKEgYtTACZiKM/w39XKa/n7HcWltiHn 3DYW79QLWLLIjffi7mmB6gmCEU2pbxn+B+twGNwW4WFwFilxef0w4veF/t6tPT3noo+nbmB93vm BHQA= X-Developer-Key: i=adureghello@baylibre.com; a=openpgp; fpr=703CDFAD8B573EB00850E38366D1CB9419AF3953 From: Angelo Dureghello Add gain calibration support, using resistor values set on devicetree, values to be set accordingly with ADC external RFilter, as explained in the ad7606c-16 datasheet, rev0, page 37. Usage example in the fdt yaml documentation. Tested-by: David Lechner Reviewed-by: Nuno S=C3=A1 Signed-off-by: Angelo Dureghello --- drivers/iio/adc/ad7606.c | 56 ++++++++++++++++++++++++++++++++++++++++++++= ++++ drivers/iio/adc/ad7606.h | 4 ++++ 2 files changed, 60 insertions(+) diff --git a/drivers/iio/adc/ad7606.c b/drivers/iio/adc/ad7606.c index a986eb1284106da4980ac36cb0b5990e4e3bd948..049fd8616769d32778aa238b348= b2fb82fa83745 100644 --- a/drivers/iio/adc/ad7606.c +++ b/drivers/iio/adc/ad7606.c @@ -33,6 +33,10 @@ =20 #include "ad7606.h" =20 +#define AD7606_CALIB_GAIN_MIN 0 +#define AD7606_CALIB_GAIN_STEP 1024 +#define AD7606_CALIB_GAIN_MAX (63 * AD7606_CALIB_GAIN_STEP) + /* * Scales are computed as 5000/32768 and 10000/32768 respectively, * so that when applied to the raw values they provide mV values. @@ -125,6 +129,8 @@ static int ad7609_chan_scale_setup(struct iio_dev *indi= o_dev, struct iio_chan_spec *chan); static int ad7616_sw_mode_setup(struct iio_dev *indio_dev); static int ad7606b_sw_mode_setup(struct iio_dev *indio_dev); +static int ad7606_chan_calib_gain_setup(struct iio_dev *indio_dev, + struct iio_chan_spec *chan); =20 const struct ad7606_chip_info ad7605_4_info =3D { .max_samplerate =3D 300 * KILO, @@ -180,6 +186,7 @@ const struct ad7606_chip_info ad7606b_info =3D { .scale_setup_cb =3D ad7606_16bit_chan_scale_setup, .sw_setup_cb =3D ad7606b_sw_mode_setup, .offload_storagebits =3D 32, + .calib_gain_setup_cb =3D ad7606_chan_calib_gain_setup, .calib_offset_avail =3D ad7606_calib_offset_avail, .calib_phase_avail =3D ad7606b_calib_phase_avail, }; @@ -195,6 +202,7 @@ const struct ad7606_chip_info ad7606c_16_info =3D { .scale_setup_cb =3D ad7606c_16bit_chan_scale_setup, .sw_setup_cb =3D ad7606b_sw_mode_setup, .offload_storagebits =3D 32, + .calib_gain_setup_cb =3D ad7606_chan_calib_gain_setup, .calib_offset_avail =3D ad7606_calib_offset_avail, .calib_phase_avail =3D ad7606c_calib_phase_avail, }; @@ -246,6 +254,7 @@ const struct ad7606_chip_info ad7606c_18_info =3D { .scale_setup_cb =3D ad7606c_18bit_chan_scale_setup, .sw_setup_cb =3D ad7606b_sw_mode_setup, .offload_storagebits =3D 32, + .calib_gain_setup_cb =3D ad7606_chan_calib_gain_setup, .calib_offset_avail =3D ad7606c_18bit_calib_offset_avail, .calib_phase_avail =3D ad7606c_calib_phase_avail, }; @@ -357,6 +366,49 @@ static int ad7606_get_chan_config(struct iio_dev *indi= o_dev, int ch, return 0; } =20 +static int ad7606_chan_calib_gain_setup(struct iio_dev *indio_dev, + struct iio_chan_spec *chan) +{ + struct ad7606_state *st =3D iio_priv(indio_dev); + unsigned int num_channels =3D st->chip_info->num_adc_channels; + struct device *dev =3D st->dev; + int ret; + + device_for_each_child_node_scoped(dev, child) { + u32 reg, r_gain; + + ret =3D fwnode_property_read_u32(child, "reg", ®); + if (ret) + return ret; + + /* channel number (here) is from 1 to num_channels */ + if (reg < 1 || reg > num_channels) { + dev_warn(dev, "wrong ch number (ignoring): %d\n", reg); + continue; + } + + ret =3D fwnode_property_read_u32(child, "adi,rfilter-ohms", + &r_gain); + if (ret =3D=3D -EINVAL) + /* Keep the default register value. */ + continue; + if (ret) + return ret; + + if (r_gain > AD7606_CALIB_GAIN_MAX) + return dev_err_probe(st->dev, -EINVAL, + "wrong gain calibration value."); + + /* Chan reg is 1-based index. */ + ret =3D st->bops->reg_write(st, AD7606_CALIB_GAIN(reg - 1), + DIV_ROUND_CLOSEST(r_gain, AD7606_CALIB_GAIN_STEP)); + if (ret) + return ret; + } + + return 0; +} + static int ad7606c_18bit_chan_scale_setup(struct iio_dev *indio_dev, struct iio_chan_spec *chan) { @@ -1410,6 +1462,10 @@ static int ad7606_probe_channels(struct iio_dev *ind= io_dev) chan->info_mask_separate_available |=3D BIT(IIO_CHAN_INFO_CALIBBIAS) | BIT(IIO_CHAN_INFO_CONVDELAY); + ret =3D st->chip_info->calib_gain_setup_cb( + indio_dev, chan); + if (ret) + return ret; } =20 /* diff --git a/drivers/iio/adc/ad7606.h b/drivers/iio/adc/ad7606.h index f613583a7fa4095115b0b28e3f8e51cd32b93524..94165d217b69d54cbce9109b8c0= f9dc0237cf304 100644 --- a/drivers/iio/adc/ad7606.h +++ b/drivers/iio/adc/ad7606.h @@ -50,6 +50,8 @@ struct ad7606_state; typedef int (*ad7606_scale_setup_cb_t)(struct iio_dev *indio_dev, struct iio_chan_spec *chan); typedef int (*ad7606_sw_setup_cb_t)(struct iio_dev *indio_dev); +typedef int (*ad7606_calib_gain_setup_cb_t)(struct iio_dev *indio_dev, + struct iio_chan_spec *chan); =20 /** * struct ad7606_chip_info - chip specific information @@ -66,6 +68,7 @@ typedef int (*ad7606_sw_setup_cb_t)(struct iio_dev *indio= _dev); * @init_delay_ms: required delay in milliseconds for initialization * after a restart * @offload_storagebits: storage bits used by the offload hw implementation + * @calib_gain_setup_cb: callback to setup of gain calibration for each ch= annel * @calib_offset_avail: pointer to offset calibration range/limits array * @calib_phase_avail: pointer to phase calibration range/limits array */ @@ -81,6 +84,7 @@ struct ad7606_chip_info { bool os_req_reset; unsigned long init_delay_ms; u8 offload_storagebits; + ad7606_calib_gain_setup_cb_t calib_gain_setup_cb; const int *calib_offset_avail; const int (*calib_phase_avail)[2]; }; --=20 2.49.0