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Tue, 06 May 2025 05:46:51 -0700 (PDT) Received: from NB-GIGA003.letovo.school ([5.194.95.139]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7405909cd89sm8756817b3a.169.2025.05.06.05.46.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 06 May 2025 05:46:51 -0700 (PDT) From: Alexey Charkov Date: Tue, 06 May 2025 16:46:17 +0400 Subject: [PATCH v2 4/5] irqchip/irq-vt8500: Use a dedicated chained handler function Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250506-vt8500-intc-updates-v2-4-a3a0606cf92d@gmail.com> References: <20250506-vt8500-intc-updates-v2-0-a3a0606cf92d@gmail.com> In-Reply-To: <20250506-vt8500-intc-updates-v2-0-a3a0606cf92d@gmail.com> To: Thomas Gleixner , Krzysztof Kozlowski Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Alexey Charkov X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1746535586; l=3948; i=alchark@gmail.com; s=20250416; h=from:subject:message-id; bh=GOA+u85tduWxVv4ECfMp+FDaLJ7imscZ/xPP/oEH2eQ=; b=O6fqrOR24uJ9xju6Sd7nqpOfeF5O89fby817sqf0xcnOuX6HnJocQbCrgP0eX/5PZm+seJkdy GhWNgcnZlmLBx6RlQpxxyT9wt0xS5LljcdDtydrN0geSCSk1SmBdHt+ X-Developer-Key: i=alchark@gmail.com; a=ed25519; pk=ltKbQzKLTJPiDgPtcHxdo+dzFthCCMtC3V9qf7+0rkc= Current code for the chained interrupt controller maps its interrupts on the parent but doesn't register a separate chained handler, instead needlessly calling enable_irq on an unactivated parent interrupt, causing a boot time WARN_ON from the common code. The common handler meanwhile loops through all registered interrupt controllers in an arbitrary order and tries to handle active interrupts in each of them, which is fragile. Use common infrastructure for handling chained interrupts instead. Signed-off-by: Alexey Charkov --- drivers/irqchip/irq-vt8500.c | 60 ++++++++++++++++++++++++++++------------= ---- 1 file changed, 38 insertions(+), 22 deletions(-) diff --git a/drivers/irqchip/irq-vt8500.c b/drivers/irqchip/irq-vt8500.c index cf24a88f52d1b90f033d429288c88398439b92d1..aea43c838430d2a541aa9b3127a= 215531abecad8 100644 --- a/drivers/irqchip/irq-vt8500.c +++ b/drivers/irqchip/irq-vt8500.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #include #include @@ -66,6 +67,8 @@ struct vt8500_irq_data { /* Global variable for accessing io-mem addresses */ static struct vt8500_irq_data intc[VT8500_INTC_MAX]; static u32 active_cnt =3D 0; +/* Primary interrupt controller data */ +static struct vt8500_irq_data *primary_intc; =20 static void vt8500_irq_ack(struct irq_data *d) { @@ -163,28 +166,38 @@ static const struct irq_domain_ops vt8500_irq_domain_= ops =3D { .xlate =3D irq_domain_xlate_onecell, }; =20 +static inline void vt8500_handle_irq_common(struct vt8500_irq_data *intc) +{ + unsigned long irqnr =3D readl_relaxed(intc->base) & 0x3F; + unsigned long stat; + + /* + * Highest Priority register default =3D 63, so check that this + * is a real interrupt by checking the status register + */ + if (irqnr =3D=3D 63) { + stat =3D readl_relaxed(intc->base + VT8500_ICIS + 4); + if (!(stat & BIT(31))) + return; + } + + generic_handle_domain_irq(intc->domain, irqnr); +} + static void __exception_irq_entry vt8500_handle_irq(struct pt_regs *regs) { - u32 stat, i; - int irqnr; - void __iomem *base; - - /* Loop through each active controller */ - for (i=3D0; ihost_data; + + chained_irq_enter(chip, desc); + vt8500_handle_irq_common(intc); + chained_irq_exit(chip, desc); } =20 static int __init vt8500_irq_init(struct device_node *node, @@ -212,8 +225,6 @@ static int __init vt8500_irq_init(struct device_node *n= ode, goto out; } =20 - set_handle_irq(vt8500_handle_irq); - vt8500_init_irq_hw(intc[active_cnt].base); =20 pr_info("vt8500-irq: Added interrupt controller\n"); @@ -224,10 +235,15 @@ static int __init vt8500_irq_init(struct device_node = *node, if (of_irq_count(node) !=3D 0) { for (i =3D 0; i < of_irq_count(node); i++) { irq =3D irq_of_parse_and_map(node, i); - enable_irq(irq); + irq_set_chained_handler_and_data(irq, + vt8500_handle_irq_chained, + &intc[active_cnt]); } =20 pr_info("vt8500-irq: Enabled slave->parent interrupts\n"); + } else { + primary_intc =3D &intc[active_cnt]; + set_handle_irq(vt8500_handle_irq); } out: return 0; --=20 2.49.0