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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni Cc: Michael Klein , netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [net-next v7 3/6] net: phy: realtek: add RTL8211F register defines Date: Sun, 4 May 2025 19:29:13 +0200 Message-Id: <20250504172916.243185-4-michael@fossekall.de> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20250504172916.243185-1-michael@fossekall.de> References: <20250504172916.243185-1-michael@fossekall.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add some more defines for RTL8211F page and register numbers. Signed-off-by: Michael Klein Reviewed-by: Andrew Lunn --- drivers/net/phy/realtek/realtek_main.c | 34 ++++++++++++++++++-------- 1 file changed, 24 insertions(+), 10 deletions(-) diff --git a/drivers/net/phy/realtek/realtek_main.c b/drivers/net/phy/realt= ek/realtek_main.c index 0f005a449719..ca6d2903b1c9 100644 --- a/drivers/net/phy/realtek/realtek_main.c +++ b/drivers/net/phy/realtek/realtek_main.c @@ -30,11 +30,14 @@ #define RTL821x_PAGE_SELECT 0x1f #define RTL821x_SET_EXT_PAGE 0x07 =20 +/* RTL8211F PHY configuration */ +#define RTL8211F_PHYCR_PAGE 0xa43 #define RTL8211F_PHYCR1 0x18 #define RTL8211F_PHYCR2 0x19 #define RTL8211F_CLKOUT_EN BIT(0) #define RTL8211F_PHYCR2_PHY_EEE_ENABLE BIT(5) =20 +#define RTL8211F_INSR_PAGE 0xa43 #define RTL8211F_INSR 0x1d =20 /* RTL8211F WOL interrupt configuration */ @@ -55,6 +58,8 @@ #define RTL8211F_PHYSICAL_ADDR_WORD1 17 #define RTL8211F_PHYSICAL_ADDR_WORD2 18 =20 +/* RTL8211F LED configuration */ +#define RTL8211F_LEDCR_PAGE 0xd04 #define RTL8211F_LEDCR 0x10 #define RTL8211F_LEDCR_MODE BIT(15) #define RTL8211F_LEDCR_ACT_TXRX BIT(4) @@ -64,7 +69,13 @@ #define RTL8211F_LEDCR_MASK GENMASK(4, 0) #define RTL8211F_LEDCR_SHIFT 5 =20 +/* RTL8211F RGMII configuration */ +#define RTL8211F_RGMII_PAGE 0xd08 + +#define RTL8211F_TXCR 0x11 #define RTL8211F_TX_DELAY BIT(8) + +#define RTL8211F_RXCR 0x15 #define RTL8211F_RX_DELAY BIT(3) =20 #define RTL8211F_ALDPS_PLL_OFF BIT(1) @@ -187,7 +198,7 @@ static int rtl821x_probe(struct phy_device *phydev) return dev_err_probe(dev, PTR_ERR(priv->clk), "failed to get phy clock\n"); =20 - ret =3D phy_read_paged(phydev, 0xa43, RTL8211F_PHYCR1); + ret =3D phy_read_paged(phydev, RTL8211F_PHYCR_PAGE, RTL8211F_PHYCR1); if (ret < 0) return ret; =20 @@ -197,7 +208,7 @@ static int rtl821x_probe(struct phy_device *phydev) =20 priv->has_phycr2 =3D !(phy_id =3D=3D RTL_8211FVD_PHYID); if (priv->has_phycr2) { - ret =3D phy_read_paged(phydev, 0xa43, RTL8211F_PHYCR2); + ret =3D phy_read_paged(phydev, RTL8211F_PHYCR_PAGE, RTL8211F_PHYCR2); if (ret < 0) return ret; =20 @@ -233,7 +244,7 @@ static int rtl8211f_ack_interrupt(struct phy_device *ph= ydev) { int err; =20 - err =3D phy_read_paged(phydev, 0xa43, RTL8211F_INSR); + err =3D phy_read_paged(phydev, RTL8211F_INSR_PAGE, RTL8211F_INSR); =20 return (err < 0) ? err : 0; } @@ -376,7 +387,7 @@ static irqreturn_t rtl8211f_handle_interrupt(struct phy= _device *phydev) { int irq_status; =20 - irq_status =3D phy_read_paged(phydev, 0xa43, RTL8211F_INSR); + irq_status =3D phy_read_paged(phydev, RTL8211F_INSR_PAGE, RTL8211F_INSR); if (irq_status < 0) { phy_error(phydev); return IRQ_NONE; @@ -473,7 +484,7 @@ static int rtl8211f_config_init(struct phy_device *phyd= ev) u16 val_txdly, val_rxdly; int ret; =20 - ret =3D phy_modify_paged_changed(phydev, 0xa43, RTL8211F_PHYCR1, + ret =3D phy_modify_paged_changed(phydev, RTL8211F_PHYCR_PAGE, RTL8211F_PH= YCR1, RTL8211F_ALDPS_PLL_OFF | RTL8211F_ALDPS_ENABLE | RTL8211F_ALDPS= _XTAL_OFF, priv->phycr1); if (ret < 0) { @@ -507,7 +518,8 @@ static int rtl8211f_config_init(struct phy_device *phyd= ev) return 0; } =20 - ret =3D phy_modify_paged_changed(phydev, 0xd08, 0x11, RTL8211F_TX_DELAY, + ret =3D phy_modify_paged_changed(phydev, RTL8211F_RGMII_PAGE, + RTL8211F_TXCR, RTL8211F_TX_DELAY, val_txdly); if (ret < 0) { dev_err(dev, "Failed to update the TX delay register\n"); @@ -522,7 +534,8 @@ static int rtl8211f_config_init(struct phy_device *phyd= ev) str_enabled_disabled(val_txdly)); } =20 - ret =3D phy_modify_paged_changed(phydev, 0xd08, 0x15, RTL8211F_RX_DELAY, + ret =3D phy_modify_paged_changed(phydev, RTL8211F_RGMII_PAGE, + RTL8211F_RXCR, RTL8211F_RX_DELAY, val_rxdly); if (ret < 0) { dev_err(dev, "Failed to update the RX delay register\n"); @@ -538,14 +551,15 @@ static int rtl8211f_config_init(struct phy_device *ph= ydev) } =20 /* Disable PHY-mode EEE so LPI is passed to the MAC */ - ret =3D phy_modify_paged(phydev, 0xa43, RTL8211F_PHYCR2, + ret =3D phy_modify_paged(phydev, RTL8211F_PHYCR_PAGE, RTL8211F_PHYCR2, RTL8211F_PHYCR2_PHY_EEE_ENABLE, 0); if (ret) return ret; =20 if (priv->has_phycr2) { - ret =3D phy_modify_paged(phydev, 0xa43, RTL8211F_PHYCR2, - RTL8211F_CLKOUT_EN, priv->phycr2); + ret =3D phy_modify_paged(phydev, RTL8211F_PHYCR_PAGE, + RTL8211F_PHYCR2, RTL8211F_CLKOUT_EN, + priv->phycr2); if (ret < 0) { dev_err(dev, "clkout configuration failed: %pe\n", ERR_PTR(ret)); --=20 2.39.5