From nobody Sat Feb 7 10:16:40 2026 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7750617A5BD; Sat, 3 May 2025 20:15:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746303332; cv=none; b=IjEqBw7t7PkRNwh0k4LwkYp+Bs2um4CQeOJBc37s/um4R6c8DbyQdDCz++Ii30Z4IFrkbmMkHBe1u+xY3idWKVuAT4NyVZAuR+46bi2taM6O53Czp1CkhowqgimjZofwKUVvho42tLp1ytItUfQAcrRVHaXrlp4DklSNpclB7ZU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746303332; c=relaxed/simple; bh=u3ua8SVsGbv2CUAQqgjAJ98rDBUFgwOnKD/5uJ/FBdk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=NDDHDCGbyz5WOLXF9dEagyrqM6oGaB8tHZ53d+b37P8GrQksTiaimzPflhl7mrh4jz7CReXi4cbO16zT3qRxPsS50U0QCHj7eDX5cwjt4+p8UMGVnhm1Ge851zQgGCY7OvIKpnUrknkiKYi+uJDlkNWzpnTiVQaq/TzLklw7kpQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b=K6rLuwsd; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b="K6rLuwsd" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sntech.de; s=gloria202408; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Sender:Reply-To:Content-Type: Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender: Resent-To:Resent-Cc:Resent-Message-ID; bh=34MJqkf/MBQYKv6xrK8XN0qAOR0duJ0rHYmPfngbh7c=; b=K6rLuwsdadtqWUhzyG6NiJeYTT e24OrcraKgE07kdnkScvcOBxqW05tuaFktsIVZwoby/fab4bvAA34iRWoRduslEZ/z1W9vlLfyMvu XzSbt5hMjFUHQ3fcdOCGLGhdHmPeURFxDhRh2hprGhp76NdaNgKua8ZXfKHRrkIplrTqXq1h2jNys KwMN/kHQvFKRyp1lpu4YXPwtvXnvEngKkl8qKqGL7d0jUoB5DME3IPNj0+8vy619QAjjhrpbEqc4G uYbPrHXhJzFM41WmeKv5uugogvqY44nt60vls3umup4hYvLfhWNGm8m1B8Osk1H0jYs5buU3OM7z+ 6Cgvv6lQ==; Received: from i53875bbc.versanet.de ([83.135.91.188] helo=localhost.localdomain) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1uBJGh-0001hY-Em; Sat, 03 May 2025 22:15:27 +0200 From: Heiko Stuebner To: vkoul@kernel.org, kishon@kernel.org Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, heiko@sntech.de, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/3] dt-bindings: phy: rockchip,inno-usb2phy: add rk3036 compatible Date: Sat, 3 May 2025 22:15:10 +0200 Message-ID: <20250503201512.991277-2-heiko@sntech.de> X-Mailer: git-send-email 2.47.2 In-Reply-To: <20250503201512.991277-1-heiko@sntech.de> References: <20250503201512.991277-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add compatible for the USB2 phy in the Rockchip RK3036 SoC. Apart from some bits that got swapped around in the phy registers, the block is nearly the same as the one on the rk3128. Signed-off-by: Heiko Stuebner Acked-by: Conor Dooley --- .../devicetree/bindings/phy/rockchip,inno-usb2phy.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.ya= ml b/Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml index 6a7ef556414c..7bcefe8c22d1 100644 --- a/Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml +++ b/Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml @@ -13,6 +13,7 @@ properties: compatible: enum: - rockchip,px30-usb2phy + - rockchip,rk3036-usb2phy - rockchip,rk3128-usb2phy - rockchip,rk3228-usb2phy - rockchip,rk3308-usb2phy @@ -184,6 +185,7 @@ allOf: contains: enum: - rockchip,px30-usb2phy + - rockchip,rk3036-usb2phy - rockchip,rk3128-usb2phy - rockchip,rk3228-usb2phy - rockchip,rk3308-usb2phy --=20 2.47.2 From nobody Sat Feb 7 10:16:40 2026 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 290211885B4; Sat, 3 May 2025 20:15:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746303333; cv=none; b=G8g1XYKQlUAcyU69ColEywQOt5Qw+u4f6QaoKtTnG55ciAs4cKN9bUyy7IvqodFl0+8RhKOHQQdNql4jTzlQ0xeqCNipmKW1WCWzgNcCoB5h2p5AEZzBu1VWfibea0btoUG0W19MRzPiU8UMVI5Tls/3WBFk9hWVc+Aq+OD/v3s= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746303333; c=relaxed/simple; bh=9I/sWQtpZViWyGi5M9fn2OyPiwQvWlLcqnBkwYv/Jas=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=N9V6aaIr7GFuZhChG81d7/C6oX6yep/ryA3dyUmOpbi5b1TaAyxoGBdGDOV1/9/f9Z4faCulNJm+s19fXPrjcXeUXTxpTemeJGOK1JCNpVD45cj4TKpLtoaBlca5neAqlA50cguzAAyOyd01GtaViAz+hQTZsz6mFgxPEXP61UQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b=yVd335sG; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b="yVd335sG" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sntech.de; s=gloria202408; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Sender:Reply-To:Content-Type: Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender: Resent-To:Resent-Cc:Resent-Message-ID; bh=f1bGcGDZkcMjtDsFXsTQIqCO4bWB1SufYWtStJKzTEs=; b=yVd335sGwdCJ6BrPo5XYqA2h8e 6tI9gG1XjG3+rCKTVXK5hikaHjG5IYA27GiulLKRpI6qK8nhWNadW1c+KwIOff+T0gBuwPTW35bD2 IE7K3sdlMXI0nyj6IMXKOTRdQWNvqXWG20y7ptgu7yHRcSoG6mhKRHExaYBn+4V1a0lhgumwEI8nT HvvoEzktKFwAZOmx56Zebw8H7fBeUzKTWlDrLl/OL6TIe7OdAJ4Nqkx/H5rY+zOLv++UCY8koGOdM 9zM3dr0uBU1qwUP3O/o37I+0q4vwQxqv3hqFnFkFT8QwAGHTp/ObsfwjnqglW7BhC/0LNV24QG8w8 Mg43eVcw==; Received: from i53875bbc.versanet.de ([83.135.91.188] helo=localhost.localdomain) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1uBJGh-0001hY-Um; Sat, 03 May 2025 22:15:28 +0200 From: Heiko Stuebner To: vkoul@kernel.org, kishon@kernel.org Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, heiko@sntech.de, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/3] phy: rockchip: inno-usb2: add phy definition for rk3036 Date: Sat, 3 May 2025 22:15:11 +0200 Message-ID: <20250503201512.991277-3-heiko@sntech.de> X-Mailer: git-send-email 2.47.2 In-Reply-To: <20250503201512.991277-1-heiko@sntech.de> References: <20250503201512.991277-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The usb2phy on rk3036 is very similar to rk3128 but not 100% identical. While most registers and bits are the same, a small fraction did get moved around. So we can re-use the phy-tuning function, but need a new set a bits. The biggest change might be that the phy on rk3036 does not support the charger detection, that rk3128 (and newer phys) have. Signed-off-by: Heiko Stuebner --- drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 32 +++++++++++++++++++ 1 file changed, 32 insertions(+) diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/ro= ckchip/phy-rockchip-inno-usb2.c index b5e6a864deeb..32fdd64d7c2a 100644 --- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c +++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c @@ -1583,6 +1583,37 @@ static int rk3588_usb2phy_tuning(struct rockchip_usb= 2phy *rphy) return ret; } =20 +static const struct rockchip_usb2phy_cfg rk3036_phy_cfgs[] =3D { + { + .reg =3D 0x17c, + .num_ports =3D 2, + .phy_tuning =3D rk3128_usb2phy_tuning, + .clkout_ctl =3D { 0x017c, 11, 11, 1, 0 }, + .port_cfgs =3D { + [USB2PHY_PORT_OTG] =3D { + .phy_sus =3D { 0x017c, 8, 0, 0, 0x1d1 }, + .bvalid_det_en =3D { 0x017c, 14, 14, 0, 1 }, + .bvalid_det_st =3D { 0x017c, 15, 15, 0, 1 }, + .bvalid_det_clr =3D { 0x017c, 15, 15, 0, 1 }, + .ls_det_en =3D { 0x017c, 12, 12, 0, 1 }, + .ls_det_st =3D { 0x017c, 13, 13, 0, 1 }, + .ls_det_clr =3D { 0x017c, 13, 13, 0, 1 }, + .utmi_bvalid =3D { 0x014c, 8, 8, 0, 1 }, + .utmi_id =3D { 0x014c, 11, 11, 0, 1 }, + .utmi_ls =3D { 0x014c, 10, 9, 0, 1 }, + + }, + [USB2PHY_PORT_HOST] =3D { + .phy_sus =3D { 0x0194, 8, 0, 0, 0x1d1 }, + .ls_det_en =3D { 0x0194, 14, 14, 0, 1 }, + .ls_det_st =3D { 0x0194, 15, 15, 0, 1 }, + .ls_det_clr =3D { 0x0194, 15, 15, 0, 1 } + } + }, + }, + { /* sentinel */ } +}; + static const struct rockchip_usb2phy_cfg rk3128_phy_cfgs[] =3D { { .reg =3D 0x17c, @@ -2204,6 +2235,7 @@ static const struct rockchip_usb2phy_cfg rv1108_phy_c= fgs[] =3D { =20 static const struct of_device_id rockchip_usb2phy_dt_match[] =3D { { .compatible =3D "rockchip,px30-usb2phy", .data =3D &rk3328_phy_cfgs }, + { .compatible =3D "rockchip,rk3036-usb2phy", .data =3D &rk3036_phy_cfgs }, { .compatible =3D "rockchip,rk3128-usb2phy", .data =3D &rk3128_phy_cfgs }, { .compatible =3D "rockchip,rk3228-usb2phy", .data =3D &rk3228_phy_cfgs }, { .compatible =3D "rockchip,rk3308-usb2phy", .data =3D &rk3308_phy_cfgs }, --=20 2.47.2 From nobody Sat Feb 7 10:16:40 2026 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A50DB1A2872; Sat, 3 May 2025 20:15:32 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; 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Sat, 03 May 2025 22:15:28 +0200 From: Heiko Stuebner To: vkoul@kernel.org, kishon@kernel.org Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, heiko@sntech.de, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 3/3] ARM: dts: rockchip: add rk3036 usb2phy nodes and enable them on kylin Date: Sat, 3 May 2025 22:15:12 +0200 Message-ID: <20250503201512.991277-4-heiko@sntech.de> X-Mailer: git-send-email 2.47.2 In-Reply-To: <20250503201512.991277-1-heiko@sntech.de> References: <20250503201512.991277-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The rk3036 does contain a usb2phy, just until now it was just used implicitly without additional configuration. As we now have the bits in place for it getting actually controlled, add the necessary phy-node to the GRF simple-mfd. Enable the phy-ports in the same patch to not create bisectability issues, as hooking up the phys to the usb controllers would create probe deferrals until a board enables them. Doing everything in one patch, solves that issue. Only rk3036-kylin actually enabled the usb controllers, so is the only board affected. Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rockchip/rk3036-kylin.dts | 12 +++++++ arch/arm/boot/dts/rockchip/rk3036.dtsi | 35 +++++++++++++++++++++ 2 files changed, 47 insertions(+) diff --git a/arch/arm/boot/dts/rockchip/rk3036-kylin.dts b/arch/arm/boot/dt= s/rockchip/rk3036-kylin.dts index 4f928c7898e9..51a74f79c935 100644 --- a/arch/arm/boot/dts/rockchip/rk3036-kylin.dts +++ b/arch/arm/boot/dts/rockchip/rk3036-kylin.dts @@ -382,6 +382,18 @@ &usb_otg { status =3D "okay"; }; =20 +&usb2phy { + status =3D "okay"; +}; + +&usb2phy_host { + status =3D "okay"; +}; + +&usb2phy_otg { + status =3D "okay"; +}; + &vop { status =3D "okay"; }; diff --git a/arch/arm/boot/dts/rockchip/rk3036.dtsi b/arch/arm/boot/dts/roc= kchip/rk3036.dtsi index f4292b586bc2..fca21ebb224b 100644 --- a/arch/arm/boot/dts/rockchip/rk3036.dtsi +++ b/arch/arm/boot/dts/rockchip/rk3036.dtsi @@ -213,6 +213,8 @@ usb_otg: usb@10180000 { g-np-tx-fifo-size =3D <16>; g-rx-fifo-size =3D <275>; g-tx-fifo-size =3D <256 128 128 64 64 32>; + phys =3D <&usb2phy_otg>; + phy-names =3D "usb2-phy"; status =3D "disabled"; }; =20 @@ -224,6 +226,8 @@ usb_host: usb@101c0000 { clocks =3D <&cru HCLK_OTG1>; clock-names =3D "otg"; dr_mode =3D "host"; + phys =3D <&usb2phy_host>; + phy-names =3D "usb2-phy"; status =3D "disabled"; }; =20 @@ -342,6 +346,37 @@ cru: clock-controller@20000000 { grf: syscon@20008000 { compatible =3D "rockchip,rk3036-grf", "syscon", "simple-mfd"; reg =3D <0x20008000 0x1000>; + #address-cells =3D <1>; + #size-cells =3D <1>; + + usb2phy: usb2phy@17c { + compatible =3D "rockchip,rk3036-usb2phy"; + reg =3D <0x017c 0x20>; + clocks =3D <&cru SCLK_OTGPHY0>; + clock-names =3D "phyclk"; + clock-output-names =3D "usb480m_phy"; + assigned-clocks =3D <&cru SCLK_USB480M>; + assigned-clock-parents =3D <&usb2phy>; + #clock-cells =3D <0>; + status =3D "disabled"; + + usb2phy_host: host-port { + interrupts =3D ; + interrupt-names =3D "linestate"; + #phy-cells =3D <0>; + status =3D "disabled"; + }; + + usb2phy_otg: otg-port { + interrupts =3D , + , + ; + interrupt-names =3D "otg-bvalid", "otg-id", + "linestate"; + #phy-cells =3D <0>; + status =3D "disabled"; + }; + }; =20 power: power-controller { compatible =3D "rockchip,rk3036-power-controller"; --=20 2.47.2