From nobody Mon Feb 9 15:50:48 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4F8FB1B041E; Fri, 2 May 2025 05:34:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746164094; cv=none; b=BfoFc8AcIOHLIn8YYBNXwJ9WEeBDVrIazAEmJy0eUgmtfG3Pybhj7DtfIhPCGPqd6Jw0+A8nCU0kqQKaTpj9GDUNo65IkCw2PdtC+8xAQGK+W8KZvP5ZIOVtOo9WJfMHYBKbHke2AsoKoV+0gNm54dLg4y0SimzsV4UowjXSf4k= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746164094; c=relaxed/simple; bh=ZHF6lZG6H0CLXxqER5TXOaxCAJ/9ZDc6g5NfObH5I+w=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=BvIwiZOZy20nhsWbOAPQtIWI+unvyliJ2xWIdn7/TePVAODImm028Szn0PWWXIkHvNEUCU3QACrRoWoshsdkrfWexzM8JYR8t790v5RqdHlh3CCvb/gGmx1RSuAB9JJdKVlNoYhXnWPWR1gK8vTd9SdQNZO6T99gRISpE6/H//w= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=mWmRM4v5; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="mWmRM4v5" Received: by smtp.kernel.org (Postfix) with ESMTPS id D3CA6C4CEEE; Fri, 2 May 2025 05:34:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1746164093; bh=ZHF6lZG6H0CLXxqER5TXOaxCAJ/9ZDc6g5NfObH5I+w=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=mWmRM4v5wNhXj/mTCWE3K5ZU0VpXsxfUMd2MCqIk9yJXn92u91JvyUKr5A+lNkX6K OFp8hJP6Z1AKK/A98VaMsw10uq0OLTDDJOTiQRy765H45sfoDcNd/IJDDdYU7+iXIr xE2fZXPMuF7f4SNaZZd2A0P8A/7zue5t4OA4HGM6rZ+AReOjKPg+ysCJA4zP/TjIID mWiUjAWbPZz4nCIMa7WydqQxIS/J70YsR3K6elicPHo7v9+zdya85ZUiuiWWaYfp2u sgdp1AWeo+WCMvwvgfZIwwI624C5fbIHTlVSlMm+lLdLVqJ6FCwK8LpgVZn+uLmz3A xPotZgASfr3yA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id C35E6C3ABA3; Fri, 2 May 2025 05:34:53 +0000 (UTC) From: Sung-Chi Li via B4 Relay Date: Fri, 02 May 2025 13:34:45 +0800 Subject: [PATCH v2 1/3] platform/chrome: update pwm fan control host commands Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250502-cros_ec_fan-v2-1-4d588504a01f@chromium.org> References: <20250502-cros_ec_fan-v2-0-4d588504a01f@chromium.org> In-Reply-To: <20250502-cros_ec_fan-v2-0-4d588504a01f@chromium.org> To: Benson Leung , Guenter Roeck , =?utf-8?q?Thomas_Wei=C3=9Fschuh?= , Jean Delvare , Guenter Roeck , Jonathan Corbet Cc: chrome-platform@lists.linux.dev, linux-kernel@vger.kernel.org, linux-hwmon@vger.kernel.org, linux-doc@vger.kernel.org, Sung-Chi Li , Sung-Chi Li X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1746164092; l=2190; i=lschyi@chromium.org; s=20250429; h=from:subject:message-id; bh=4T0NUcv5bDwOZ86UnzqLmBBo6gQiZCHpqea0lTmvUmo=; b=XLKkGq/1Nn45mqPASW5UteQy9xW/ap+7lqblzHQgsw7oA1mTAIaHJcpuMFdmruZvAvvDHxCu3 x2BTKrf3vB9DC3oACybKeVEc+my275KhfDxr2JDLNtISgQofArILAzU X-Developer-Key: i=lschyi@chromium.org; a=ed25519; pk=9gCZPRJmYyHDt6VN9FV2UreFcUr73JFrwYvmsltW9Y8= X-Endpoint-Received: by B4 Relay for lschyi@chromium.org/20250429 with auth_id=392 X-Original-From: Sung-Chi Li Reply-To: lschyi@chromium.org From: Sung-Chi Li Update cros_ec_commands.h to include definitions for getting PWM fan duty, getting and setting the fan control mode. Signed-off-by: Sung-Chi Li --- include/linux/platform_data/cros_ec_commands.h | 29 ++++++++++++++++++++++= +++- 1 file changed, 28 insertions(+), 1 deletion(-) diff --git a/include/linux/platform_data/cros_ec_commands.h b/include/linux= /platform_data/cros_ec_commands.h index 1f4e4f2b89bb936b4b1c3f4162fec203b196cbc8..2ac1a30f9a3195bfc9dffc72fe5= c5b92d83f1ef2 100644 --- a/include/linux/platform_data/cros_ec_commands.h +++ b/include/linux/platform_data/cros_ec_commands.h @@ -1825,6 +1825,16 @@ struct ec_response_pwm_get_duty { uint16_t duty; /* Duty cycle, EC_PWM_MAX_DUTY =3D 100% */ } __ec_align2; =20 +#define EC_CMD_PWM_GET_FAN_DUTY 0x0027 + +struct ec_params_pwm_get_fan_duty { + uint8_t fan_idx; +} __ec_align1; + +struct ec_response_pwm_get_fan_duty { + uint32_t percent; /* Percentage of duty cycle, ranging from 0 ~ 100 */ +} __ec_align4; + /*************************************************************************= ****/ /* * Lightbar commands. This looks worse than it is. Since we only use one H= OST @@ -3105,14 +3115,31 @@ struct ec_params_thermal_set_threshold_v1 { =20 /*************************************************************************= ***/ =20 -/* Toggle automatic fan control */ +/* Set or get fan control mode */ #define EC_CMD_THERMAL_AUTO_FAN_CTRL 0x0052 =20 +enum ec_auto_fan_ctrl_cmd { + EC_AUTO_FAN_CONTROL_CMD_SET =3D 0, + EC_AUTO_FAN_CONTROL_CMD_GET, +}; + /* Version 1 of input params */ struct ec_params_auto_fan_ctrl_v1 { uint8_t fan_idx; } __ec_align1; =20 +/* Version 2 of input params */ +struct ec_params_auto_fan_ctrl_v2 { + uint8_t fan_idx; + uint8_t cmd; /* enum ec_auto_fan_ctrl_cmd */ + uint8_t set_auto; /* only used with EC_AUTO_FAN_CONTROL_CMD_SET - bool + */ +} __ec_align4; + +struct ec_response_auto_fan_control { + uint8_t is_auto; /* bool */ +} __ec_align1; + /* Get/Set TMP006 calibration data */ #define EC_CMD_TMP006_GET_CALIBRATION 0x0053 #define EC_CMD_TMP006_SET_CALIBRATION 0x0054 --=20 2.49.0.906.g1f30a19c02-goog From nobody Mon Feb 9 15:50:48 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4F8AF1B0416; Fri, 2 May 2025 05:34:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746164094; cv=none; b=Vn5Em2J7FfxXbzHJ/3Q+pKvVcXgsWXeGk3F2p2l56rTYp36RAZuKhfYTc8NfTYsKhS28zzIDuZVjf55bV86thQz78nf0nwoNRfwIpNBf9fPvH51NU1aGdsm70ARmScN+Pfc4JIG9Y5hXqwZpBrIhr0iVF/8wtZF9Z5z860+F86A= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746164094; c=relaxed/simple; bh=Xjs9xDfXPxwpsFGxrhIlgiH+4WEQApIAKe56RClSq/s=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=LrL/dGJHZ8jRGx5wfe1ExEYzsvYVL3elLah/XEJiYOgo4HGWTn+In6F7MDap7YYYIbbzumLk3RXHInf9rMw1cPodNeZfBaeD5uvcrjMspyH3gV6j9YoZsadmyZNCRParERoZRZIUl1MlsGXfb1Sc8HCUxq0ZFaJWNHiWQ4HdJpw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=hIYoW7jF; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="hIYoW7jF" Received: by smtp.kernel.org (Postfix) with ESMTPS id E091BC4CEE9; Fri, 2 May 2025 05:34:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1746164093; bh=Xjs9xDfXPxwpsFGxrhIlgiH+4WEQApIAKe56RClSq/s=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=hIYoW7jFnzV85AEEl551EitMSe97/OlzELepMHNEUoIZmdfDyJx/r263yw/gc4N4R AhFR7PKV6ixPdlfB3VSzBpNVUMDCdlxR7Lh51vhhX6O2ur410JixtFscKUqiI+lLgX EqKeFp1H7d1rRPJZZJP2Ra8t2dJB/qBswVqky8O1yxTc5G64Hc9RU7EtWuSGj+8MRZ 73wvbPz6lb8dbifmhdpeF6Mx8tjG15M+lFWHw/xtneSByGrr4Bmej6oNRb+L2bxX85 SpuJK9yI1TqADecMqwD4+D7sNqiyQJCVodSPyY/bmPdbMKSyKmfK640NPYKYI7K+TM HUBnOwf3R51CA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id D0617C3ABB0; Fri, 2 May 2025 05:34:53 +0000 (UTC) From: Sung-Chi Li via B4 Relay Date: Fri, 02 May 2025 13:34:46 +0800 Subject: [PATCH v2 2/3] hwmon: (cros_ec) add PWM control over fans Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250502-cros_ec_fan-v2-2-4d588504a01f@chromium.org> References: <20250502-cros_ec_fan-v2-0-4d588504a01f@chromium.org> In-Reply-To: <20250502-cros_ec_fan-v2-0-4d588504a01f@chromium.org> To: Benson Leung , Guenter Roeck , =?utf-8?q?Thomas_Wei=C3=9Fschuh?= , Jean Delvare , Guenter Roeck , Jonathan Corbet Cc: chrome-platform@lists.linux.dev, linux-kernel@vger.kernel.org, linux-hwmon@vger.kernel.org, linux-doc@vger.kernel.org, Sung-Chi Li , Sung-Chi Li X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1746164092; l=11538; i=lschyi@chromium.org; s=20250429; h=from:subject:message-id; bh=w+vqcxcG0V7XmoAi1Os82e5fHtufny5FxX7B0YcPkdQ=; b=JIpfmQLRCNLMryMutsUJdAAgyFH3zHLxBoLX6Xty7PD0dhbRo/rmdONLOVWj0zoMEns5XmwlN fOsWGZvZwX2BNH9j+IK4yoAMnJvb78O8icqeBP5JRU3mW2O6BaQ4DYV X-Developer-Key: i=lschyi@chromium.org; a=ed25519; pk=9gCZPRJmYyHDt6VN9FV2UreFcUr73JFrwYvmsltW9Y8= X-Endpoint-Received: by B4 Relay for lschyi@chromium.org/20250429 with auth_id=392 X-Original-From: Sung-Chi Li Reply-To: lschyi@chromium.org From: Sung-Chi Li Newer EC firmware supports controlling fans through host commands, so adding corresponding implementations for controlling these fans in the driver for other kernel services and userspace to control them. The driver will first probe the supported host command versions (get and set of fan PWM values, get and set of fan control mode) to see if the connected EC fulfills the requirements of controlling the fan, then exposes corresponding sysfs nodes for userspace to control the fan with corresponding read and write implementations. As EC will automatically change the fan mode to auto when the device is suspended, the power management hooks are added as well to keep the fan control mode and fan PWM value consistent during suspend and resume. As we need to access the hwmon device in the power management hook, update the driver by storing the hwmon device in the driver data as well. Signed-off-by: Sung-Chi Li --- Documentation/hwmon/cros_ec_hwmon.rst | 5 +- drivers/hwmon/cros_ec_hwmon.c | 201 ++++++++++++++++++++++++++++++= ++++ 2 files changed, 205 insertions(+), 1 deletion(-) diff --git a/Documentation/hwmon/cros_ec_hwmon.rst b/Documentation/hwmon/cr= os_ec_hwmon.rst index 47ecae983bdbef4bfcafc5dd2fff3de039f77f8e..5b802be120438732529c3d25b1a= fa8b4ee353305 100644 --- a/Documentation/hwmon/cros_ec_hwmon.rst +++ b/Documentation/hwmon/cros_ec_hwmon.rst @@ -23,4 +23,7 @@ ChromeOS embedded controller used in Chromebooks and othe= r devices. =20 The channel labels exposed via hwmon are retrieved from the EC itself. =20 -Fan and temperature readings are supported. +Fan and temperature readings are supported. PWM fan control is also suppor= ted if +the EC also supports setting fan PWM values and fan mode. Note that EC will +switch fan control mode back to auto when suspended. This driver will rest= ore +the fan state before suspended. diff --git a/drivers/hwmon/cros_ec_hwmon.c b/drivers/hwmon/cros_ec_hwmon.c index 9991c3fa020ac859cbbff29dfb669e53248df885..c5e42e2a03a0c8c68d3f8afbb2b= b45b93a58b955 100644 --- a/drivers/hwmon/cros_ec_hwmon.c +++ b/drivers/hwmon/cros_ec_hwmon.c @@ -7,6 +7,7 @@ =20 #include #include +#include #include #include #include @@ -21,6 +22,9 @@ struct cros_ec_hwmon_priv { struct cros_ec_device *cros_ec; const char *temp_sensor_names[EC_TEMP_SENSOR_ENTRIES + EC_TEMP_SENSOR_B_E= NTRIES]; u8 usable_fans; + bool fan_control_supported; + u8 manual_fans; /* bits to indicate whether the fan is set to manual */ + u8 manual_fan_pwm_values[EC_FAN_SPEED_ENTRIES]; }; =20 static int cros_ec_hwmon_read_fan_speed(struct cros_ec_device *cros_ec, u8= index, u16 *speed) @@ -36,6 +40,40 @@ static int cros_ec_hwmon_read_fan_speed(struct cros_ec_d= evice *cros_ec, u8 index return 0; } =20 +static int cros_ec_hwmon_read_pwm_value(struct cros_ec_device *cros_ec, u8= index, u8 *pwm_value) +{ + struct ec_params_pwm_get_fan_duty req =3D { + .fan_idx =3D index, + }; + struct ec_response_pwm_get_fan_duty resp; + int ret =3D cros_ec_cmd(cros_ec, 0, EC_CMD_PWM_GET_FAN_DUTY, &req, sizeof= (req), + &resp, sizeof(resp)); + + if (ret < 0) + return ret; + + *pwm_value =3D (u8)DIV_ROUND_CLOSEST(le32_to_cpu(resp.percent) * 255, 100= ); + return 0; +} + +static int cros_ec_hwmon_read_pwm_enable(struct cros_ec_device *cros_ec, u= 8 index, + u8 *control_method) +{ + struct ec_params_auto_fan_ctrl_v2 req =3D { + .cmd =3D EC_AUTO_FAN_CONTROL_CMD_GET, + .fan_idx =3D index, + }; + struct ec_response_auto_fan_control resp; + int ret =3D cros_ec_cmd(cros_ec, 2, EC_CMD_THERMAL_AUTO_FAN_CTRL, &req, s= izeof(req), + &resp, sizeof(resp)); + + if (ret < 0) + return ret; + + *control_method =3D resp.is_auto ? 2 : 1; + return 0; +} + static int cros_ec_hwmon_read_temp(struct cros_ec_device *cros_ec, u8 inde= x, u8 *temp) { unsigned int offset; @@ -76,6 +114,8 @@ static int cros_ec_hwmon_read(struct device *dev, enum h= wmon_sensor_types type, struct cros_ec_hwmon_priv *priv =3D dev_get_drvdata(dev); int ret =3D -EOPNOTSUPP; u16 speed; + u8 control_method; + u8 pwm_value; u8 temp; =20 if (type =3D=3D hwmon_fan) { @@ -92,6 +132,17 @@ static int cros_ec_hwmon_read(struct device *dev, enum = hwmon_sensor_types type, if (ret =3D=3D 0) *val =3D cros_ec_hwmon_is_error_fan(speed); } + } else if (type =3D=3D hwmon_pwm) { + if (attr =3D=3D hwmon_pwm_enable) { + ret =3D cros_ec_hwmon_read_pwm_enable(priv->cros_ec, channel, + &control_method); + if (ret =3D=3D 0) + *val =3D control_method; + } else if (attr =3D=3D hwmon_pwm_input) { + ret =3D cros_ec_hwmon_read_pwm_value(priv->cros_ec, channel, &pwm_value= ); + if (ret =3D=3D 0) + *val =3D pwm_value; + } } else if (type =3D=3D hwmon_temp) { if (attr =3D=3D hwmon_temp_input) { ret =3D cros_ec_hwmon_read_temp(priv->cros_ec, channel, &temp); @@ -124,6 +175,72 @@ static int cros_ec_hwmon_read_string(struct device *de= v, enum hwmon_sensor_types return -EOPNOTSUPP; } =20 +static int cros_ec_hwmon_set_fan_pwm_val(struct cros_ec_device *cros_ec, u= 8 index, u8 val) +{ + int ret; + struct ec_params_pwm_set_fan_duty_v1 req =3D { + .fan_idx =3D index, + .percent =3D DIV_ROUND_CLOSEST((uint32_t)val * 100, 255), + }; + + ret =3D cros_ec_cmd(cros_ec, 1, EC_CMD_PWM_SET_FAN_DUTY, &req, sizeof(req= ), NULL, 0); + if (ret < 0) + return ret; + return 0; +} + +static int cros_ec_hwmon_write_pwm_input(struct cros_ec_device *cros_ec, u= 8 index, u8 val) +{ + u8 control_method; + int ret; + + ret =3D cros_ec_hwmon_read_pwm_enable(cros_ec, index, &control_method); + if (ret) + return ret; + if (control_method !=3D 1) + return -EOPNOTSUPP; + + return cros_ec_hwmon_set_fan_pwm_val(cros_ec, index, val); +} + +static int cros_ec_hwmon_write_pwm_enable(struct cros_ec_device *cros_ec, = u8 index, u8 val) +{ + int ret; + struct ec_params_auto_fan_ctrl_v2 req =3D { + .fan_idx =3D index, + .cmd =3D EC_AUTO_FAN_CONTROL_CMD_SET, + }; + + /* No CROS EC supports no fan speed control */ + if (val =3D=3D 0) + return -EOPNOTSUPP; + + req.set_auto =3D (val !=3D 1) ? true : false; + ret =3D cros_ec_cmd(cros_ec, 2, EC_CMD_THERMAL_AUTO_FAN_CTRL, &req, sizeo= f(req), NULL, 0); + if (ret < 0) + return ret; + return 0; +} + +static int cros_ec_hwmon_write(struct device *dev, enum hwmon_sensor_types= type, u32 attr, + int channel, long val) +{ + struct cros_ec_hwmon_priv *priv =3D dev_get_drvdata(dev); + + if (type =3D=3D hwmon_pwm) { + switch (attr) { + case hwmon_pwm_input: + return cros_ec_hwmon_write_pwm_input(priv->cros_ec, channel, val); + case hwmon_pwm_enable: + return cros_ec_hwmon_write_pwm_enable(priv->cros_ec, channel, val); + default: + return -EOPNOTSUPP; + } + } + + return -EOPNOTSUPP; +} + static umode_t cros_ec_hwmon_is_visible(const void *data, enum hwmon_senso= r_types type, u32 attr, int channel) { @@ -132,6 +249,9 @@ static umode_t cros_ec_hwmon_is_visible(const void *dat= a, enum hwmon_sensor_type if (type =3D=3D hwmon_fan) { if (priv->usable_fans & BIT(channel)) return 0444; + } else if (type =3D=3D hwmon_pwm) { + if (priv->fan_control_supported && priv->usable_fans & BIT(channel)) + return 0644; } else if (type =3D=3D hwmon_temp) { if (priv->temp_sensor_names[channel]) return 0444; @@ -147,6 +267,11 @@ static const struct hwmon_channel_info * const cros_ec= _hwmon_info[] =3D { HWMON_F_INPUT | HWMON_F_FAULT, HWMON_F_INPUT | HWMON_F_FAULT, HWMON_F_INPUT | HWMON_F_FAULT), + HWMON_CHANNEL_INFO(pwm, + HWMON_PWM_INPUT | HWMON_PWM_ENABLE, + HWMON_PWM_INPUT | HWMON_PWM_ENABLE, + HWMON_PWM_INPUT | HWMON_PWM_ENABLE, + HWMON_PWM_INPUT | HWMON_PWM_ENABLE), HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT | HWMON_T_FAULT | HWMON_T_LABEL, HWMON_T_INPUT | HWMON_T_FAULT | HWMON_T_LABEL, @@ -178,6 +303,7 @@ static const struct hwmon_channel_info * const cros_ec_= hwmon_info[] =3D { static const struct hwmon_ops cros_ec_hwmon_ops =3D { .read =3D cros_ec_hwmon_read, .read_string =3D cros_ec_hwmon_read_string, + .write =3D cros_ec_hwmon_write, .is_visible =3D cros_ec_hwmon_is_visible, }; =20 @@ -233,6 +359,21 @@ static void cros_ec_hwmon_probe_fans(struct cros_ec_hw= mon_priv *priv) } } =20 +static inline bool is_cros_ec_cmd_fulfilled(struct cros_ec_device *cros_ec, + u16 cmd, u8 version) +{ + int ret =3D cros_ec_get_cmd_versions(cros_ec, cmd); + + return ret >=3D 0 && (ret & EC_VER_MASK(version)); +} + +static bool cros_ec_hwmon_probe_fan_control_supported(struct cros_ec_devic= e *cros_ec) +{ + return is_cros_ec_cmd_fulfilled(cros_ec, EC_CMD_PWM_GET_FAN_DUTY, 0) && + is_cros_ec_cmd_fulfilled(cros_ec, EC_CMD_PWM_SET_FAN_DUTY, 1) && + is_cros_ec_cmd_fulfilled(cros_ec, EC_CMD_THERMAL_AUTO_FAN_CTRL, 2); +} + static int cros_ec_hwmon_probe(struct platform_device *pdev) { struct device *dev =3D &pdev->dev; @@ -259,13 +400,71 @@ static int cros_ec_hwmon_probe(struct platform_device= *pdev) =20 cros_ec_hwmon_probe_temp_sensors(dev, priv, thermal_version); cros_ec_hwmon_probe_fans(priv); + priv->fan_control_supported =3D + cros_ec_hwmon_probe_fan_control_supported(priv->cros_ec); =20 hwmon_dev =3D devm_hwmon_device_register_with_info(dev, "cros_ec", priv, &cros_ec_hwmon_chip_info, NULL); + platform_set_drvdata(pdev, priv); =20 return PTR_ERR_OR_ZERO(hwmon_dev); } =20 +static int cros_ec_hwmon_suspend(struct platform_device *pdev, pm_message_= t state) +{ + struct cros_ec_hwmon_priv *priv =3D platform_get_drvdata(pdev); + size_t i; + int ret; + u8 control_method; + + if (!priv->fan_control_supported) + return 0; + + /* EC sets fan control to auto after suspended, store settings before sus= pending. */ + for (i =3D 0; i < EC_FAN_SPEED_ENTRIES; i++) { + if (!(priv->usable_fans & BIT(i))) + continue; + + ret =3D cros_ec_hwmon_read_pwm_enable(priv->cros_ec, i, &control_method); + if (ret) + continue; + + if (control_method !=3D 1) { + priv->manual_fans &=3D ~BIT(i); + continue; + } else { + priv->manual_fans |=3D BIT(i); + } + + cros_ec_hwmon_read_pwm_value(priv->cros_ec, i, &priv->manual_fan_pwm_val= ues[i]); + } + + return 0; +} + +static int cros_ec_hwmon_resume(struct platform_device *pdev) +{ + const struct cros_ec_hwmon_priv *priv =3D platform_get_drvdata(pdev); + size_t i; + + if (!priv->fan_control_supported) + return 0; + + /* EC sets fan control to auto after suspended, restore to settings befor= e suspended. */ + for (i =3D 0; i < EC_FAN_SPEED_ENTRIES; i++) { + if (!(priv->manual_fans & BIT(i))) + continue; + + /* + * Setting fan PWM value to EC will change the mode to manual for that f= an in EC as + * well, so we do not need to issue a separate fan mode to manual call. + */ + cros_ec_hwmon_set_fan_pwm_val(priv->cros_ec, i, priv->manual_fan_pwm_val= ues[i]); + } + + return 0; +} + static const struct platform_device_id cros_ec_hwmon_id[] =3D { { DRV_NAME, 0 }, {} @@ -274,6 +473,8 @@ static const struct platform_device_id cros_ec_hwmon_id= [] =3D { static struct platform_driver cros_ec_hwmon_driver =3D { .driver.name =3D DRV_NAME, .probe =3D cros_ec_hwmon_probe, + .suspend =3D cros_ec_hwmon_suspend, + .resume =3D cros_ec_hwmon_resume, .id_table =3D cros_ec_hwmon_id, }; module_platform_driver(cros_ec_hwmon_driver); --=20 2.49.0.906.g1f30a19c02-goog From nobody Mon Feb 9 15:50:48 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4F8601AF4D5; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250502-cros_ec_fan-v2-3-4d588504a01f@chromium.org> References: <20250502-cros_ec_fan-v2-0-4d588504a01f@chromium.org> In-Reply-To: <20250502-cros_ec_fan-v2-0-4d588504a01f@chromium.org> To: Benson Leung , Guenter Roeck , =?utf-8?q?Thomas_Wei=C3=9Fschuh?= , Jean Delvare , Guenter Roeck , Jonathan Corbet Cc: chrome-platform@lists.linux.dev, linux-kernel@vger.kernel.org, linux-hwmon@vger.kernel.org, linux-doc@vger.kernel.org, Sung-Chi Li , Sung-Chi Li X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1746164092; l=5119; i=lschyi@chromium.org; s=20250429; h=from:subject:message-id; bh=STzNXdU8ezymZTAK/gVnm4TwlGsm/I6wriR+2/nBIdg=; b=MkGVoQLKYLejauV+to63+g0hFH/2Jo3xzuCpl0EsnSlvdhZkvvChqPjQ5dsOO1HbMBJ3IZ/lJ jfif3UIb6OsDLP+AckGq7VavB7jiOndv01Rs3FYFF4IAQc+N6NFM7Yy X-Developer-Key: i=lschyi@chromium.org; a=ed25519; pk=9gCZPRJmYyHDt6VN9FV2UreFcUr73JFrwYvmsltW9Y8= X-Endpoint-Received: by B4 Relay for lschyi@chromium.org/20250429 with auth_id=392 X-Original-From: Sung-Chi Li Reply-To: lschyi@chromium.org From: Sung-Chi Li Register fans connected under EC as thermal cooling devices as well, so these fans can then work with the thermal framework. During the driver probing phase, we will also try to register each fan as a thermal cooling device based on previous probe result (whether the there are fans connected on that channel, and whether EC supports fan control). The basic get max state, get current state, and set current state methods are then implemented as well. Signed-off-by: Sung-Chi Li --- Documentation/hwmon/cros_ec_hwmon.rst | 2 ++ drivers/hwmon/cros_ec_hwmon.c | 66 +++++++++++++++++++++++++++++++= ++++ 2 files changed, 68 insertions(+) diff --git a/Documentation/hwmon/cros_ec_hwmon.rst b/Documentation/hwmon/cr= os_ec_hwmon.rst index 5b802be120438732529c3d25b1afa8b4ee353305..82c75bdaf912a116eaafa3149dc= 1252b3f7007d2 100644 --- a/Documentation/hwmon/cros_ec_hwmon.rst +++ b/Documentation/hwmon/cros_ec_hwmon.rst @@ -27,3 +27,5 @@ Fan and temperature readings are supported. PWM fan contr= ol is also supported if the EC also supports setting fan PWM values and fan mode. Note that EC will switch fan control mode back to auto when suspended. This driver will rest= ore the fan state before suspended. +If a fan is controllable, this driver will register that fan as a cooling = device +in the thermal framework as well. diff --git a/drivers/hwmon/cros_ec_hwmon.c b/drivers/hwmon/cros_ec_hwmon.c index c5e42e2a03a0c8c68d3f8afbb2bb45b93a58b955..abfcf44fb7505189124e78c651b= 0eb1e0533b4e8 100644 --- a/drivers/hwmon/cros_ec_hwmon.c +++ b/drivers/hwmon/cros_ec_hwmon.c @@ -13,6 +13,7 @@ #include #include #include +#include #include #include =20 @@ -27,6 +28,11 @@ struct cros_ec_hwmon_priv { u8 manual_fan_pwm_values[EC_FAN_SPEED_ENTRIES]; }; =20 +struct cros_ec_hwmon_cooling_priv { + struct cros_ec_hwmon_priv *hwmon_priv; + u8 index; +}; + static int cros_ec_hwmon_read_fan_speed(struct cros_ec_device *cros_ec, u8= index, u16 *speed) { int ret; @@ -300,6 +306,34 @@ static const struct hwmon_channel_info * const cros_ec= _hwmon_info[] =3D { NULL }; =20 +static int +cros_ec_hwmon_cooling_get_max_state(struct thermal_cooling_device *cdev, + unsigned long *val) +{ + *val =3D 255; + return 0; +} + +static int cros_ec_hwmon_cooling_get_cur_state(struct thermal_cooling_devi= ce *cdev, + unsigned long *val) +{ + const struct cros_ec_hwmon_cooling_priv *priv =3D cdev->devdata; + u8 read_val; + int ret =3D cros_ec_hwmon_read_pwm_value(priv->hwmon_priv->cros_ec, priv-= >index, &read_val); + + if (ret =3D=3D 0) + *val =3D read_val; + return ret; +} + +static int cros_ec_hwmon_cooling_set_cur_state(struct thermal_cooling_devi= ce *cdev, + unsigned long val) +{ + const struct cros_ec_hwmon_cooling_priv *priv =3D cdev->devdata; + + return cros_ec_hwmon_write_pwm_input(priv->hwmon_priv->cros_ec, priv->ind= ex, val); +} + static const struct hwmon_ops cros_ec_hwmon_ops =3D { .read =3D cros_ec_hwmon_read, .read_string =3D cros_ec_hwmon_read_string, @@ -307,6 +341,12 @@ static const struct hwmon_ops cros_ec_hwmon_ops =3D { .is_visible =3D cros_ec_hwmon_is_visible, }; =20 +static const struct thermal_cooling_device_ops cros_ec_thermal_cooling_ops= =3D { + .get_max_state =3D cros_ec_hwmon_cooling_get_max_state, + .get_cur_state =3D cros_ec_hwmon_cooling_get_cur_state, + .set_cur_state =3D cros_ec_hwmon_cooling_set_cur_state, +}; + static const struct hwmon_chip_info cros_ec_hwmon_chip_info =3D { .ops =3D &cros_ec_hwmon_ops, .info =3D cros_ec_hwmon_info, @@ -374,6 +414,31 @@ static bool cros_ec_hwmon_probe_fan_control_supported(= struct cros_ec_device *cro is_cros_ec_cmd_fulfilled(cros_ec, EC_CMD_THERMAL_AUTO_FAN_CTRL, 2); } =20 +static void cros_ec_hwmon_register_fan_cooling_devices(struct device *dev, + struct cros_ec_hwmon_priv *priv) +{ + struct cros_ec_hwmon_cooling_priv *cpriv; + size_t i; + + if (!priv->fan_control_supported) + return; + + for (i =3D 0; i < EC_FAN_SPEED_ENTRIES; i++) { + if (!(priv->usable_fans & BIT(i))) + continue; + + cpriv =3D devm_kzalloc(dev, sizeof(*cpriv), GFP_KERNEL); + if (!cpriv) + return; + + cpriv->hwmon_priv =3D priv; + cpriv->index =3D i; + devm_thermal_of_cooling_device_register( + dev, NULL, devm_kasprintf(dev, GFP_KERNEL, "cros-ec-fan%zu", i), cpriv, + &cros_ec_thermal_cooling_ops); + } +} + static int cros_ec_hwmon_probe(struct platform_device *pdev) { struct device *dev =3D &pdev->dev; @@ -402,6 +467,7 @@ static int cros_ec_hwmon_probe(struct platform_device *= pdev) cros_ec_hwmon_probe_fans(priv); priv->fan_control_supported =3D cros_ec_hwmon_probe_fan_control_supported(priv->cros_ec); + cros_ec_hwmon_register_fan_cooling_devices(dev, priv); =20 hwmon_dev =3D devm_hwmon_device_register_with_info(dev, "cros_ec", priv, &cros_ec_hwmon_chip_info, NULL); --=20 2.49.0.906.g1f30a19c02-goog