From nobody Sat Feb 7 18:43:37 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9EC912DC79C; Wed, 30 Apr 2025 21:21:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.8 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746048078; cv=none; b=CpYAxID8D2gQJVf8OzVwvzTYygXJ6rEMSixk0qC/gRcAsEOzAMki0CNEh9rYa8em2AQ+ZaiA2jgjpaSw5fcBn9hfQTcaVdT3oN+CNWdLyHAP+DXcIfun7g97KL6Okom4D4QVT3/I1FnwNLC7AOYDdQot68+PtjxPLfR/DI91YMc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746048078; c=relaxed/simple; bh=Hjl/PzJ9OBwygFkBj0UZZ1ITO2bUymcG7qA5rdmdkPk=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Set3lKNkXa7KnBSxorpmBjNg50xFnb5+1Q8S/hcVJC5YZ3KdoucPzhptf+IYl0Rlg3qc7ZRpBcK72V/vS8PS3l2pySdrJAceoe0BLgnaIJczKF4BM/aW2/oHCfuehqD7eXH3w48EzpRjvdn+B+ZQzkTQueep7WOf8koXET+dLw0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=f7NQ9o8t; arc=none smtp.client-ip=192.198.163.8 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="f7NQ9o8t" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1746048077; x=1777584077; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Hjl/PzJ9OBwygFkBj0UZZ1ITO2bUymcG7qA5rdmdkPk=; b=f7NQ9o8t2h2rfwkSfYvTMtHanlw1Q4UHcgK32FJ09GaPfZ5LT90Cf3ha AyXNCGExVdkdGRWq8uxS49QzEXTUAvM8zZqc/iTWcmlInWSOr18enU4ga L8dMfuTEq0+PgrouH+Qte7m1XDKm5D1t597AHFTxs3QDbmCKDKHsT6ac8 9gLo0dZZmmXgW+Y6S7tD4fd2WakCPC0u9KpLC468sIHwoOTtQX7uwnB2l uwMdLDfNTOTihCBlh1eUSyHIesCHHGBAVHeRXlJhKrY0YEYAKZFBfCqWa FOt0/sF+GEmBnajkiIb3u+VAOdteB4fxqaW4CuWZ6EpENAOWL6ECnlMsU A==; X-CSE-ConnectionGUID: MUlwXpyMTdKtZnj5TnUzbw== X-CSE-MsgGUID: 8Mxp7/FvS1WP4y3gkDWPeg== X-IronPort-AV: E=McAfee;i="6700,10204,11419"; a="65257531" X-IronPort-AV: E=Sophos;i="6.15,252,1739865600"; d="scan'208";a="65257531" Received: from orviesa009.jf.intel.com ([10.64.159.149]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Apr 2025 14:21:15 -0700 X-CSE-ConnectionGUID: 3Sm4mRWpQ5qzLS5mef5mqw== X-CSE-MsgGUID: +dnr9V/CQUC8y/UfObSuHQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.15,252,1739865600"; d="scan'208";a="133972268" Received: from agladkov-desk.ger.corp.intel.com (HELO debox1-desk4.lan) ([10.125.110.57]) by orviesa009-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Apr 2025 14:21:15 -0700 From: "David E. Box" To: linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org, david.e.box@linux.intel.com, srinivas.pandruvada@linux.intel.com, andriy.shevchenko@linux.intel.com, ilpo.jarvinen@linux.intel.com, tony.luck@intel.com, xi.pardee@linux.intel.com Cc: hdegoede@redhat.com Subject: [PATCH 01/15] MAINTAINERS: Add link to documentation of Intel PMT ABI Date: Wed, 30 Apr 2025 14:20:50 -0700 Message-ID: <20250430212106.369208-2-david.e.box@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250430212106.369208-1-david.e.box@linux.intel.com> References: <20250430212106.369208-1-david.e.box@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add a link to the documentation for the Intel Platform Monitoring Technology ABI in Documentation/ABI/testing/sysfs-class-intel_pmt Signed-off-by: David E. Box Tested-by: Tony Luck --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index be2f100d7f4b..bd9f99585894 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -12180,6 +12180,7 @@ F: include/linux/mfd/intel_soc_pmic* INTEL PMT DRIVERS M: David E. Box S: Supported +F: Documentation/ABI/testing/sysfs-class-intel_pmt F: drivers/platform/x86/intel/pmt/ =20 INTEL PRO/WIRELESS 2100, 2200BG, 2915ABG NETWORK CONNECTION SUPPORT --=20 2.43.0 From nobody Sat Feb 7 18:43:37 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A966B297A7F; Wed, 30 Apr 2025 21:21:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.8 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746048080; cv=none; b=tmNMAKiSK698U+rlcr/fxftcN1tWfYrGPC2nrusvbHnA6Nkx8aajU/ht+BcFN8OdelZDWATV4RonFEOFwLUIWoxd+f/hv/XdteMY+ZeEff3J8CQO5kS4aKLiAxNAgkHnTlvwUb2caH4XXVaFihG6NrPbnkwG/0LinY+2hsISZCk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746048080; c=relaxed/simple; bh=Bb4t4NZhxy2mpayz8DSDhl4k1CNEmUQcxFsZdVoxU/E=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=R0YpZjkNaMuRODYw1qKcds07ao6oXLhEKlyn7SozJqFETTa9EaIchvfzXFdSQjZXauVurHRlx3RwrjoTI8dwJWIwGyMQrDLstgKfHwKx5j6YuObqV7mXvdD4J3GuWWoImENeLuvdPJSUOkwWB8BNH39SHIecCPkaNxUYnUhbLDg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=MJqCpRpB; arc=none smtp.client-ip=192.198.163.8 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="MJqCpRpB" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1746048079; x=1777584079; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Bb4t4NZhxy2mpayz8DSDhl4k1CNEmUQcxFsZdVoxU/E=; b=MJqCpRpB6Gk/zWGDKMy54H4LjIi1wFPCuAVz3jHjICTtNWI1fjOQ6DyZ bLqG71YATQmDge5zbWIm5gTFzcffavkiFXrWmQGQxRy8Oq5orzsNSoxMO rsRLOGTfNwELhw56Sk1Wk7Pp+ac3/Phat6EB2UNCmEkH2GN/NimVX0Rhe aBK6t+1WCWVXXRkpqTLcUUYmD8KdKIdIzelzuU584/3pbsbCWawyLpnxH WN3C8/qW+XAt3u6ee52FY1xkQJwhsUwmkGHNOHGlgARSmRqrvQUvuILnM JJcIfg+NNV9TFZgsa55wNL/cx/n/naO9r4yJhBFxorHVlC0GpgScCkdT5 g==; X-CSE-ConnectionGUID: aQzvIKkAQEuk0y+YxG8d8w== X-CSE-MsgGUID: RVIbj2xdRLmECulayos8rQ== X-IronPort-AV: E=McAfee;i="6700,10204,11419"; a="65257533" X-IronPort-AV: E=Sophos;i="6.15,252,1739865600"; d="scan'208";a="65257533" Received: from orviesa009.jf.intel.com ([10.64.159.149]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Apr 2025 14:21:15 -0700 X-CSE-ConnectionGUID: OA6N/eS3Tb2KahUTSiN6Xw== X-CSE-MsgGUID: uK7VRa/qQMi3vKQTDcdpEg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.15,252,1739865600"; d="scan'208";a="133972271" Received: from agladkov-desk.ger.corp.intel.com (HELO debox1-desk4.lan) ([10.125.110.57]) by orviesa009-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Apr 2025 14:21:15 -0700 From: "David E. Box" To: linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org, david.e.box@linux.intel.com, srinivas.pandruvada@linux.intel.com, andriy.shevchenko@linux.intel.com, ilpo.jarvinen@linux.intel.com, tony.luck@intel.com, xi.pardee@linux.intel.com Cc: hdegoede@redhat.com Subject: [PATCH 02/15] platform/x86/intel/vsec: Add private data for per-device data Date: Wed, 30 Apr 2025 14:20:51 -0700 Message-ID: <20250430212106.369208-3-david.e.box@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250430212106.369208-1-david.e.box@linux.intel.com> References: <20250430212106.369208-1-david.e.box@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Introduce a new private structure, struct vsec_priv, to hold a pointer to the platform-specific information. Although the driver didn=E2=80=99t previ= ously require this per-device data, adding it now lays the groundwork for upcoming patches that will manage such data. No functional changes intended. Signed-off-by: David E. Box Tested-by: Tony Luck --- drivers/platform/x86/intel/vsec.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/platform/x86/intel/vsec.c b/drivers/platform/x86/intel= /vsec.c index 055ca9f48fb4..59fb6568a855 100644 --- a/drivers/platform/x86/intel/vsec.c +++ b/drivers/platform/x86/intel/vsec.c @@ -32,6 +32,10 @@ static DEFINE_IDA(intel_vsec_ida); static DEFINE_IDA(intel_vsec_sdsi_ida); static DEFINE_XARRAY_ALLOC(auxdev_array); =20 +struct vsec_priv { + struct intel_vsec_platform_info *info; +}; + static const char *intel_vsec_name(enum intel_vsec_id id) { switch (id) { @@ -348,6 +352,7 @@ EXPORT_SYMBOL_NS_GPL(intel_vsec_register, "INTEL_VSEC"); static int intel_vsec_pci_probe(struct pci_dev *pdev, const struct pci_dev= ice_id *id) { struct intel_vsec_platform_info *info; + struct vsec_priv *priv; bool have_devices =3D false; int ret; =20 @@ -360,6 +365,13 @@ static int intel_vsec_pci_probe(struct pci_dev *pdev, = const struct pci_device_id if (!info) return -EINVAL; =20 + priv =3D devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + priv->info =3D info; + pci_set_drvdata(pdev, priv); + if (intel_vsec_walk_dvsec(pdev, info)) have_devices =3D true; =20 --=20 2.43.0 From nobody Sat Feb 7 18:43:37 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B4F27299506; Wed, 30 Apr 2025 21:21:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.8 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746048081; cv=none; b=YpiyNu5m8KNl7UZCYJ4UsVhzI9dKkInK3WunBjHLZIw2BMQ8EjEVXUto5LKx99O8ng1fsT4/BRr7PSGg2VlGStIJCoUjEH7Y0qNbGF17q14tSthFvSiOeFL/srgz65h0TM2pykD353lRba2IwmhwrnllaPJe2IfpGYiTZ+noFR4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746048081; c=relaxed/simple; bh=YKlUt4V0D51gsfSfgDQX0NK2LDnnc+H+McaVVJ99AVw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=cKlWnjfVgyGBjQGBg1zTH/fX6+MqLPK43eLfCi2mTh77kbsncVDOZLuqtpxGyAScc2+4OdJ0cTdRufjXtmqodmGsBWZVVx6L0uU3palgkMvptD7t+miQ9ZlqpuMl4k+esZ2sG0kjU+8AX8jq0IIYNuSCGFAzBWFQoAciZALIuMM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=UhXfMA8R; arc=none smtp.client-ip=192.198.163.8 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="UhXfMA8R" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1746048079; x=1777584079; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=YKlUt4V0D51gsfSfgDQX0NK2LDnnc+H+McaVVJ99AVw=; b=UhXfMA8RbupNVP8htfGsaBlCBiMHQkmwQrLhFlhcW/v1mW4LZ2tNrwBp yUXD1+y7sOGjySmFlivTHJSJ6s7JzGpLMk0Bv5ZUENyNwWhqSXGIcS8sV Avb7070j8mMwq6Q/YpaUz0roqm9MQX+lEBLgKwRjwyNDAmh2G+ffpz98h 3ddqZ4mnjTiyh9iDdx1RO0DksTe5heaoTjpWZNk5HbOVDSrWni4JO/XGZ Z1BAR4NujtGx1z/KkyL1WEBcPELZTURFzLcge72yYPQZa9nWU4vVr36Vh qm1/+RFFNQ9UvOcfsA6lOEETzyw6abHmHvoT7nvxTLkNNIrvd3v9F0/Ts w==; X-CSE-ConnectionGUID: pVTIkRLhTGiCCywRdtr7dw== X-CSE-MsgGUID: g+4vyS6ARISqmE47nIVKDw== X-IronPort-AV: E=McAfee;i="6700,10204,11419"; a="65257535" X-IronPort-AV: E=Sophos;i="6.15,252,1739865600"; d="scan'208";a="65257535" Received: from orviesa009.jf.intel.com ([10.64.159.149]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Apr 2025 14:21:15 -0700 X-CSE-ConnectionGUID: mRII4pAqQHK+nJU7AGV+xw== X-CSE-MsgGUID: caMQxxOjQkWqc734ToBPxQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.15,252,1739865600"; d="scan'208";a="133972274" Received: from agladkov-desk.ger.corp.intel.com (HELO debox1-desk4.lan) ([10.125.110.57]) by orviesa009-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Apr 2025 14:21:15 -0700 From: "David E. Box" To: linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org, david.e.box@linux.intel.com, srinivas.pandruvada@linux.intel.com, andriy.shevchenko@linux.intel.com, ilpo.jarvinen@linux.intel.com, tony.luck@intel.com, xi.pardee@linux.intel.com Cc: hdegoede@redhat.com Subject: [PATCH 03/15] platform/x86/intel/vsec: Create wrapper to walk PCI config space Date: Wed, 30 Apr 2025 14:20:52 -0700 Message-ID: <20250430212106.369208-4-david.e.box@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250430212106.369208-1-david.e.box@linux.intel.com> References: <20250430212106.369208-1-david.e.box@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Combine three PCI config space walkers =E2=80=94 intel_vsec_walk_dvsec(), intel_vsec_walk_vsec(), and intel_vsec_walk_header() =E2=80=94 into a new w= rapper function, intel_vsec_feature_walk(). This refactoring simplifies the probe logic and lays the groundwork for future patches that will loop over these calls. No functional changes. Signed-off-by: David E. Box Tested-by: Tony Luck --- drivers/platform/x86/intel/vsec.c | 31 ++++++++++++++++++++++--------- 1 file changed, 22 insertions(+), 9 deletions(-) diff --git a/drivers/platform/x86/intel/vsec.c b/drivers/platform/x86/intel= /vsec.c index 59fb6568a855..f01651f498ca 100644 --- a/drivers/platform/x86/intel/vsec.c +++ b/drivers/platform/x86/intel/vsec.c @@ -349,6 +349,27 @@ int intel_vsec_register(struct pci_dev *pdev, } EXPORT_SYMBOL_NS_GPL(intel_vsec_register, "INTEL_VSEC"); =20 +static void intel_vsec_feature_walk(struct pci_dev *pdev, bool *have_devic= es, + struct intel_vsec_platform_info *info) +{ + /* + * Both DVSEC and VSEC capabilities can exist on the same device, + * so both intel_vsec_walk_dvsec() and intel_vsec_walk_vsec() must be + * called independently. Additionally, intel_vsec_walk_header() is + * needed for devices that do not have VSEC/DVSEC but provide the + * information via device_data. + */ + if (intel_vsec_walk_dvsec(pdev, info)) + *have_devices =3D true; + + if (intel_vsec_walk_vsec(pdev, info)) + *have_devices =3D true; + + if (info && (info->quirks & VSEC_QUIRK_NO_DVSEC) && + intel_vsec_walk_header(pdev, info)) + *have_devices =3D true; +} + static int intel_vsec_pci_probe(struct pci_dev *pdev, const struct pci_dev= ice_id *id) { struct intel_vsec_platform_info *info; @@ -372,15 +393,7 @@ static int intel_vsec_pci_probe(struct pci_dev *pdev, = const struct pci_device_id priv->info =3D info; pci_set_drvdata(pdev, priv); =20 - if (intel_vsec_walk_dvsec(pdev, info)) - have_devices =3D true; - - if (intel_vsec_walk_vsec(pdev, info)) - have_devices =3D true; - - if (info && (info->quirks & VSEC_QUIRK_NO_DVSEC) && - intel_vsec_walk_header(pdev, info)) - have_devices =3D true; + intel_vsec_feature_walk(pdev, &have_devices, info); =20 if (!have_devices) return -ENODEV; --=20 2.43.0 From nobody Sat Feb 7 18:43:37 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C0FBF299508; Wed, 30 Apr 2025 21:21:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.8 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746048080; cv=none; b=bxpzw5SyGBBLag1SVsXnWh7MxxinN4hR3DWsG6SfVQsl7ifXhL/i1NZ6sv5hipHxM3mSwnN6jEdemAjn6cvmdTaPZyWI8HbVdUkfpKW9umcPezVWep5MS80iIqVEZSGrXGpVUdBIibi1CbzbvMGpj+PkYY6H/O3Q6zeQ/3tvbYM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746048080; c=relaxed/simple; bh=O/ffrRkZfGAa8NXehArzvtm64EJeuW4/i9o72KLq2SY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=vGIeVYamnNvK6QaeC412so+4p35N0N/EpHkM/8wRk7CBirUpEPV+hL/02m+SBBIEgx9nuJ8TmnZWDLWZfmNmHhJmZr9Dnv1netwm/Y42bO3l1kLBh6HT9HDwabjmNHmhk8D0Xl0p1Bbt4uMLUgDc0RfFuIFZdxhQ+afSIBZ2wHI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=gTCPkUQq; arc=none smtp.client-ip=192.198.163.8 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="gTCPkUQq" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1746048079; x=1777584079; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=O/ffrRkZfGAa8NXehArzvtm64EJeuW4/i9o72KLq2SY=; b=gTCPkUQqSzFyZP/mZCIZJAs20Iro4atRRmWDL+Ev8x0IQO2E2isyeNxb FR6QabYsSk/9LuPG6kx1Ttv/plFDL3spUHSjaYji6FWRj0oQexVHgIJk7 DhhciYl3gbM6ZalfoLlWBg8IBTbb9nNoI0iupCOOS++Ck/JT4JZMG8o7W VFHNtTN34ekBNXJH3vswtKPQNL9nacRh8RnWzA0MHSBAaEhWC7irBThZm jau/ZWAuqAeYDxhSd+aJ54t5raEAoQqW0sfWkbA9QArtqD10AKKgj3jJh BLForrTVnlsMu6LjfuOhkhWGXDOmfKs3EkH1ak3CD7BExddau0gTnf1t+ A==; X-CSE-ConnectionGUID: TO3kQRLbRyqFMhXhF8/VHg== X-CSE-MsgGUID: /qKLeXQLSdqmtqGzmVgDug== X-IronPort-AV: E=McAfee;i="6700,10204,11419"; a="65257537" X-IronPort-AV: E=Sophos;i="6.15,252,1739865600"; d="scan'208";a="65257537" Received: from orviesa009.jf.intel.com ([10.64.159.149]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Apr 2025 14:21:15 -0700 X-CSE-ConnectionGUID: rkpdKpLASQaU1qxzH5VCsw== X-CSE-MsgGUID: ulNrzyg1RUihN2GaQmr8BQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.15,252,1739865600"; d="scan'208";a="133972278" Received: from agladkov-desk.ger.corp.intel.com (HELO debox1-desk4.lan) ([10.125.110.57]) by orviesa009-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Apr 2025 14:21:15 -0700 From: "David E. Box" To: linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org, david.e.box@linux.intel.com, srinivas.pandruvada@linux.intel.com, andriy.shevchenko@linux.intel.com, ilpo.jarvinen@linux.intel.com, tony.luck@intel.com, xi.pardee@linux.intel.com Cc: hdegoede@redhat.com Subject: [PATCH 04/15] platform/x86/intel/vsec: Add device links to enforce dependencies Date: Wed, 30 Apr 2025 14:20:53 -0700 Message-ID: <20250430212106.369208-5-david.e.box@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250430212106.369208-1-david.e.box@linux.intel.com> References: <20250430212106.369208-1-david.e.box@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" New Intel VSEC features will have dependencies on other features, requiring certain supplier drivers to be probed before their consumers. To enforce this dependency ordering, introduce device links using device_link_add(), ensuring that suppliers are fully registered before consumers are probed. - Add device link tracking by storing supplier devices and tracking their state. - Implement intel_vsec_link_devices() to establish links between suppliers and consumers based on feature dependencies. - Add get_consumer_dependencies() to retrieve supplier-consumer relationships. - Modify feature registration logic: * Consumers now check that all required suppliers are registered before being initialized. * suppliers_ready() verifies that all required supplier devices are available. - Prevent potential null consumer name issue in sysfs: - Use dev_set_name() when creating auxiliary devices to ensure a unique, non-null consumer name. - Update intel_vsec_pci_probe() to loop up to the number of possible features or when all devices are registered, whichever comes first. - Introduce VSEC_CAP_UNUSED to prevent sub-features (registered via exported APIs) from being mistakenly linked. Signed-off-by: David E. Box Tested-by: Tony Luck --- drivers/platform/x86/intel/vsec.c | 214 +++++++++++++++++++++++++++++- include/linux/intel_vsec.h | 28 +++- 2 files changed, 230 insertions(+), 12 deletions(-) diff --git a/drivers/platform/x86/intel/vsec.c b/drivers/platform/x86/intel= /vsec.c index f01651f498ca..8700ed7656df 100644 --- a/drivers/platform/x86/intel/vsec.c +++ b/drivers/platform/x86/intel/vsec.c @@ -15,9 +15,11 @@ =20 #include #include +#include #include #include #include +#include #include #include #include @@ -32,8 +34,17 @@ static DEFINE_IDA(intel_vsec_ida); static DEFINE_IDA(intel_vsec_sdsi_ida); static DEFINE_XARRAY_ALLOC(auxdev_array); =20 +enum vsec_device_state { + STATE_NOT_FOUND, + STATE_REGISTERED, + STATE_SKIP, +}; + struct vsec_priv { struct intel_vsec_platform_info *info; + struct device *suppliers[VSEC_FEATURE_COUNT]; + enum vsec_device_state state[VSEC_FEATURE_COUNT]; + unsigned long found_caps; }; =20 static const char *intel_vsec_name(enum intel_vsec_id id) @@ -95,6 +106,72 @@ static void intel_vsec_dev_release(struct device *dev) kfree(intel_vsec_dev); } =20 +static const struct vsec_feature_dependency * +get_consumer_dependencies(struct vsec_priv *priv, int cap_id) +{ + const struct vsec_feature_dependency *deps =3D priv->info->deps; + int consumer_id =3D priv->info->num_deps; + + if (!deps) + return NULL; + + while (consumer_id--) + if (deps[consumer_id].feature =3D=3D BIT(cap_id)) + break; + + if (consumer_id < 0) + return NULL; + + return &deps[consumer_id]; +} + +/* + * Although pci_device_id table is available in the pdev, this prototype is + * necessary because the code using it can be called by an exported API th= at + * might pass a different pdev. + */ +static const struct pci_device_id intel_vsec_pci_ids[]; + +static int intel_vsec_link_devices(struct pci_dev *pdev, struct device *de= v, + int consumer_id) +{ + const struct vsec_feature_dependency *deps; + enum vsec_device_state *state; + struct device **suppliers; + struct vsec_priv *priv; + int supplier_id; + + if (!consumer_id) + return 0; + + if (!pci_match_id(intel_vsec_pci_ids, pdev)) + return 0; + + priv =3D pci_get_drvdata(pdev); + state =3D priv->state; + suppliers =3D priv->suppliers; + + priv->suppliers[consumer_id] =3D dev; + + deps =3D get_consumer_dependencies(priv, consumer_id); + if (!deps) + return 0; + + for_each_set_bit(supplier_id, &deps->supplier_bitmap, VSEC_FEATURE_COUNT)= { + if (state[supplier_id] !=3D STATE_REGISTERED) + continue; + + if (!suppliers[supplier_id]) { + dev_err(dev, "Bad supplier list\n"); + return -EINVAL; + } + + device_link_add(dev, suppliers[supplier_id], DL_FLAG_AUTOPROBE_CONSUMER); + } + + return 0; +} + int intel_vsec_add_aux(struct pci_dev *pdev, struct device *parent, struct intel_vsec_device *intel_vsec_dev, const char *name) @@ -132,6 +209,25 @@ int intel_vsec_add_aux(struct pci_dev *pdev, struct de= vice *parent, return ret; } =20 + /* + * Assign a name now to ensure that the device link doesn't contain + * a null string for the consumer name. This is a problem when a supplier + * supplys more than one consumer and can lead to a duplicate name error + * when the link is created in sysfs. + */ + ret =3D dev_set_name(&auxdev->dev, "%s.%s.%d", KBUILD_MODNAME, auxdev->na= me, + auxdev->id); + if (ret) { + auxiliary_device_uninit(auxdev); + return ret; + } + + ret =3D intel_vsec_link_devices(pdev, &auxdev->dev, intel_vsec_dev->cap_i= d); + if (ret) { + auxiliary_device_uninit(auxdev); + return ret; + } + ret =3D auxiliary_device_add(auxdev); if (ret < 0) { auxiliary_device_uninit(auxdev); @@ -144,7 +240,8 @@ int intel_vsec_add_aux(struct pci_dev *pdev, struct dev= ice *parent, EXPORT_SYMBOL_NS_GPL(intel_vsec_add_aux, "INTEL_VSEC"); =20 static int intel_vsec_add_dev(struct pci_dev *pdev, struct intel_vsec_head= er *header, - struct intel_vsec_platform_info *info) + struct intel_vsec_platform_info *info, + unsigned long cap_id) { struct intel_vsec_device __free(kfree) *intel_vsec_dev =3D NULL; struct resource __free(kfree) *res =3D NULL; @@ -211,6 +308,7 @@ static int intel_vsec_add_dev(struct pci_dev *pdev, str= uct intel_vsec_header *he intel_vsec_dev->quirks =3D info->quirks; intel_vsec_dev->base_addr =3D info->base_addr; intel_vsec_dev->priv_data =3D info->priv_data; + intel_vsec_dev->cap_id =3D cap_id; =20 if (header->id =3D=3D VSEC_ID_SDSI) intel_vsec_dev->ida =3D &intel_vsec_sdsi_ida; @@ -219,12 +317,108 @@ static int intel_vsec_add_dev(struct pci_dev *pdev, = struct intel_vsec_header *he =20 /* * Pass the ownership of intel_vsec_dev and resource within it to - * intel_vsec_add_aux() + * intel_vsec_add_aux(). */ return intel_vsec_add_aux(pdev, parent, no_free_ptr(intel_vsec_dev), intel_vsec_name(header->id)); } =20 +static bool suppliers_ready(struct vsec_priv *priv, + const struct vsec_feature_dependency *consumer_deps, + int cap_id) +{ + enum vsec_device_state *state =3D priv->state; + int supplier_id; + + if (consumer_deps->feature !=3D BIT(cap_id)) + return false; /* Should not happen */ + + /* + * Find all features that are suppliers and check their state. + * Only suppliers that have been successfully registered will be linked. + */ + for_each_set_bit(supplier_id, &consumer_deps->supplier_bitmap, VSEC_FEATU= RE_COUNT) { + if (state[supplier_id] =3D=3D STATE_SKIP) + continue; + + /* If any supplier is not yet found, return immediately */ + if (state[supplier_id] =3D=3D STATE_NOT_FOUND) + return false; + } + + /* + * If we get here, all suppliers have been found and the consumer + * is ready to be registered. + */ + return true; +} + +static int get_cap_id(u32 header_id, unsigned long *cap_id) +{ + switch (header_id) { + case VSEC_ID_TELEMETRY: + *cap_id =3D ilog2(VSEC_CAP_TELEMETRY); + break; + case VSEC_ID_WATCHER: + *cap_id =3D ilog2(VSEC_CAP_WATCHER); + break; + case VSEC_ID_CRASHLOG: + *cap_id =3D ilog2(VSEC_CAP_CRASHLOG); + break; + case VSEC_ID_SDSI: + *cap_id =3D ilog2(VSEC_CAP_SDSI); + break; + case VSEC_ID_TPMI: + *cap_id =3D ilog2(VSEC_CAP_TPMI); + break; + default: + return -EINVAL; + } + + return 0; +} + +static int intel_vsec_register_device(struct pci_dev *pdev, + struct intel_vsec_header *header, + struct intel_vsec_platform_info *info) +{ + const struct vsec_feature_dependency *consumer_deps; + struct vsec_priv *priv; + unsigned long cap_id; + int ret; + + ret =3D get_cap_id(header->id, &cap_id); + if (ret) + return ret; + + /* + * Only track dependencies for devices probed by the VSEC driver. + * For others using the exported APIs, add the device directly. + */ + if (!pci_match_id(intel_vsec_pci_ids, pdev)) + return intel_vsec_add_dev(pdev, header, info, cap_id); + + priv =3D pci_get_drvdata(pdev); + if (priv->state[cap_id] =3D=3D STATE_REGISTERED || + priv->state[cap_id] =3D=3D STATE_SKIP) + return -EEXIST; + + priv->found_caps |=3D BIT(cap_id); + + consumer_deps =3D get_consumer_dependencies(priv, cap_id); + if (!consumer_deps || suppliers_ready(priv, consumer_deps, cap_id)) { + ret =3D intel_vsec_add_dev(pdev, header, info, cap_id); + if (ret) + priv->state[cap_id] =3D STATE_SKIP; + else + priv->state[cap_id] =3D STATE_REGISTERED; + + return ret; + } + + return -EAGAIN; +} + static bool intel_vsec_walk_header(struct pci_dev *pdev, struct intel_vsec_platform_info *info) { @@ -233,7 +427,7 @@ static bool intel_vsec_walk_header(struct pci_dev *pdev, int ret; =20 for ( ; *header; header++) { - ret =3D intel_vsec_add_dev(pdev, *header, info); + ret =3D intel_vsec_register_device(pdev, *header, info); if (!ret) have_devices =3D true; } @@ -281,7 +475,7 @@ static bool intel_vsec_walk_dvsec(struct pci_dev *pdev, pci_read_config_dword(pdev, pos + PCI_DVSEC_HEADER2, &hdr); header.id =3D PCI_DVSEC_HEADER2_ID(hdr); =20 - ret =3D intel_vsec_add_dev(pdev, &header, info); + ret =3D intel_vsec_register_device(pdev, &header, info); if (ret) continue; =20 @@ -326,7 +520,7 @@ static bool intel_vsec_walk_vsec(struct pci_dev *pdev, header.tbir =3D INTEL_DVSEC_TABLE_BAR(table); header.offset =3D INTEL_DVSEC_TABLE_OFFSET(table); =20 - ret =3D intel_vsec_add_dev(pdev, &header, info); + ret =3D intel_vsec_register_device(pdev, &header, info); if (ret) continue; =20 @@ -375,7 +569,7 @@ static int intel_vsec_pci_probe(struct pci_dev *pdev, c= onst struct pci_device_id struct intel_vsec_platform_info *info; struct vsec_priv *priv; bool have_devices =3D false; - int ret; + int num_caps, ret; =20 ret =3D pcim_enable_device(pdev); if (ret) @@ -393,7 +587,13 @@ static int intel_vsec_pci_probe(struct pci_dev *pdev, = const struct pci_device_id priv->info =3D info; pci_set_drvdata(pdev, priv); =20 - intel_vsec_feature_walk(pdev, &have_devices, info); + num_caps =3D hweight_long(info->caps); + while (num_caps--) { + intel_vsec_feature_walk(pdev, &have_devices, info); + + if (priv->found_caps =3D=3D priv->info->caps) + break; + } =20 if (!have_devices) return -ENODEV; diff --git a/include/linux/intel_vsec.h b/include/linux/intel_vsec.h index bc95821f1bfb..71067afaca99 100644 --- a/include/linux/intel_vsec.h +++ b/include/linux/intel_vsec.h @@ -5,11 +5,18 @@ #include #include =20 -#define VSEC_CAP_TELEMETRY BIT(0) -#define VSEC_CAP_WATCHER BIT(1) -#define VSEC_CAP_CRASHLOG BIT(2) -#define VSEC_CAP_SDSI BIT(3) -#define VSEC_CAP_TPMI BIT(4) +/* + * VSEC_CAP_UNUSED is reserved. It exists to prevent zero initialized + * intel_vsec devices from being automatically set to a known + * capability with ID 0 + */ +#define VSEC_CAP_UNUSED BIT(0) +#define VSEC_CAP_TELEMETRY BIT(1) +#define VSEC_CAP_WATCHER BIT(2) +#define VSEC_CAP_CRASHLOG BIT(3) +#define VSEC_CAP_SDSI BIT(4) +#define VSEC_CAP_TPMI BIT(5) +#define VSEC_FEATURE_COUNT 6 =20 /* Intel DVSEC offsets */ #define INTEL_DVSEC_ENTRIES 0xA @@ -81,22 +88,31 @@ struct pmt_callbacks { int (*read_telem)(struct pci_dev *pdev, u32 guid, u64 *data, loff_t off, = u32 count); }; =20 +struct vsec_feature_dependency { + unsigned long feature; + unsigned long supplier_bitmap; +}; + /** * struct intel_vsec_platform_info - Platform specific data * @parent: parent device in the auxbus chain * @headers: list of headers to define the PMT client devices to create + * @deps: array of feature dependencies * @priv_data: private data, usable by parent devices, currently a callback * @caps: bitmask of PMT capabilities for the given headers * @quirks: bitmask of VSEC device quirks * @base_addr: allow a base address to be specified (rather than derived) + * @num_deps: Count feature dependencies */ struct intel_vsec_platform_info { struct device *parent; struct intel_vsec_header **headers; + const struct vsec_feature_dependency *deps; void *priv_data; unsigned long caps; unsigned long quirks; u64 base_addr; + int num_deps; }; =20 /** @@ -110,6 +126,7 @@ struct intel_vsec_platform_info { * @priv_data: any private data needed * @quirks: specified quirks * @base_addr: base address of entries (if specified) + * @cap_id: the enumerated id of the vsec feature */ struct intel_vsec_device { struct auxiliary_device auxdev; @@ -122,6 +139,7 @@ struct intel_vsec_device { size_t priv_data_size; unsigned long quirks; u64 base_addr; + unsigned long cap_id; }; =20 int intel_vsec_add_aux(struct pci_dev *pdev, struct device *parent, --=20 2.43.0 From nobody Sat Feb 7 18:43:37 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 853232C2583; Wed, 30 Apr 2025 21:21:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.8 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746048082; cv=none; b=Ckfix3Ls4KwYPDw3SwyJ+K9vH6fPtVFZSaXLJn4vPks4JJPZ4fddDLajAw7bg7K6hkyc5ZBk/eemjZp+OjoM/0tGJhjxHDjy+YsRuKCGywYjm/sz85Y8SLpj5rqbM/nQHXJ16hPnIGXD4xbG//Who38pcDnVKnnPcNbj53bDfjw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746048082; c=relaxed/simple; bh=CgqvTLqMp5Pc9P/negzRDW0LhWMLF/K0jS1thugiIIA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=IJLJmloNSqaebitVNbyPN8/LVi9pxrgspcXEGeQF3aHJ6yRQZk1KCm/WOm/EVVjE/Mjh5mbmzONpCE5gy5ZJ1ee1WsrA048RPOiVZqHsDloSdCFR4Xuz+tp8fdBiIpmXYtIcjy9GUNuVW1a+DM6y/EnMjh8aMnhNSOpTyiUEG4A= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=NGpHE5xJ; arc=none smtp.client-ip=192.198.163.8 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="NGpHE5xJ" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1746048081; x=1777584081; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=CgqvTLqMp5Pc9P/negzRDW0LhWMLF/K0jS1thugiIIA=; b=NGpHE5xJIrEHOKmx8KfJXG1ud4qfHKc0jXuc9+dr/4cbL2QQOmnV24kz c0OlWkNtujldg6tZjslqr7lHuInE+Yx0eQbutRwkSpVTQjTaQWHjASore bl5JjHgLo0dEp+JG6RuGeDJwjOg85yE6QZmAKYRakRWPaj0EtGa2cW+I5 V5ZgHT7biWZGM53xo2P7Iqtw5bfoiLQJt2U5o28ByGnzTWrCuMSBpyjKx L+OLnRQpAlXWj/ufh9J9qivf76BAgEaBXlpzxa/jFJ/aXb4pBDbQ2IXlW ePobA+iFaXkckCbpf3/8HguuYPnbT9FlNGHpKGW1TcjQyOsQN0O9w4Cji w==; X-CSE-ConnectionGUID: F+zSbz66R8axLbu0dfzGSA== X-CSE-MsgGUID: JGzv2XPATcW1IPG03L9cPA== X-IronPort-AV: E=McAfee;i="6700,10204,11419"; a="65257539" X-IronPort-AV: E=Sophos;i="6.15,252,1739865600"; d="scan'208";a="65257539" Received: from orviesa009.jf.intel.com ([10.64.159.149]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Apr 2025 14:21:16 -0700 X-CSE-ConnectionGUID: vG1AsXeZQRue+JkjS21soQ== X-CSE-MsgGUID: V+rrnTEjSEGRKja3LSTYbQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.15,252,1739865600"; d="scan'208";a="133972282" Received: from agladkov-desk.ger.corp.intel.com (HELO debox1-desk4.lan) ([10.125.110.57]) by orviesa009-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Apr 2025 14:21:16 -0700 From: "David E. Box" To: linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org, david.e.box@linux.intel.com, srinivas.pandruvada@linux.intel.com, andriy.shevchenko@linux.intel.com, ilpo.jarvinen@linux.intel.com, tony.luck@intel.com, xi.pardee@linux.intel.com Cc: hdegoede@redhat.com Subject: [PATCH 05/15] platform/x86/intel/vsec: Skip absent features during initialization Date: Wed, 30 Apr 2025 14:20:54 -0700 Message-ID: <20250430212106.369208-6-david.e.box@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250430212106.369208-1-david.e.box@linux.intel.com> References: <20250430212106.369208-1-david.e.box@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Some VSEC features depend on the presence of supplier features that may not always be present. To prevent unnecessary retries and device linking during initialization, introduce logic to skip attempts to link consumers to missing suppliers. Signed-off-by: David E. Box Tested-by: Tony Luck --- drivers/platform/x86/intel/vsec.c | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/drivers/platform/x86/intel/vsec.c b/drivers/platform/x86/intel= /vsec.c index 8700ed7656df..dc3f36afcd09 100644 --- a/drivers/platform/x86/intel/vsec.c +++ b/drivers/platform/x86/intel/vsec.c @@ -564,12 +564,31 @@ static void intel_vsec_feature_walk(struct pci_dev *p= dev, bool *have_devices, *have_devices =3D true; } =20 +static void intel_vsec_skip_missing_dependencies(struct pci_dev *pdev) +{ + struct vsec_priv *priv =3D pci_get_drvdata(pdev); + const struct vsec_feature_dependency *deps =3D priv->info->deps; + int consumer_id =3D priv->info->num_deps; + + while (consumer_id--) { + int supplier_id; + + deps =3D &priv->info->deps[consumer_id]; + + for_each_set_bit(supplier_id, &deps->supplier_bitmap, VSEC_FEATURE_COUNT= ) { + if (!(BIT(supplier_id) & priv->found_caps)) + priv->state[supplier_id] =3D STATE_SKIP; + } + } +} + static int intel_vsec_pci_probe(struct pci_dev *pdev, const struct pci_dev= ice_id *id) { struct intel_vsec_platform_info *info; struct vsec_priv *priv; bool have_devices =3D false; int num_caps, ret; + int run_once =3D 0; =20 ret =3D pcim_enable_device(pdev); if (ret) @@ -593,6 +612,11 @@ static int intel_vsec_pci_probe(struct pci_dev *pdev, = const struct pci_device_id =20 if (priv->found_caps =3D=3D priv->info->caps) break; + + if (!run_once) { + intel_vsec_skip_missing_dependencies(pdev); + run_once =3D 1; + } } =20 if (!have_devices) --=20 2.43.0 From nobody Sat Feb 7 18:43:37 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 062182C376A; Wed, 30 Apr 2025 21:21:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.8 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746048082; cv=none; b=gstWSUG+AohnOeugW9T3BECWCycmv/QUdjtCYLIedabFmAExqi8I+FyfQvR4+iTWgxbPdi2RKe+MvWtAk03LSkmsAIL59dJwDvsaRTjbQXF4UnmUrtBS0+IRFDoY0Z2Dd5Bsd8e02eoC4Tt1QrLOTOxep+HEbx6tCINxf/KnEqU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746048082; c=relaxed/simple; bh=Go2nKlOrRArHLeU4r3n6NCmarnBmukAXwr0c20fcGp0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=fpBAdBctZGadrV4QjZgJx9WqNJVcuXaMKLzkRkLk4/pVeIvGj48APxQOPDY/y2WsTTqi6LR5hKcSWLEO0/BQ2exRbumRKyxcPZmoqcPYpt3qQBApkob6pJB8fzdSN3iM1vMtAuibZA3QHJHO8db8WNZm3c/PMugtAGUnE5Uv/4w= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=naSu7kKb; arc=none smtp.client-ip=192.198.163.8 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="naSu7kKb" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1746048081; x=1777584081; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=Go2nKlOrRArHLeU4r3n6NCmarnBmukAXwr0c20fcGp0=; b=naSu7kKbdXHBbRFW4cvX3pG68bCWN5bT1qIpjHdLgIoBOchztRCJMNMQ 8o5jXx/XTxnxIQh7G+c0M5emtYF6il++WxMstCK5+wT+1rlucGYUX6015 lpQr7tRUY4TEjPdUhl/Xf7Vs104FNu6WPFongU5xjD7g1WQr2hhlgAg9p CmyJn9ImU8gG7Vhe8UkCEVEhNnaE6eKTXuAD+QJXK/iwHH6M6oXN/MoOQ 0DYsvOwB1i9XJVt1ibdmZpCsSHInHdkdQWkDrw8nCTdfAIlx75ovi+yTF XJ3YIEODLmP9YGrBVbGGIlr++W//GLezVtn+9ZnQliwwl1Bte/LMxvg97 g==; X-CSE-ConnectionGUID: mujuHREvQVWaWe/igJS2aw== X-CSE-MsgGUID: FhIqWxQYTvqCxhrEIzFfEA== X-IronPort-AV: E=McAfee;i="6700,10204,11419"; a="65257541" X-IronPort-AV: E=Sophos;i="6.15,252,1739865600"; d="scan'208";a="65257541" Received: from orviesa009.jf.intel.com ([10.64.159.149]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Apr 2025 14:21:16 -0700 X-CSE-ConnectionGUID: f8zszJDLTxS8Zr3Xt98ePw== X-CSE-MsgGUID: e8jj/SxTSPeyfMo+3JLlWQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.15,252,1739865600"; d="scan'208";a="133972285" Received: from agladkov-desk.ger.corp.intel.com (HELO debox1-desk4.lan) ([10.125.110.57]) by orviesa009-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Apr 2025 14:21:16 -0700 From: "David E. Box" To: linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org, david.e.box@linux.intel.com, srinivas.pandruvada@linux.intel.com, andriy.shevchenko@linux.intel.com, ilpo.jarvinen@linux.intel.com, tony.luck@intel.com, xi.pardee@linux.intel.com Cc: hdegoede@redhat.com Subject: [PATCH 06/15] platform/x86/intel/vsec: Skip driverless features Date: Wed, 30 Apr 2025 14:20:55 -0700 Message-ID: <20250430212106.369208-7-david.e.box@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250430212106.369208-1-david.e.box@linux.intel.com> References: <20250430212106.369208-1-david.e.box@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" If a feature lacks a corresponding driver and that feature is also a supplier, registering it would be prevent the consumer driver from probing. Introduces logic to skip such features during device registration. Signed-off-by: David E. Box Tested-by: Tony Luck --- drivers/platform/x86/intel/vsec.c | 28 +++++++++++++++++++++++++++- 1 file changed, 27 insertions(+), 1 deletion(-) diff --git a/drivers/platform/x86/intel/vsec.c b/drivers/platform/x86/intel= /vsec.c index dc3f36afcd09..5374abef0b48 100644 --- a/drivers/platform/x86/intel/vsec.c +++ b/drivers/platform/x86/intel/vsec.c @@ -125,6 +125,26 @@ get_consumer_dependencies(struct vsec_priv *priv, int = cap_id) return &deps[consumer_id]; } =20 +static bool vsec_driver_present(int cap_id) +{ + unsigned long bit =3D BIT(cap_id); + + switch (bit) { + case VSEC_CAP_TELEMETRY: + return IS_ENABLED(CONFIG_INTEL_PMT_TELEMETRY); + case VSEC_CAP_WATCHER: + return IS_ENABLED(CONFIG_INTEL_PMT_WATCHER); + case VSEC_CAP_CRASHLOG: + return IS_ENABLED(CONFIG_INTEL_PMT_CRASHLOG); + case VSEC_CAP_SDSI: + return IS_ENABLED(CONFIG_INTEL_SDSI); + case VSEC_CAP_TPMI: + return IS_ENABLED(CONFIG_INTEL_TPMI); + default: + return false; + } +} + /* * Although pci_device_id table is available in the pdev, this prototype is * necessary because the code using it can be called by an exported API th= at @@ -158,7 +178,8 @@ static int intel_vsec_link_devices(struct pci_dev *pdev= , struct device *dev, return 0; =20 for_each_set_bit(supplier_id, &deps->supplier_bitmap, VSEC_FEATURE_COUNT)= { - if (state[supplier_id] !=3D STATE_REGISTERED) + if (state[supplier_id] !=3D STATE_REGISTERED || + !vsec_driver_present(supplier_id)) continue; =20 if (!suppliers[supplier_id]) { @@ -405,6 +426,11 @@ static int intel_vsec_register_device(struct pci_dev *= pdev, =20 priv->found_caps |=3D BIT(cap_id); =20 + if (!vsec_driver_present(cap_id)) { + priv->state[cap_id] =3D STATE_SKIP; + return -ENODEV; + } + consumer_deps =3D get_consumer_dependencies(priv, cap_id); if (!consumer_deps || suppliers_ready(priv, consumer_deps, cap_id)) { ret =3D intel_vsec_add_dev(pdev, header, info, cap_id); --=20 2.43.0 From nobody Sat Feb 7 18:43:37 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B95382D0AAF; Wed, 30 Apr 2025 21:21:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.8 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746048083; cv=none; b=Ip6Sf/B6Auzv0ySzMLJbgUzk+9jmYU3YuE0X/vXB9PRoW9s66rS4gFXrnDzJJmvo4whC6Gyh4Lo7JnZXRxypKpPC2iyhDxVQE0hJ59jPS0a7ocV7ROTbJPNgM15nCBf+th0E3S1rFXRLgq05vz9MZMu9+uMjC36tlDg+42QLTiM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746048083; c=relaxed/simple; bh=lQynjfEUFMsRgZwVQUMWpLz7QknE3Nr/dZm2t33ZTTM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=n7v817WcW8uM0Eul7Y67TDIL82fHEDXAeiKOmFAJPkVJMY4GrzGSOssCEHQyjxS2kc4O83HEJB6pF9qJS47ET4bfYxSsyjoVLt1eU0LXy6rAJFQt/2yL6yPT7IFmZadQAUJVwDewEt31dwmTX6MJRwU72cNA1B28GBKB/Sry+UM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=mgoG/R3Z; arc=none smtp.client-ip=192.198.163.8 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="mgoG/R3Z" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1746048082; x=1777584082; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=lQynjfEUFMsRgZwVQUMWpLz7QknE3Nr/dZm2t33ZTTM=; b=mgoG/R3ZdxY+wtV9A1IBamZwZ9HzdpyMR5iJN0C+kGbVuOnmPrCm8e7U k1UNagWE5qTFUM1hCPqm9nBZztHAZ88+z7rrZiAgQZ0euo7Wr/XuYpGSz /haamcTBSOMLMO/1oWy1mHUDXg8+B5YY3A2+b7Xf8Ajarn9XcQ+nrdspA D/LtY7JCN6A0n+DA46A1DMUTM0+YYp5xQmD+7l68D404vkOM4O989T014 LLNrpxP0+qwal8Nw+ZkPTtdKVHaarGf0Yzab0aYWkbd0+ajIpNbMCjB2C 2zVR4yUfT11m9JLg15WQZUR0a5BePkdCq65dIBVEtEYxO4308DGAljr5+ w==; X-CSE-ConnectionGUID: 39WUMSLcRmylb+9yspYnFA== X-CSE-MsgGUID: yrC0Ev58QVSwUAG1Ic5WTQ== X-IronPort-AV: E=McAfee;i="6700,10204,11419"; a="65257543" X-IronPort-AV: E=Sophos;i="6.15,252,1739865600"; d="scan'208";a="65257543" Received: from orviesa009.jf.intel.com ([10.64.159.149]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Apr 2025 14:21:16 -0700 X-CSE-ConnectionGUID: b5Bb5t8BRGSIzGDrDej2zg== X-CSE-MsgGUID: RguZRgUJRuOqzCXRUXNtzQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.15,252,1739865600"; d="scan'208";a="133972288" Received: from agladkov-desk.ger.corp.intel.com (HELO debox1-desk4.lan) ([10.125.110.57]) by orviesa009-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Apr 2025 14:21:16 -0700 From: "David E. Box" To: linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org, david.e.box@linux.intel.com, srinivas.pandruvada@linux.intel.com, andriy.shevchenko@linux.intel.com, ilpo.jarvinen@linux.intel.com, tony.luck@intel.com, xi.pardee@linux.intel.com Cc: hdegoede@redhat.com Subject: [PATCH 07/15] platform/x86/intel/vsec: Add new Discovery feature Date: Wed, 30 Apr 2025 14:20:56 -0700 Message-ID: <20250430212106.369208-8-david.e.box@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250430212106.369208-1-david.e.box@linux.intel.com> References: <20250430212106.369208-1-david.e.box@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add the PCIe VSEC ID for new Intel Platform Monitoring Technology Capability Discovery feature. Discovery provides detailed information for the various Intel VSEC features. Also make the driver a supplier for TPMI and Telemetry drivers which will use the information. Signed-off-by: David E. Box Tested-by: Tony Luck --- drivers/platform/x86/intel/vsec.c | 26 ++++++++++++++++++++++++-- include/linux/intel_vsec.h | 4 +++- 2 files changed, 27 insertions(+), 3 deletions(-) diff --git a/drivers/platform/x86/intel/vsec.c b/drivers/platform/x86/intel= /vsec.c index 5374abef0b48..e3ec17a53e62 100644 --- a/drivers/platform/x86/intel/vsec.c +++ b/drivers/platform/x86/intel/vsec.c @@ -65,6 +65,9 @@ static const char *intel_vsec_name(enum intel_vsec_id id) case VSEC_ID_TPMI: return "tpmi"; =20 + case VSEC_ID_DISCOVERY: + return "discovery"; + default: return NULL; } @@ -83,6 +86,8 @@ static bool intel_vsec_supported(u16 id, unsigned long ca= ps) return !!(caps & VSEC_CAP_SDSI); case VSEC_ID_TPMI: return !!(caps & VSEC_CAP_TPMI); + case VSEC_ID_DISCOVERY: + return !!(caps & VSEC_CAP_DISCOVERY); default: return false; } @@ -140,6 +145,8 @@ static bool vsec_driver_present(int cap_id) return IS_ENABLED(CONFIG_INTEL_SDSI); case VSEC_CAP_TPMI: return IS_ENABLED(CONFIG_INTEL_TPMI); + case VSEC_CAP_DISCOVERY: + return IS_ENABLED(CONFIG_INTEL_PMT_DISCOVERY); default: return false; } @@ -392,6 +399,9 @@ static int get_cap_id(u32 header_id, unsigned long *cap= _id) case VSEC_ID_TPMI: *cap_id =3D ilog2(VSEC_CAP_TPMI); break; + case VSEC_ID_DISCOVERY: + *cap_id =3D ilog2(VSEC_CAP_DISCOVERY); + break; default: return -EINVAL; } @@ -677,14 +687,26 @@ static const struct intel_vsec_platform_info mtl_info= =3D { .caps =3D VSEC_CAP_TELEMETRY, }; =20 +static const struct vsec_feature_dependency oobmsm_deps[] =3D { + { + .feature =3D VSEC_CAP_TELEMETRY, + .supplier_bitmap =3D VSEC_CAP_DISCOVERY + }, +}; + /* OOBMSM info */ static const struct intel_vsec_platform_info oobmsm_info =3D { - .caps =3D VSEC_CAP_TELEMETRY | VSEC_CAP_SDSI | VSEC_CAP_TPMI, + .caps =3D VSEC_CAP_TELEMETRY | VSEC_CAP_SDSI | VSEC_CAP_TPMI | + VSEC_CAP_DISCOVERY, + .deps =3D oobmsm_deps, + .num_deps =3D ARRAY_SIZE(oobmsm_deps), }; =20 /* DMR OOBMSM info */ static const struct intel_vsec_platform_info dmr_oobmsm_info =3D { - .caps =3D VSEC_CAP_TELEMETRY | VSEC_CAP_TPMI, + .caps =3D VSEC_CAP_TELEMETRY | VSEC_CAP_TPMI | VSEC_CAP_DISCOVERY, + .deps =3D oobmsm_deps, + .num_deps =3D ARRAY_SIZE(oobmsm_deps), }; =20 /* TGL info */ diff --git a/include/linux/intel_vsec.h b/include/linux/intel_vsec.h index 71067afaca99..a07796d7d43b 100644 --- a/include/linux/intel_vsec.h +++ b/include/linux/intel_vsec.h @@ -16,7 +16,8 @@ #define VSEC_CAP_CRASHLOG BIT(3) #define VSEC_CAP_SDSI BIT(4) #define VSEC_CAP_TPMI BIT(5) -#define VSEC_FEATURE_COUNT 6 +#define VSEC_CAP_DISCOVERY BIT(6) +#define VSEC_FEATURE_COUNT 7 =20 /* Intel DVSEC offsets */ #define INTEL_DVSEC_ENTRIES 0xA @@ -33,6 +34,7 @@ enum intel_vsec_id { VSEC_ID_TELEMETRY =3D 2, VSEC_ID_WATCHER =3D 3, VSEC_ID_CRASHLOG =3D 4, + VSEC_ID_DISCOVERY =3D 12, VSEC_ID_SDSI =3D 65, VSEC_ID_TPMI =3D 66, }; --=20 2.43.0 From nobody Sat Feb 7 18:43:37 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5A16A188A0E; Wed, 30 Apr 2025 21:21:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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a="65257545" X-IronPort-AV: E=Sophos;i="6.15,252,1739865600"; d="scan'208";a="65257545" Received: from orviesa009.jf.intel.com ([10.64.159.149]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Apr 2025 14:21:16 -0700 X-CSE-ConnectionGUID: q5ncECchTMK6P19t86KgcQ== X-CSE-MsgGUID: tBCxXIXaSV6WQLJH2v4GVg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.15,252,1739865600"; d="scan'208";a="133972292" Received: from agladkov-desk.ger.corp.intel.com (HELO debox1-desk4.lan) ([10.125.110.57]) by orviesa009-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Apr 2025 14:21:16 -0700 From: "David E. Box" To: linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org, david.e.box@linux.intel.com, srinivas.pandruvada@linux.intel.com, andriy.shevchenko@linux.intel.com, ilpo.jarvinen@linux.intel.com, tony.luck@intel.com, xi.pardee@linux.intel.com Cc: hdegoede@redhat.com Subject: [PATCH 08/15] platform/x86/intel/pmt: Add PMT Discovery driver Date: Wed, 30 Apr 2025 14:20:57 -0700 Message-ID: <20250430212106.369208-9-david.e.box@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250430212106.369208-1-david.e.box@linux.intel.com> References: <20250430212106.369208-1-david.e.box@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" This patch introduces a new driver to enumerate and expose Intel Platform Monitoring Technology (PMT) capabilities via a simple discovery mechanism. The PMT Discovery driver parses hardware-provided discovery tables from Intel Out of Band Management Services Modules (OOBMSM) and extracts feature information for various providers (such as TPMI, Telemetry, Crash Log, etc). This unified interface simplifies the process of determining which manageability and telemetry features are supported by a given platform. This new feature is described in the Intel Platform Monitoring Technology 3.0 specification, section 6.6 Capability. Key changes and additions: New file drivers/platform/x86/intel/pmt/discovery.c: =E2=80=93 Implements the discovery logic to map the discovery resource, r= ead the feature discovery table, and validate feature parameters. New file drivers/platform/x86/intel/pmt/features.c: =E2=80=93 Defines feature names, layouts, and associated capability masks. =E2=80=93 Provides a mapping between raw hardware attributes and sysfs representations for easier integration with user-space tools. New header include/linux/intel_pmt_features.h: =E2=80=93 Declares constants, masks, and feature identifiers used across = the PMT framework. Sysfs integration: =E2=80=93 Feature attributes are exposed under /sys/class/intel_pmt. =E2=80=93 Each device is represented by a subfolder within the intel_pmt = class, named using its DBDF (Domain:Bus:Device.Function), e.g.: features-0000:00:03.1 =E2=80=93 Example directory layout for a device: /sys/class/intel_pmt/features-0000:00:03.1/ =E2=94=9C=E2=94=80=E2=94=80 accelerator_telemetry =E2=94=9C=E2=94=80=E2=94=80 crash_log =E2=94=9C=E2=94=80=E2=94=80 per_core_environment_telemetry =E2=94=9C=E2=94=80=E2=94=80 per_core_performace_telemetry =E2=94=9C=E2=94=80=E2=94=80 per_rmid_energy_telemetry =E2=94=9C=E2=94=80=E2=94=80 per_rmid_perf_telemetry =E2=94=9C=E2=94=80=E2=94=80 tpmi_control =E2=94=9C=E2=94=80=E2=94=80 tracing =E2=94=94=E2=94=80=E2=94=80 uncore_telemetry By exposing PMT feature details through sysfs and integrating with the existing PMT class, this driver paves the way for more streamlined integration of PMT-based manageability and telemetry tools. Link: https://www.intel.com/content/www/us/en/content-details/710389/intel-= platform-monitoring-technology-intel-pmt-external-specification.html Signed-off-by: David E. Box Tested-by: Tony Luck --- drivers/platform/x86/intel/pmt/Kconfig | 12 + drivers/platform/x86/intel/pmt/Makefile | 2 + drivers/platform/x86/intel/pmt/class.c | 35 +- drivers/platform/x86/intel/pmt/class.h | 2 + drivers/platform/x86/intel/pmt/discovery.c | 600 +++++++++++++++++++++ drivers/platform/x86/intel/pmt/features.c | 205 +++++++ include/linux/intel_pmt_features.h | 157 ++++++ 7 files changed, 1011 insertions(+), 2 deletions(-) create mode 100644 drivers/platform/x86/intel/pmt/discovery.c create mode 100644 drivers/platform/x86/intel/pmt/features.c create mode 100644 include/linux/intel_pmt_features.h diff --git a/drivers/platform/x86/intel/pmt/Kconfig b/drivers/platform/x86/= intel/pmt/Kconfig index e916fc966221..0ad91b5112e9 100644 --- a/drivers/platform/x86/intel/pmt/Kconfig +++ b/drivers/platform/x86/intel/pmt/Kconfig @@ -38,3 +38,15 @@ config INTEL_PMT_CRASHLOG =20 To compile this driver as a module, choose M here: the module will be called intel_pmt_crashlog. + +config INTEL_PMT_DISCOVERY + tristate "Intel Platform Monitoring Technology (PMT) Discovery driver" + depends on INTEL_VSEC + select INTEL_PMT_CLASS + help + The Intel Platform Monitoring Technology (PMT) discovery driver provides + access to details about the various PMT features and feature specific + attributes. + + To compile this driver as a module, choose M here: the module + will be called pmt_discovery. diff --git a/drivers/platform/x86/intel/pmt/Makefile b/drivers/platform/x86= /intel/pmt/Makefile index 279e158c7c23..8aed7e1592e4 100644 --- a/drivers/platform/x86/intel/pmt/Makefile +++ b/drivers/platform/x86/intel/pmt/Makefile @@ -10,3 +10,5 @@ obj-$(CONFIG_INTEL_PMT_TELEMETRY) +=3D pmt_telemetry.o pmt_telemetry-y :=3D telemetry.o obj-$(CONFIG_INTEL_PMT_CRASHLOG) +=3D pmt_crashlog.o pmt_crashlog-y :=3D crashlog.o +obj-$(CONFIG_INTEL_PMT_DISCOVERY) +=3D pmt_discovery.o +pmt_discovery-y :=3D discovery.o features.o diff --git a/drivers/platform/x86/intel/pmt/class.c b/drivers/platform/x86/= intel/pmt/class.c index 7233b654bbad..a806a81ece52 100644 --- a/drivers/platform/x86/intel/pmt/class.c +++ b/drivers/platform/x86/intel/pmt/class.c @@ -9,11 +9,13 @@ */ =20 #include +#include #include #include #include #include #include +#include =20 #include "class.h" =20 @@ -166,12 +168,41 @@ static struct attribute *intel_pmt_attrs[] =3D { &dev_attr_offset.attr, NULL }; -ATTRIBUTE_GROUPS(intel_pmt); =20 -static struct class intel_pmt_class =3D { +static umode_t intel_pmt_attr_visible(struct kobject *kobj, + struct attribute *attr, int n) +{ + struct device *dev =3D container_of(kobj, struct device, kobj); + struct auxiliary_device *auxdev =3D to_auxiliary_dev(dev->parent); + struct intel_vsec_device *ivdev =3D auxdev_to_ivdev(auxdev); + + /* + * Place the discovery features folder in /sys/class/intel_pmt, but + * exclude the common attributes as they are not applicable. + */ + if (ivdev->cap_id =3D=3D ilog2(VSEC_CAP_DISCOVERY)) + return 0; + + return attr->mode; +} + +static bool intel_pmt_group_visible(struct kobject *kobj) +{ + return true; +} +DEFINE_SYSFS_GROUP_VISIBLE(intel_pmt); + +static const struct attribute_group intel_pmt_group =3D { + .attrs =3D intel_pmt_attrs, + .is_visible =3D SYSFS_GROUP_VISIBLE(intel_pmt), +}; +__ATTRIBUTE_GROUPS(intel_pmt); + +struct class intel_pmt_class =3D { .name =3D "intel_pmt", .dev_groups =3D intel_pmt_groups, }; +EXPORT_SYMBOL_GPL(intel_pmt_class); =20 static int intel_pmt_populate_entry(struct intel_pmt_entry *entry, struct intel_vsec_device *ivdev, diff --git a/drivers/platform/x86/intel/pmt/class.h b/drivers/platform/x86/= intel/pmt/class.h index b2006d57779d..ba276231ce74 100644 --- a/drivers/platform/x86/intel/pmt/class.h +++ b/drivers/platform/x86/intel/pmt/class.h @@ -20,6 +20,7 @@ #define GET_ADDRESS(v) ((v) & GENMASK(31, 3)) =20 struct pci_dev; +extern struct class intel_pmt_class; =20 struct telem_endpoint { struct pci_dev *pcidev; @@ -48,6 +49,7 @@ struct intel_pmt_entry { unsigned long base_addr; size_t size; u32 guid; + u32 num_rmids; int devid; }; =20 diff --git a/drivers/platform/x86/intel/pmt/discovery.c b/drivers/platform/= x86/intel/pmt/discovery.c new file mode 100644 index 000000000000..8124a5bcbb12 --- /dev/null +++ b/drivers/platform/x86/intel/pmt/discovery.c @@ -0,0 +1,600 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Intel Platform Monitory Technology Discovery driver + * + * Copyright (c) 2025, Intel Corporation. + * All Rights Reserved. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include "class.h" + +#define MAX_FEATURE_VERSION 0 +#define DT_TBIR GENMASK(2, 0) +#define FEAT_ATTR_SIZE(x) ((x) * sizeof(u32)) +#define PMT_GUID_SIZE(x) ((x) * sizeof(u32)) +#define SKIP_FEATURE 1 + +struct feature_discovery_table { + u32 access_type:4; + u32 version:8; + u32 size:16; + u32 reserved:4; + u32 id; + u32 offset; + u32 reserved2; +}; + +/* Common feature table header */ +struct feature_header { + u32 attr_size:8; + u32 num_guids:8; + u32 reserved:16; +}; + +/* Feature attribute fields */ +struct caps { + u32 caps; +}; + +struct command { + u32 max_stream_size:16; + u32 max_command_size:16; +}; + +struct watcher { + u32 reserved:21; + u32 period:11; + struct command command; +}; + +struct rmid { + u32 num_rmids:16; + u32 reserved:16; + struct watcher watcher; +}; + +struct feature_table { + struct feature_header header; + struct caps caps; + union { + struct command command; + struct watcher watcher; + struct rmid rmid; + }; + u32 *guids; +}; + +/* For backreference in struct feature */ +struct pmt_features_priv; + +struct feature { + struct feature_table table; + struct kobject kobj; + struct pmt_features_priv *priv; + struct list_head list; + const struct attribute_group *attr_group; + enum pmt_feature_id id; +}; + +struct pmt_features_priv { + struct device *parent; + struct device *dev; + int count; + u32 mask; + struct feature feature[]; +}; + +static LIST_HEAD(pmt_feature_list); +static DEFINE_MUTEX(feature_list_lock); + +#define to_pmt_feature(x) container_of(x, struct feature, kobj) +static void pmt_feature_release(struct kobject *kobj) +{ +} + +static ssize_t caps_show(struct kobject *kobj, struct kobj_attribute *attr, + char *buf) +{ + struct feature *feature =3D to_pmt_feature(kobj); + struct pmt_cap **pmt_caps; + u32 caps =3D feature->table.caps.caps; + ssize_t ret =3D 0; + + switch (feature->id) { + case FEATURE_PER_CORE_PERF_TELEM: + pmt_caps =3D pmt_caps_pcpt; + break; + case FEATURE_PER_CORE_ENV_TELEM: + pmt_caps =3D pmt_caps_pcet; + break; + case FEATURE_PER_RMID_PERF_TELEM: + pmt_caps =3D pmt_caps_rmid_perf; + break; + case FEATURE_ACCEL_TELEM: + pmt_caps =3D pmt_caps_accel; + break; + case FEATURE_UNCORE_TELEM: + pmt_caps =3D pmt_caps_uncore; + break; + case FEATURE_CRASH_LOG: + pmt_caps =3D pmt_caps_crashlog; + break; + case FEATURE_PETE_LOG: + pmt_caps =3D pmt_caps_pete; + break; + case FEATURE_TPMI_CTRL: + pmt_caps =3D pmt_caps_tpmi; + break; + case FEATURE_TRACING: + pmt_caps =3D pmt_caps_tracing; + break; + case FEATURE_PER_RMID_ENERGY_TELEM: + pmt_caps =3D pmt_caps_rmid_energy; + break; + default: + return -EINVAL; + } + + while (*pmt_caps) { + struct pmt_cap *pmt_cap =3D *pmt_caps; + + while (pmt_cap->name) { + ret +=3D sysfs_emit_at(buf, ret, "%-40s Available: %s\n", pmt_cap->name, + str_yes_no(pmt_cap->mask & caps)); + pmt_cap++; + } + pmt_caps++; + } + + return ret; +} +static struct kobj_attribute caps_attribute =3D __ATTR_RO(caps); + +static struct watcher *get_watcher(struct feature *feature) +{ + switch (feature_layout[feature->id]) { + case LAYOUT_RMID: + return &feature->table.rmid.watcher; + case LAYOUT_WATCHER: + return &feature->table.watcher; + default: + return ERR_PTR(-EINVAL); + } +} + +static struct command *get_command(struct feature *feature) +{ + switch (feature_layout[feature->id]) { + case LAYOUT_RMID: + return &feature->table.rmid.watcher.command; + case LAYOUT_WATCHER: + return &feature->table.watcher.command; + case LAYOUT_COMMAND: + return &feature->table.command; + default: + return ERR_PTR(-EINVAL); + } +} + +static ssize_t num_rmids_show(struct kobject *kobj, + struct kobj_attribute *attr, char *buf) +{ + struct feature *feature =3D to_pmt_feature(kobj); + + return sysfs_emit(buf, "%u\n", feature->table.rmid.num_rmids); +} +static struct kobj_attribute num_rmids_attribute =3D __ATTR_RO(num_rmids); + +static ssize_t min_watcher_period_ms_show(struct kobject *kobj, + struct kobj_attribute *attr, char *buf) +{ + struct feature *feature =3D to_pmt_feature(kobj); + struct watcher *watcher =3D get_watcher(feature); + + if (IS_ERR(watcher)) + return (PTR_ERR(watcher)); + + return sysfs_emit(buf, "%u\n", watcher->period); +} +static struct kobj_attribute min_watcher_period_ms_attribute =3D + __ATTR_RO(min_watcher_period_ms); + +static ssize_t max_stream_size_show(struct kobject *kobj, + struct kobj_attribute *attr, char *buf) +{ + struct feature *feature =3D to_pmt_feature(kobj); + struct command *command =3D get_command(feature); + + if (IS_ERR(command)) + return (PTR_ERR(command)); + + return sysfs_emit(buf, "%u\n", command->max_stream_size); +} +static struct kobj_attribute max_stream_size_attribute =3D + __ATTR_RO(max_stream_size); + +static ssize_t max_command_size_show(struct kobject *kobj, + struct kobj_attribute *attr, char *buf) +{ + struct feature *feature =3D to_pmt_feature(kobj); + struct command *command =3D get_command(feature); + + if (IS_ERR(command)) + return (PTR_ERR(command)); + + return sysfs_emit(buf, "%u\n", command->max_command_size); +} +static struct kobj_attribute max_command_size_attribute =3D + __ATTR_RO(max_command_size); + +static ssize_t guids_show(struct kobject *kobj, struct kobj_attribute *att= r, + char *buf) +{ + struct feature *feature =3D to_pmt_feature(kobj); + int i, count =3D 0; + + for (i =3D 0; i < feature->table.header.num_guids; i++) + count +=3D sysfs_emit_at(buf, count, "0x%x\n", + feature->table.guids[i]); + + return count; +} +static struct kobj_attribute guids_attribute =3D __ATTR_RO(guids); + +static struct attribute *pmt_feature_rmid_attrs[] =3D { + &caps_attribute.attr, + &num_rmids_attribute.attr, + &min_watcher_period_ms_attribute.attr, + &max_stream_size_attribute.attr, + &max_command_size_attribute.attr, + &guids_attribute.attr, + NULL +}; +ATTRIBUTE_GROUPS(pmt_feature_rmid); + +static const struct kobj_type pmt_feature_rmid_ktype =3D { + .sysfs_ops =3D &kobj_sysfs_ops, + .release =3D pmt_feature_release, + .default_groups =3D pmt_feature_rmid_groups, +}; + +static struct attribute *pmt_feature_watcher_attrs[] =3D { + &caps_attribute.attr, + &min_watcher_period_ms_attribute.attr, + &max_stream_size_attribute.attr, + &max_command_size_attribute.attr, + &guids_attribute.attr, + NULL +}; +ATTRIBUTE_GROUPS(pmt_feature_watcher); + +static const struct kobj_type pmt_feature_watcher_ktype =3D { + .sysfs_ops =3D &kobj_sysfs_ops, + .release =3D pmt_feature_release, + .default_groups =3D pmt_feature_watcher_groups, +}; + +static struct attribute *pmt_feature_command_attrs[] =3D { + &caps_attribute.attr, + &max_stream_size_attribute.attr, + &max_command_size_attribute.attr, + &guids_attribute.attr, + NULL +}; +ATTRIBUTE_GROUPS(pmt_feature_command); + +static const struct kobj_type pmt_feature_command_ktype =3D { + .sysfs_ops =3D &kobj_sysfs_ops, + .release =3D pmt_feature_release, + .default_groups =3D pmt_feature_command_groups, +}; + +static struct attribute *pmt_feature_guids_attrs[] =3D { + &caps_attribute.attr, + &guids_attribute.attr, + NULL +}; +ATTRIBUTE_GROUPS(pmt_feature_guids); + +static const struct kobj_type pmt_feature_guids_ktype =3D { + .sysfs_ops =3D &kobj_sysfs_ops, + .release =3D pmt_feature_release, + .default_groups =3D pmt_feature_guids_groups, +}; + +static int +pmt_feature_get_disc_table(struct pmt_features_priv *priv, + struct resource *disc_res, + struct feature_discovery_table *disc_tbl) +{ + void __iomem *disc_base; + + disc_base =3D devm_ioremap_resource(priv->dev, disc_res); + if (IS_ERR(disc_base)) + return PTR_ERR(disc_base); + + memcpy_fromio(disc_tbl, disc_base, sizeof(*disc_tbl)); + + devm_iounmap(priv->dev, disc_base); + + if (priv->mask & BIT(disc_tbl->id)) + return dev_err_probe(priv->dev, -EINVAL, "Duplicate feature: %s\n", + pmt_feature_names[disc_tbl->id]); + + /* + * Some devices may expose non-functioning entries that are + * reserved for future use. They have zero size. Do not fail + * probe for these. Just ignore them. + */ + if (disc_tbl->size =3D=3D 0 || disc_tbl->access_type =3D=3D 0xF) + return SKIP_FEATURE; + + if (disc_tbl->version > MAX_FEATURE_VERSION) + return SKIP_FEATURE; + + if (!pmt_feature_id_is_valid(disc_tbl->id)) + return SKIP_FEATURE; + + priv->mask |=3D BIT(disc_tbl->id); + + return 0; +} + +static int +pmt_feature_get_feature_table(struct pmt_features_priv *priv, + struct feature *feature, + struct feature_discovery_table *disc_tbl, + struct resource *disc_res) +{ + struct feature_table *feat_tbl =3D &feature->table; + struct feature_header *header; + struct resource res =3D {}; + resource_size_t res_size; + void __iomem *feat_base, *feat_offset; + void *tbl_offset; + size_t size; + u32 *guids; + u8 tbir; + + tbir =3D FIELD_GET(DT_TBIR, disc_tbl->offset); + + switch (disc_tbl->access_type) { + case ACCESS_LOCAL: + if (tbir) + return dev_err_probe(priv->dev, -EINVAL, + "Unsupported BAR index %u for access type %u\n", + tbir, disc_tbl->access_type); + + + /* + * For access_type LOCAL, the base address is as follows: + * base address =3D end of discovery region + base offset + 1 + */ + res =3D DEFINE_RES_MEM(disc_res->end + disc_tbl->offset + 1, + disc_tbl->size * sizeof(u32)); + break; + + default: + return dev_err_probe(priv->dev, -EINVAL, "Unrecognized access_type %u\n", + disc_tbl->access_type); + } + + feature->id =3D disc_tbl->id; + + /* Get the feature table */ + feat_base =3D devm_ioremap_resource(priv->dev, &res); + if (IS_ERR(feat_base)) + return PTR_ERR(feat_base); + + feat_offset =3D feat_base; + tbl_offset =3D feat_tbl; + + /* Get the header */ + header =3D &feat_tbl->header; + memcpy_fromio(header, feat_offset, sizeof(*header)); + + /* Validate fields fit within mapped resource */ + size =3D sizeof(*header) + FEAT_ATTR_SIZE(header->attr_size) + + PMT_GUID_SIZE(header->num_guids); + res_size =3D resource_size(&res); + if (WARN(size > res_size, "Bad table size %ld > %pa", size, &res_size)) + return -EINVAL; + + /* Get the feature attributes, including capability fields */ + tbl_offset +=3D sizeof(*header); + feat_offset +=3D sizeof(*header); + + memcpy_fromio(tbl_offset, feat_offset, FEAT_ATTR_SIZE(header->attr_size)); + + /* Finally, get the guids */ + guids =3D devm_kmalloc(priv->dev, PMT_GUID_SIZE(header->num_guids), GFP_K= ERNEL); + if (!guids) + return -ENOMEM; + + feat_offset +=3D FEAT_ATTR_SIZE(header->attr_size); + + memcpy_fromio(guids, feat_offset, PMT_GUID_SIZE(header->num_guids)); + + feat_tbl->guids =3D guids; + + devm_iounmap(priv->dev, feat_base); + + return 0; +} + +static void pmt_features_add_feat(struct feature *feature) +{ + guard(mutex)(&feature_list_lock); + list_add(&feature->list, &pmt_feature_list); +} + +static void pmt_features_remove_feat(struct feature *feature) +{ + guard(mutex)(&feature_list_lock); + list_del(&feature->list); +} + +/* Get the discovery table and use it to get the feature table */ +static int pmt_features_discovery(struct pmt_features_priv *priv, + struct feature *feature, + struct intel_vsec_device *ivdev, + int idx) +{ + struct feature_discovery_table disc_tbl =3D {}; /* For static analyzers */ + struct resource *disc_res =3D &ivdev->resource[idx]; + const struct kobj_type *ktype; + int ret; + + ret =3D pmt_feature_get_disc_table(priv, disc_res, &disc_tbl); + if (ret) + return ret; + + ret =3D pmt_feature_get_feature_table(priv, feature, &disc_tbl, disc_res); + if (ret) + return ret; + + switch (feature_layout[feature->id]) { + case LAYOUT_RMID: + ktype =3D &pmt_feature_rmid_ktype; + feature->attr_group =3D &pmt_feature_rmid_group; + break; + case LAYOUT_WATCHER: + ktype =3D &pmt_feature_watcher_ktype; + feature->attr_group =3D &pmt_feature_watcher_group; + break; + case LAYOUT_COMMAND: + ktype =3D &pmt_feature_command_ktype; + feature->attr_group =3D &pmt_feature_command_group; + break; + case LAYOUT_CAPS_ONLY: + ktype =3D &pmt_feature_guids_ktype; + feature->attr_group =3D &pmt_feature_guids_group; + break; + default: + return -EINVAL; + } + + ret =3D kobject_init_and_add(&feature->kobj, ktype, &priv->dev->kobj, + pmt_feature_names[feature->id]); + if (ret) + return ret; + + kobject_uevent(&feature->kobj, KOBJ_ADD); + pmt_features_add_feat(feature); + + return 0; +} + +static void pmt_features_remove(struct auxiliary_device *auxdev) +{ + struct pmt_features_priv *priv =3D auxiliary_get_drvdata(auxdev); + int i; + + for (i =3D 0; i < priv->count; i++) { + struct feature *feature =3D &priv->feature[i]; + + pmt_features_remove_feat(feature); + sysfs_remove_group(&feature->kobj, feature->attr_group); + kobject_put(&feature->kobj); + } + + device_unregister(priv->dev); +} + +static int pmt_features_probe(struct auxiliary_device *auxdev, const struc= t auxiliary_device_id *id) +{ + struct intel_vsec_device *ivdev =3D auxdev_to_ivdev(auxdev); + struct pmt_features_priv *priv; + size_t size; + int ret, i; + + size =3D struct_size(priv, feature, ivdev->num_resources); + priv =3D devm_kzalloc(&auxdev->dev, size, GFP_KERNEL); + if (!priv) + return -ENOMEM; + + priv->parent =3D &ivdev->pcidev->dev; + auxiliary_set_drvdata(auxdev, priv); + + priv->dev =3D device_create(&intel_pmt_class, &auxdev->dev, MKDEV(0, 0), = priv, + "%s-%s", "features", dev_name(priv->parent)); + if (IS_ERR(priv->dev)) + return dev_err_probe(priv->dev, PTR_ERR(priv->dev), + "Could not create %s-%s device node\n", + "features", dev_name(priv->dev)); + + /* Initialize each feature */ + for (i =3D 0; i < ivdev->num_resources; i++) { + struct feature *feature =3D &priv->feature[priv->count]; + + ret =3D pmt_features_discovery(priv, feature, ivdev, i); + if (ret =3D=3D SKIP_FEATURE) + continue; + if (ret !=3D 0) + goto abort_probe; + + feature->priv =3D priv; + priv->count++; + } + + return 0; + +abort_probe: + /* + * Only fully initialized features are tracked in priv->count, which is + * incremented only after a feature is completely set up (i.e., after + * discovery and sysfs registration). If feature initialization fails, + * the failing feature's state is local and does not require rollback. + * + * Therefore, on error, we can safely call the driver's remove() routine + * pmt_features_remove() to clean up only those features that were + * fully initialized and counted. All other resources are device-managed + * and will be cleaned up automatically during device_unregister(). + */ + pmt_features_remove(auxdev); + + return ret; +} + +static const struct auxiliary_device_id pmt_features_id_table[] =3D { + { .name =3D "intel_vsec.discovery" }, + {} +}; +MODULE_DEVICE_TABLE(auxiliary, pmt_features_id_table); + +static struct auxiliary_driver pmt_features_aux_driver =3D { + .id_table =3D pmt_features_id_table, + .remove =3D pmt_features_remove, + .probe =3D pmt_features_probe, +}; +module_auxiliary_driver(pmt_features_aux_driver); + +MODULE_AUTHOR("David E. Box "); +MODULE_DESCRIPTION("Intel PMT Discovery driver"); +MODULE_LICENSE("GPL"); +MODULE_IMPORT_NS("INTEL_PMT"); diff --git a/drivers/platform/x86/intel/pmt/features.c b/drivers/platform/x= 86/intel/pmt/features.c new file mode 100644 index 000000000000..7e7de76971f8 --- /dev/null +++ b/drivers/platform/x86/intel/pmt/features.c @@ -0,0 +1,205 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2025, Intel Corporation. + * All Rights Reserved. + * + * Author: "David E. Box" + */ + +#include +#include + +#include + +const char * const pmt_feature_names[] =3D { + [FEATURE_PER_CORE_PERF_TELEM] =3D "per_core_performace_telemetry", + [FEATURE_PER_CORE_ENV_TELEM] =3D "per_core_environment_telemetry", + [FEATURE_PER_RMID_PERF_TELEM] =3D "per_rmid_perf_telemetry", + [FEATURE_ACCEL_TELEM] =3D "accelerator_telemetry", + [FEATURE_UNCORE_TELEM] =3D "uncore_telemetry", + [FEATURE_CRASH_LOG] =3D "crash_log", + [FEATURE_PETE_LOG] =3D "pete_log", + [FEATURE_TPMI_CTRL] =3D "tpmi_control", + [FEATURE_TRACING] =3D "tracing", + [FEATURE_PER_RMID_ENERGY_TELEM] =3D "per_rmid_energy_telemetry", +}; +EXPORT_SYMBOL_NS_GPL(pmt_feature_names, "INTEL_PMT_DISCOVERY"); + +enum feature_layout feature_layout[] =3D { + [FEATURE_PER_CORE_PERF_TELEM] =3D LAYOUT_WATCHER, + [FEATURE_PER_CORE_ENV_TELEM] =3D LAYOUT_WATCHER, + [FEATURE_PER_RMID_PERF_TELEM] =3D LAYOUT_RMID, + [FEATURE_ACCEL_TELEM] =3D LAYOUT_WATCHER, + [FEATURE_UNCORE_TELEM] =3D LAYOUT_WATCHER, + [FEATURE_CRASH_LOG] =3D LAYOUT_COMMAND, + [FEATURE_PETE_LOG] =3D LAYOUT_COMMAND, + [FEATURE_TPMI_CTRL] =3D LAYOUT_CAPS_ONLY, + [FEATURE_TRACING] =3D LAYOUT_CAPS_ONLY, + [FEATURE_PER_RMID_ENERGY_TELEM] =3D LAYOUT_RMID, +}; + +struct pmt_cap pmt_cap_common[] =3D { + {PMT_CAP_TELEM, "telemetry"}, + {PMT_CAP_WATCHER, "watcher"}, + {PMT_CAP_CRASHLOG, "crashlog"}, + {PMT_CAP_STREAMING, "streaming"}, + {PMT_CAP_THRESHOLD, "threashold"}, + {PMT_CAP_WINDOW, "window"}, + {PMT_CAP_CONFIG, "config"}, + {PMT_CAP_TRACING, "tracing"}, + {PMT_CAP_INBAND, "inband"}, + {PMT_CAP_OOB, "oob"}, + {PMT_CAP_SECURED_CHAN, "secure_chan"}, + {PMT_CAP_PMT_SP, "pmt_sp"}, + {PMT_CAP_PMT_SP_POLICY, "PMT SP Policy"}, + {} +}; + +struct pmt_cap pmt_cap_pcpt[] =3D { + {PMT_CAP_PCPT_CORE_PERF, "core_performance"}, + {PMT_CAP_PCPT_CORE_C0_RES, "core_c0_residency"}, + {PMT_CAP_PCPT_CORE_ACTIVITY, "core_activity"}, + {PMT_CAP_PCPT_CACHE_PERF, "cache_performance"}, + {PMT_CAP_PCPT_QUALITY_TELEM, "quality_telem"}, + {} +}; + +struct pmt_cap *pmt_caps_pcpt[] =3D { + pmt_cap_common, + pmt_cap_pcpt, + NULL +}; + +struct pmt_cap pmt_cap_pcet[] =3D { + {PMT_CAP_PCET_WORKPOINT_HIST, "workpoint_histogram"}, + {PMT_CAP_PCET_CORE_CURR_TEMP, "core_current_temp"}, + {PMT_CAP_PCET_CORE_INST_RES, "core_inst_residency"}, + {PMT_CAP_PCET_QUALITY_TELEM, "quality_telem"}, + {PMT_CAP_PCET_CORE_CDYN_LVL, "core_cdyn_level"}, + {PMT_CAP_PCET_CORE_STRESS_LVL, "core_stress_level"}, + {PMT_CAP_PCET_CORE_DAS, "core_digital_aging_sensor"}, + {PMT_CAP_PCET_FIVR_HEALTH, "fivr_health"}, + {PMT_CAP_PCET_ENERGY, "energy"}, + {PMT_CAP_PCET_PEM_STATUS, "pem_status"}, + {PMT_CAP_PCET_CORE_C_STATE, "core_c_state"}, + {} +}; + +struct pmt_cap *pmt_caps_pcet[] =3D { + pmt_cap_common, + pmt_cap_pcet, + NULL +}; + +struct pmt_cap pmt_cap_rmid_perf[] =3D { + {PMT_CAP_RMID_CORES_PERF, "core_performance"}, + {PMT_CAP_RMID_CACHE_PERF, "cache_performance"}, + {PMT_CAP_RMID_PERF_QUAL, "performance_quality"}, + {} +}; + +struct pmt_cap *pmt_caps_rmid_perf[] =3D { + pmt_cap_common, + pmt_cap_rmid_perf, + NULL +}; + +struct pmt_cap pmt_cap_accel[] =3D { + {PMT_CAP_ACCEL_CPM_TELEM, "content_processing_module"}, + {PMT_CAP_ACCEL_TIP_TELEM, "content_turbo_ip"}, + {} +}; + +struct pmt_cap *pmt_caps_accel[] =3D { + pmt_cap_common, + pmt_cap_accel, + NULL +}; + +struct pmt_cap pmt_cap_uncore[] =3D { + {PMT_CAP_UNCORE_IO_CA_TELEM, "io_ca"}, + {PMT_CAP_UNCORE_RMID_TELEM, "rmid"}, + {PMT_CAP_UNCORE_D2D_ULA_TELEM, "d2d_ula"}, + {PMT_CAP_UNCORE_PKGC_TELEM, "package_c"}, + {} +}; + +struct pmt_cap *pmt_caps_uncore[] =3D { + pmt_cap_common, + pmt_cap_uncore, + NULL +}; + +struct pmt_cap pmt_cap_crashlog[] =3D { + {PMT_CAP_CRASHLOG_MAN_TRIG, "manual_trigger"}, + {PMT_CAP_CRASHLOG_CORE, "core"}, + {PMT_CAP_CRASHLOG_UNCORE, "uncore"}, + {PMT_CAP_CRASHLOG_TOR, "tor"}, + {PMT_CAP_CRASHLOG_S3M, "s3m"}, + {PMT_CAP_CRASHLOG_PERSISTENCY, "presistency"}, + {PMT_CAP_CRASHLOG_CLIP_GPIO, "crashlog_in_progress"}, + {PMT_CAP_CRASHLOG_PRE_RESET, "pre_reset_extraction"}, + {PMT_CAP_CRASHLOG_POST_RESET, "post_reset_extraction"}, + {} +}; + +struct pmt_cap *pmt_caps_crashlog[] =3D { + pmt_cap_common, + pmt_cap_crashlog, + NULL +}; + +struct pmt_cap pmt_cap_pete[] =3D { + {PMT_CAP_PETE_MAN_TRIG, "manual_trigger"}, + {PMT_CAP_PETE_ENCRYPTION, "encrpytion"}, + {PMT_CAP_PETE_PERSISTENCY, "persistency"}, + {PMT_CAP_PETE_REQ_TOKENS, "required_tokens"}, + {PMT_CAP_PETE_PROD_ENABLED, "production_enabled"}, + {PMT_CAP_PETE_DEBUG_ENABLED, "debug_enabled"}, + {} +}; + +struct pmt_cap *pmt_caps_pete[] =3D { + pmt_cap_common, + pmt_cap_pete, + NULL +}; + +struct pmt_cap pmt_cap_tpmi[] =3D { + {PMT_CAP_TPMI_MAILBOX, "mailbox"}, + {PMT_CAP_TPMI_LOCK, "bios_lock"}, + {} +}; + +struct pmt_cap *pmt_caps_tpmi[] =3D { + pmt_cap_common, + pmt_cap_tpmi, + NULL +}; + +struct pmt_cap pmt_cap_tracing[] =3D { + {PMT_CAP_TRACE_SRAR, "srar_errors"}, + {PMT_CAP_TRACE_CORRECTABLE, "correctable_errors"}, + {PMT_CAP_TRACE_MCTP, "mctp"}, + {PMT_CAP_TRACE_MRT, "memory_resiliency"}, + {} +}; + +struct pmt_cap *pmt_caps_tracing[] =3D { + pmt_cap_common, + pmt_cap_tracing, + NULL +}; + +struct pmt_cap pmt_cap_rmid_energy[] =3D { + {PMT_CAP_RMID_ENERGY, "energy"}, + {PMT_CAP_RMID_ACTIVITY, "activity"}, + {PMT_CAP_RMID_ENERGY_QUAL, "energy_quality"}, + {} +}; + +struct pmt_cap *pmt_caps_rmid_energy[] =3D { + pmt_cap_common, + pmt_cap_rmid_energy, + NULL +}; diff --git a/include/linux/intel_pmt_features.h b/include/linux/intel_pmt_f= eatures.h new file mode 100644 index 000000000000..53573a4a49b7 --- /dev/null +++ b/include/linux/intel_pmt_features.h @@ -0,0 +1,157 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef _FEATURES_H +#define _FEATURES_H + +#include +#include + +/* Common masks */ +#define PMT_CAP_TELEM BIT(0) +#define PMT_CAP_WATCHER BIT(1) +#define PMT_CAP_CRASHLOG BIT(2) +#define PMT_CAP_STREAMING BIT(3) +#define PMT_CAP_THRESHOLD BIT(4) +#define PMT_CAP_WINDOW BIT(5) +#define PMT_CAP_CONFIG BIT(6) +#define PMT_CAP_TRACING BIT(7) +#define PMT_CAP_INBAND BIT(8) +#define PMT_CAP_OOB BIT(9) +#define PMT_CAP_SECURED_CHAN BIT(10) + +#define PMT_CAP_PMT_SP BIT(11) +#define PMT_CAP_PMT_SP_POLICY GENMASK(17, 12) + +/* Per Core Performance Telemetry (PCPT) specific masks */ +#define PMT_CAP_PCPT_CORE_PERF BIT(18) +#define PMT_CAP_PCPT_CORE_C0_RES BIT(19) +#define PMT_CAP_PCPT_CORE_ACTIVITY BIT(20) +#define PMT_CAP_PCPT_CACHE_PERF BIT(21) +#define PMT_CAP_PCPT_QUALITY_TELEM BIT(22) + +/* Per Core Environmental Telemetry (PCET) specific masks */ +#define PMT_CAP_PCET_WORKPOINT_HIST BIT(18) +#define PMT_CAP_PCET_CORE_CURR_TEMP BIT(19) +#define PMT_CAP_PCET_CORE_INST_RES BIT(20) +#define PMT_CAP_PCET_QUALITY_TELEM BIT(21) /* Same as PMT_CAP_PCPT */ +#define PMT_CAP_PCET_CORE_CDYN_LVL BIT(22) +#define PMT_CAP_PCET_CORE_STRESS_LVL BIT(23) +#define PMT_CAP_PCET_CORE_DAS BIT(24) +#define PMT_CAP_PCET_FIVR_HEALTH BIT(25) +#define PMT_CAP_PCET_ENERGY BIT(26) +#define PMT_CAP_PCET_PEM_STATUS BIT(27) +#define PMT_CAP_PCET_CORE_C_STATE BIT(28) + +/* Per RMID Performance Telemetry specific masks */ +#define PMT_CAP_RMID_CORES_PERF BIT(18) +#define PMT_CAP_RMID_CACHE_PERF BIT(19) +#define PMT_CAP_RMID_PERF_QUAL BIT(20) + +/* Accelerator Telemetry specific masks */ +#define PMT_CAP_ACCEL_CPM_TELEM BIT(18) +#define PMT_CAP_ACCEL_TIP_TELEM BIT(19) + +/* Uncore Telemetry specific masks */ +#define PMT_CAP_UNCORE_IO_CA_TELEM BIT(18) +#define PMT_CAP_UNCORE_RMID_TELEM BIT(19) +#define PMT_CAP_UNCORE_D2D_ULA_TELEM BIT(20) +#define PMT_CAP_UNCORE_PKGC_TELEM BIT(21) + +/* Crash Log specific masks */ +#define PMT_CAP_CRASHLOG_MAN_TRIG BIT(11) +#define PMT_CAP_CRASHLOG_CORE BIT(12) +#define PMT_CAP_CRASHLOG_UNCORE BIT(13) +#define PMT_CAP_CRASHLOG_TOR BIT(14) +#define PMT_CAP_CRASHLOG_S3M BIT(15) +#define PMT_CAP_CRASHLOG_PERSISTENCY BIT(16) +#define PMT_CAP_CRASHLOG_CLIP_GPIO BIT(17) +#define PMT_CAP_CRASHLOG_PRE_RESET BIT(18) +#define PMT_CAP_CRASHLOG_POST_RESET BIT(19) + +/* PeTe Log specific masks */ +#define PMT_CAP_PETE_MAN_TRIG BIT(11) +#define PMT_CAP_PETE_ENCRYPTION BIT(12) +#define PMT_CAP_PETE_PERSISTENCY BIT(13) +#define PMT_CAP_PETE_REQ_TOKENS BIT(14) +#define PMT_CAP_PETE_PROD_ENABLED BIT(15) +#define PMT_CAP_PETE_DEBUG_ENABLED BIT(16) + +/* TPMI control specific masks */ +#define PMT_CAP_TPMI_MAILBOX BIT(11) +#define PMT_CAP_TPMI_LOCK BIT(12) + +/* Tracing specific masks */ +#define PMT_CAP_TRACE_SRAR BIT(11) +#define PMT_CAP_TRACE_CORRECTABLE BIT(12) +#define PMT_CAP_TRACE_MCTP BIT(13) +#define PMT_CAP_TRACE_MRT BIT(14) + +/* Per RMID Energy Telemetry specific masks */ +#define PMT_CAP_RMID_ENERGY BIT(18) +#define PMT_CAP_RMID_ACTIVITY BIT(19) +#define PMT_CAP_RMID_ENERGY_QUAL BIT(20) + +enum pmt_feature_id { + FEATURE_INVALID =3D 0x0, + FEATURE_PER_CORE_PERF_TELEM =3D 0x1, + FEATURE_PER_CORE_ENV_TELEM =3D 0x2, + FEATURE_PER_RMID_PERF_TELEM =3D 0x3, + FEATURE_ACCEL_TELEM =3D 0x4, + FEATURE_UNCORE_TELEM =3D 0x5, + FEATURE_CRASH_LOG =3D 0x6, + FEATURE_PETE_LOG =3D 0x7, + FEATURE_TPMI_CTRL =3D 0x8, + FEATURE_RESERVED =3D 0x9, + FEATURE_TRACING =3D 0xA, + FEATURE_PER_RMID_ENERGY_TELEM =3D 0xB, + FEATURE_MAX =3D 0xB, +}; + +enum feature_layout { + LAYOUT_RMID, + LAYOUT_WATCHER, + LAYOUT_COMMAND, + LAYOUT_CAPS_ONLY, +}; + +struct pmt_cap { + u32 mask; + const char *name; +}; + +extern const char * const pmt_feature_names[]; +extern enum feature_layout feature_layout[]; +extern struct pmt_cap pmt_cap_common[]; +extern struct pmt_cap pmt_cap_pcpt[]; +extern struct pmt_cap *pmt_caps_pcpt[]; +extern struct pmt_cap pmt_cap_pcet[]; +extern struct pmt_cap *pmt_caps_pcet[]; +extern struct pmt_cap pmt_cap_rmid_perf[]; +extern struct pmt_cap *pmt_caps_rmid_perf[]; +extern struct pmt_cap pmt_cap_accel[]; +extern struct pmt_cap *pmt_caps_accel[]; +extern struct pmt_cap pmt_cap_uncore[]; +extern struct pmt_cap *pmt_caps_uncore[]; +extern struct pmt_cap pmt_cap_crashlog[]; +extern struct pmt_cap *pmt_caps_crashlog[]; +extern struct pmt_cap pmt_cap_pete[]; +extern struct pmt_cap *pmt_caps_pete[]; +extern struct pmt_cap pmt_cap_tpmi[]; +extern struct pmt_cap *pmt_caps_tpmi[]; +extern struct pmt_cap pmt_cap_s3m[]; +extern struct pmt_cap *pmt_caps_s3m[]; +extern struct pmt_cap pmt_cap_tracing[]; +extern struct pmt_cap *pmt_caps_tracing[]; +extern struct pmt_cap pmt_cap_rmid_energy[]; +extern struct pmt_cap *pmt_caps_rmid_energy[]; + +static inline bool pmt_feature_id_is_valid(enum pmt_feature_id id) +{ + if (id > FEATURE_MAX) + return false; + + if (id =3D=3D FEATURE_INVALID || id =3D=3D FEATURE_RESERVED) + return false; + + return true; +} +#endif --=20 2.43.0 From nobody Sat Feb 7 18:43:37 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CC2022D0ADD; Wed, 30 Apr 2025 21:21:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.8 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746048084; cv=none; b=NZcol22W2ilKHFj3VA05RiYZ58dY2dptyMJ648jgYmQpoC60cEvjzZ+d214kiAeqKY5PlFMKONtVZLIVnY0yVWaMdQrG8sfMoGB1OxuSgn9uYdrfawDUX2mJ/wzR4+8p2Kvc9AbgycHK58gugsNvORlbguFRrwwZhdLPUpmEjn0= ARC-Message-Signature: i=1; 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d="scan'208";a="133972295" Received: from agladkov-desk.ger.corp.intel.com (HELO debox1-desk4.lan) ([10.125.110.57]) by orviesa009-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Apr 2025 14:21:17 -0700 From: "David E. Box" To: linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org, david.e.box@linux.intel.com, srinivas.pandruvada@linux.intel.com, andriy.shevchenko@linux.intel.com, ilpo.jarvinen@linux.intel.com, tony.luck@intel.com, xi.pardee@linux.intel.com Cc: hdegoede@redhat.com Subject: [PATCH 09/15] docs: Add ABI documentation for intel_pmt feature directories Date: Wed, 30 Apr 2025 14:20:58 -0700 Message-ID: <20250430212106.369208-10-david.e.box@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250430212106.369208-1-david.e.box@linux.intel.com> References: <20250430212106.369208-1-david.e.box@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add a new sysfs ABI documentation file describing the layout and content of the features-/ directory used by Intel PMT (Platform Monitoring Technology). This directory exposes telemetry and control feature details for a given PMT PCI device. Signed-off-by: David E. Box Tested-by: Tony Luck --- .../testing/sysfs-class-intel_pmt-features | 128 ++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 129 insertions(+) create mode 100644 Documentation/ABI/testing/sysfs-class-intel_pmt-features diff --git a/Documentation/ABI/testing/sysfs-class-intel_pmt-features b/Doc= umentation/ABI/testing/sysfs-class-intel_pmt-features new file mode 100644 index 000000000000..6dfb9b4b30b5 --- /dev/null +++ b/Documentation/ABI/testing/sysfs-class-intel_pmt-features @@ -0,0 +1,128 @@ +What: /sys/class/intel_pmt/features-/ +Date: 2025-04-24 +KernelVersion: 6.16 +Contact: david.e.box@linux.intel.com +Description: + The `features-/` directory represents the "feature= s" + capability exposed by Intel PMT (Platform Monitoring Techno= logy) + for the given PCI device. + + Each directory corresponds to a PMT feature and contains + attributes describing the available telemetry, monitoring, = or + control functionalities. + +Directory Structure: + + /sys/class/intel_pmt/features-/ + =E2=94=9C=E2=94=80=E2=94=80 accelerator_telemetry/ # Per-accelerator te= lemetry data + =E2=94=9C=E2=94=80=E2=94=80 crash_log/ # Contains system crash telemet= ry logs + =E2=94=9C=E2=94=80=E2=94=80 per_core_environment_telemetry/ # Environmen= tal telemetry per core + =E2=94=9C=E2=94=80=E2=94=80 per_core_performance_telemetry/ # Performanc= e telemetry per core + =E2=94=9C=E2=94=80=E2=94=80 per_rmid_energy_telemetry/ # Energy telemetr= y for RMIDs + =E2=94=9C=E2=94=80=E2=94=80 per_rmid_perf_telemetry/ # Performance tele= metry for RMIDs + =E2=94=9C=E2=94=80=E2=94=80 tpmi_control/ # TPMI-related controls and = telemetry + =E2=94=9C=E2=94=80=E2=94=80 tracing/ # PMT tracing features + =E2=94=94=E2=94=80=E2=94=80 uncore_telemetry/ # Uncore telemetry data + +Common Files (Present in all feature directories): + + caps + - Read-only + - Lists available capabilities for this feature. + + guids + - Read-only + - Lists GUIDs associated with this feature. + +Additional Attributes (Conditional Presence): + + max_command_size + - Read-only + - Present if the feature supports out-of-band MCTP access. + - Maximum supported MCTP command size for out-of-band PMT access (byte= s). + + max_stream_size + - Read-only + - Present if the feature supports out-of-band MCTP access. + - Maximum supported MCTP stream size (bytes). + + min_watcher_period_ms + - Read-only + - Present if the feature supports the watcher API. + - Minimum supported time period for the watcher interface (millisecond= s). + + num_rmids + - Read-only + - Present if the feature supports RMID telemetry. + - Maximum number of RMIDs tracked simultaneously. + +Example: +For a device with PCI BDF `0000:00:03.1`, the directory tree could look li= ke: + + /sys/class/intel_pmt/features-0000:00:03.1/ + =E2=94=9C=E2=94=80=E2=94=80 accelerator_telemetry/ + =E2=94=82 =E2=94=9C=E2=94=80=E2=94=80 caps + =E2=94=82 =E2=94=9C=E2=94=80=E2=94=80 guids + =E2=94=82 =E2=94=9C=E2=94=80=E2=94=80 max_command_size + =E2=94=82 =E2=94=9C=E2=94=80=E2=94=80 max_stream_size + =E2=94=82 =E2=94=9C=E2=94=80=E2=94=80 min_watcher_period_ms + =E2=94=9C=E2=94=80=E2=94=80 crash_log/ + =E2=94=82 =E2=94=9C=E2=94=80=E2=94=80 caps + =E2=94=82 =E2=94=9C=E2=94=80=E2=94=80 guids + =E2=94=82 =E2=94=9C=E2=94=80=E2=94=80 max_command_size + =E2=94=82 =E2=94=9C=E2=94=80=E2=94=80 max_stream_size + =E2=94=9C=E2=94=80=E2=94=80 per_core_environment_telemetry/ + =E2=94=82 =E2=94=9C=E2=94=80=E2=94=80 caps + =E2=94=82 =E2=94=9C=E2=94=80=E2=94=80 guids + =E2=94=82 =E2=94=9C=E2=94=80=E2=94=80 max_command_size + =E2=94=82 =E2=94=9C=E2=94=80=E2=94=80 max_stream_size + =E2=94=82 =E2=94=9C=E2=94=80=E2=94=80 min_watcher_period_ms + =E2=94=9C=E2=94=80=E2=94=80 per_rmid_energy_telemetry/ + =E2=94=82 =E2=94=9C=E2=94=80=E2=94=80 caps + =E2=94=82 =E2=94=9C=E2=94=80=E2=94=80 guids + =E2=94=82 =E2=94=9C=E2=94=80=E2=94=80 max_command_size + =E2=94=82 =E2=94=9C=E2=94=80=E2=94=80 max_stream_size + =E2=94=82 =E2=94=9C=E2=94=80=E2=94=80 min_watcher_period_ms + =E2=94=82 =E2=94=9C=E2=94=80=E2=94=80 num_rmids + =E2=94=9C=E2=94=80=E2=94=80 tpmi_control/ + =E2=94=82 =E2=94=9C=E2=94=80=E2=94=80 caps + =E2=94=82 =E2=94=9C=E2=94=80=E2=94=80 guids + =E2=94=9C=E2=94=80=E2=94=80 tracing/ + =E2=94=82 =E2=94=9C=E2=94=80=E2=94=80 caps + =E2=94=82 =E2=94=9C=E2=94=80=E2=94=80 guids + =E2=94=9C=E2=94=80=E2=94=80 uncore_telemetry/ + =E2=94=82 =E2=94=9C=E2=94=80=E2=94=80 caps + =E2=94=82 =E2=94=9C=E2=94=80=E2=94=80 guids + =E2=94=82 =E2=94=9C=E2=94=80=E2=94=80 max_command_size + =E2=94=82 =E2=94=9C=E2=94=80=E2=94=80 max_stream_size + =E2=94=82 =E2=94=9C=E2=94=80=E2=94=80 min_watcher_period_ms + +Notes: + - Some attributes are only present if the corresponding feature supports + the capability (e.g., `max_command_size` for MCTP-capable features). + - Features supporting RMIDs include `num_rmids`. + - Features supporting the watcher API include `min_watcher_period_ms`. + - The `caps` file provides additional information about the functionality + of the feature. + +Example 'caps' content for the 'tracing' feature: + + /sys/class/intel_pmt/features-0000:00:03.1/ + =E2=94=9C=E2=94=80=E2=94=80 tracing/ + =E2=94=82 =E2=94=9C=E2=94=80=E2=94=80 caps + + telemetry Available: No + watcher Available: Yes + crashlog Available: No + streaming Available: No + threashold Available: No + window Available: No + config Available: Yes + tracing Available: No + inband Available: Yes + oob Available: Yes + secure_chan Available: No + pmt_sp Available: Yes + PMT SP Policy Available: Yes + mailbox Available: Yes + bios_lock Available: Yes diff --git a/MAINTAINERS b/MAINTAINERS index bd9f99585894..10338ea81667 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -12181,6 +12181,7 @@ INTEL PMT DRIVERS M: David E. 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Box" To: linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org, david.e.box@linux.intel.com, srinivas.pandruvada@linux.intel.com, andriy.shevchenko@linux.intel.com, ilpo.jarvinen@linux.intel.com, tony.luck@intel.com, xi.pardee@linux.intel.com Cc: hdegoede@redhat.com Subject: [PATCH 10/15] platform/x86/intel/tpmi: Relocate platform info to intel_vsec.h Date: Wed, 30 Apr 2025 14:20:59 -0700 Message-ID: <20250430212106.369208-11-david.e.box@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250430212106.369208-1-david.e.box@linux.intel.com> References: <20250430212106.369208-1-david.e.box@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The TPMI platform information provides a mapping of OOBMSM PCI devices to logical CPUs. Since this mapping is consistent across all OOBMSM features (e.g., TPMI, PMT, SDSi), it can be leveraged by multiple drivers. To facilitate reuse, relocate the struct intel_tpmi_plat_info to intel_vsec.h, renaming it to struct oobmsm_plat_info, making it accessible to other features. While modifying headers, place them in alphabetical order. Signed-off-by: David E. Box Reviewed-by: Ilpo J=C3=A4rvinen Tested-by: Tony Luck --- drivers/platform/x86/intel/plr_tpmi.c | 3 ++- .../intel/speed_select_if/isst_tpmi_core.c | 9 ++++--- .../uncore-frequency/uncore-frequency-tpmi.c | 5 ++-- drivers/platform/x86/intel/vsec_tpmi.c | 4 +-- drivers/powercap/intel_rapl_tpmi.c | 9 ++++--- include/linux/intel_tpmi.h | 26 ++----------------- include/linux/intel_vsec.h | 22 ++++++++++++++++ 7 files changed, 41 insertions(+), 37 deletions(-) diff --git a/drivers/platform/x86/intel/plr_tpmi.c b/drivers/platform/x86/i= ntel/plr_tpmi.c index 2b55347a5a93..58132da47745 100644 --- a/drivers/platform/x86/intel/plr_tpmi.c +++ b/drivers/platform/x86/intel/plr_tpmi.c @@ -14,6 +14,7 @@ #include #include #include +#include #include #include #include @@ -256,7 +257,7 @@ DEFINE_SHOW_STORE_ATTRIBUTE(plr_status); =20 static int intel_plr_probe(struct auxiliary_device *auxdev, const struct a= uxiliary_device_id *id) { - struct intel_tpmi_plat_info *plat_info; + struct oobmsm_plat_info *plat_info; struct dentry *dentry; int i, num_resources; struct resource *res; diff --git a/drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c b/= drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c index 9978cdd19851..875afa6835cd 100644 --- a/drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c +++ b/drivers/platform/x86/intel/speed_select_if/isst_tpmi_core.c @@ -22,6 +22,7 @@ #include #include #include +#include #include #include #include @@ -1446,7 +1447,7 @@ int tpmi_sst_dev_add(struct auxiliary_device *auxdev) { struct tpmi_per_power_domain_info *pd_info; bool read_blocked =3D 0, write_blocked =3D 0; - struct intel_tpmi_plat_info *plat_info; + struct oobmsm_plat_info *plat_info; struct device *dev =3D &auxdev->dev; struct tpmi_sst_struct *tpmi_sst; u8 i, num_resources, io_die_cnt; @@ -1598,7 +1599,7 @@ EXPORT_SYMBOL_NS_GPL(tpmi_sst_dev_add, "INTEL_TPMI_SS= T"); void tpmi_sst_dev_remove(struct auxiliary_device *auxdev) { struct tpmi_sst_struct *tpmi_sst =3D auxiliary_get_drvdata(auxdev); - struct intel_tpmi_plat_info *plat_info; + struct oobmsm_plat_info *plat_info; =20 plat_info =3D tpmi_get_platform_data(auxdev); if (!plat_info) @@ -1620,7 +1621,7 @@ void tpmi_sst_dev_suspend(struct auxiliary_device *au= xdev) { struct tpmi_sst_struct *tpmi_sst =3D auxiliary_get_drvdata(auxdev); struct tpmi_per_power_domain_info *power_domain_info; - struct intel_tpmi_plat_info *plat_info; + struct oobmsm_plat_info *plat_info; void __iomem *cp_base; =20 plat_info =3D tpmi_get_platform_data(auxdev); @@ -1648,7 +1649,7 @@ void tpmi_sst_dev_resume(struct auxiliary_device *aux= dev) { struct tpmi_sst_struct *tpmi_sst =3D auxiliary_get_drvdata(auxdev); struct tpmi_per_power_domain_info *power_domain_info; - struct intel_tpmi_plat_info *plat_info; + struct oobmsm_plat_info *plat_info; void __iomem *cp_base; =20 plat_info =3D tpmi_get_platform_data(auxdev); diff --git a/drivers/platform/x86/intel/uncore-frequency/uncore-frequency-t= pmi.c b/drivers/platform/x86/intel/uncore-frequency/uncore-frequency-tpmi.c index 4aa6c227ec82..23a86feb12ef 100644 --- a/drivers/platform/x86/intel/uncore-frequency/uncore-frequency-tpmi.c +++ b/drivers/platform/x86/intel/uncore-frequency/uncore-frequency-tpmi.c @@ -22,9 +22,10 @@ #include #include #include +#include +#include #include #include -#include =20 #include "uncore-frequency-common.h" =20 @@ -421,7 +422,7 @@ static void remove_cluster_entries(struct tpmi_uncore_s= truct *tpmi_uncore) static int uncore_probe(struct auxiliary_device *auxdev, const struct auxi= liary_device_id *id) { bool read_blocked =3D 0, write_blocked =3D 0; - struct intel_tpmi_plat_info *plat_info; + struct oobmsm_plat_info *plat_info; struct tpmi_uncore_struct *tpmi_uncore; bool uncore_sysfs_added =3D false; int ret, i, pkg =3D 0; diff --git a/drivers/platform/x86/intel/vsec_tpmi.c b/drivers/platform/x86/= intel/vsec_tpmi.c index 5c383a27bbe8..d95a0d994546 100644 --- a/drivers/platform/x86/intel/vsec_tpmi.c +++ b/drivers/platform/x86/intel/vsec_tpmi.c @@ -116,7 +116,7 @@ struct intel_tpmi_info { struct intel_vsec_device *vsec_dev; int feature_count; u64 pfs_start; - struct intel_tpmi_plat_info plat_info; + struct oobmsm_plat_info plat_info; void __iomem *tpmi_control_mem; struct dentry *dbgfs_dir; }; @@ -187,7 +187,7 @@ struct tpmi_feature_state { /* Used during auxbus device creation */ static DEFINE_IDA(intel_vsec_tpmi_ida); =20 -struct intel_tpmi_plat_info *tpmi_get_platform_data(struct auxiliary_devic= e *auxdev) +struct oobmsm_plat_info *tpmi_get_platform_data(struct auxiliary_device *a= uxdev) { struct intel_vsec_device *vsec_dev =3D auxdev_to_ivdev(auxdev); =20 diff --git a/drivers/powercap/intel_rapl_tpmi.c b/drivers/powercap/intel_ra= pl_tpmi.c index af2368f4db10..82201bf4685d 100644 --- a/drivers/powercap/intel_rapl_tpmi.c +++ b/drivers/powercap/intel_rapl_tpmi.c @@ -9,9 +9,10 @@ #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt =20 #include -#include -#include #include +#include +#include +#include #include #include =20 @@ -48,7 +49,7 @@ enum tpmi_rapl_register { =20 struct tpmi_rapl_package { struct rapl_if_priv priv; - struct intel_tpmi_plat_info *tpmi_info; + struct oobmsm_plat_info *tpmi_info; struct rapl_package *rp; void __iomem *base; struct list_head node; @@ -253,7 +254,7 @@ static int intel_rapl_tpmi_probe(struct auxiliary_devic= e *auxdev, const struct auxiliary_device_id *id) { struct tpmi_rapl_package *trp; - struct intel_tpmi_plat_info *info; + struct oobmsm_plat_info *info; struct resource *res; u32 offset; int ret; diff --git a/include/linux/intel_tpmi.h b/include/linux/intel_tpmi.h index ff480b47ae64..d1fe2469b0a4 100644 --- a/include/linux/intel_tpmi.h +++ b/include/linux/intel_tpmi.h @@ -7,6 +7,7 @@ #define _INTEL_TPMI_H_ =20 #include +struct oobmsm_plat_info; =20 #define TPMI_VERSION_INVALID 0xff #define TPMI_MINOR_VERSION(val) FIELD_GET(GENMASK(4, 0), val) @@ -26,30 +27,7 @@ enum intel_tpmi_id { TPMI_INFO_ID =3D 0x81, /* Special ID for PCI BDF and Package ID informati= on */ }; =20 -/** - * struct intel_tpmi_plat_info - Platform information for a TPMI device in= stance - * @cdie_mask: Mask of all compute dies in the partition - * @package_id: CPU Package id - * @partition: Package partition id when multiple VSEC PCI devices p= er package - * @segment: PCI segment ID - * @bus_number: PCI bus number - * @device_number: PCI device number - * @function_number: PCI function number - * - * Structure to store platform data for a TPMI device instance. This - * struct is used to return data via tpmi_get_platform_data(). - */ -struct intel_tpmi_plat_info { - u16 cdie_mask; - u8 package_id; - u8 partition; - u8 segment; - u8 bus_number; - u8 device_number; - u8 function_number; -}; - -struct intel_tpmi_plat_info *tpmi_get_platform_data(struct auxiliary_devic= e *auxdev); +struct oobmsm_plat_info *tpmi_get_platform_data(struct auxiliary_device *a= uxdev); struct resource *tpmi_get_resource_at_index(struct auxiliary_device *auxde= v, int index); int tpmi_get_resource_count(struct auxiliary_device *auxdev); int tpmi_get_feature_status(struct auxiliary_device *auxdev, int feature_i= d, bool *read_blocked, diff --git a/include/linux/intel_vsec.h b/include/linux/intel_vsec.h index a07796d7d43b..cd78d0b2e623 100644 --- a/include/linux/intel_vsec.h +++ b/include/linux/intel_vsec.h @@ -144,6 +144,28 @@ struct intel_vsec_device { unsigned long cap_id; }; =20 +/** + * struct oobmsm_plat_info - Platform information for a device instance + * @cdie_mask: Mask of all compute dies in the partition + * @package_id: CPU Package id + * @partition: Package partition id when multiple VSEC PCI devices p= er package + * @segment: PCI segment ID + * @bus_number: PCI bus number + * @device_number: PCI device number + * @function_number: PCI function number + * + * Structure to store platform data for a OOBMSM device instance. + */ +struct oobmsm_plat_info { + u16 cdie_mask; + u8 package_id; + u8 partition; + u8 segment; + u8 bus_number; + u8 device_number; + u8 function_number; +}; + int intel_vsec_add_aux(struct pci_dev *pdev, struct device *parent, struct intel_vsec_device *intel_vsec_dev, const char *name); --=20 2.43.0 From nobody Sat Feb 7 18:43:37 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C65A72D2687; Wed, 30 Apr 2025 21:21:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.8 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746048086; cv=none; b=LnmAOAdNvo2LzEBxCmGXbD37n9Vu9CjHikM2HUlcp44C9cjJDWG6JC+B89kzS4eZtJatyEJOAYGPo9Tja2qHUcXfrVYhTS5qVGTFOpeA2EzfT9OeDRQ3XOg4QISPP/+feijc4tkpnu+4Cxshm1M6UFmu8uP1DnV8cRdN82mPk/U= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746048086; c=relaxed/simple; bh=biM2KwZXhRd3Jnu8i2FWmq2vjFBr9n7dovXYw1BViGU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=SiQIkytvg29behsHh+jc+XIqrWncZbhFK9ZeM+hQ5HDt43ewUqhkyUnRBwRqVvoXCrSlaKZHpCoYPBUPfgoqJQgLccg6HY360+8Ev6+qHKO5bpgwNUmaui23rKnakY7KR28oMhIaxCAuc++Zb9FgVV6lUS+WKtXwsruX47+S2H4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=J8iML6UI; arc=none smtp.client-ip=192.198.163.8 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="J8iML6UI" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1746048085; x=1777584085; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=biM2KwZXhRd3Jnu8i2FWmq2vjFBr9n7dovXYw1BViGU=; b=J8iML6UI+NTtd1QjOs7nrUPD+MnA0aN5UjVCPc2LRVPXG3aFGpd88LZ8 F5ZfiPzXuHXHclmfHohXlLbBvMSLdOhHH+46Obnf3VYfhEJ9JKPbsfSlU gm/HLQVme1FHh2Hiy2KaZNP/H1G2EEAUFEJSZN1k/+/HC7migbuK5KgNn zA500WmuXORMIdZvKYgQTISzykavxzt7iDyeIQV1M0IZ7HXTqOaY49Sgj KPIdaJuq71G2aL0hC8o3FQ1/JHBNFdnlBo7DkJ9M2zUXKBqlVLAj8keEK orTvW6ODnLCK6m2wUtTY01k+Fnw2ha3oIb0qmQzxQCfwjcf6pcUIf4vfv A==; X-CSE-ConnectionGUID: 75yQ5gm4STyGmHPu0Yklnw== X-CSE-MsgGUID: xxWUA7T/ReG3+jfKSERlpw== X-IronPort-AV: E=McAfee;i="6700,10204,11419"; a="65257551" X-IronPort-AV: E=Sophos;i="6.15,252,1739865600"; d="scan'208";a="65257551" Received: from orviesa009.jf.intel.com ([10.64.159.149]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Apr 2025 14:21:17 -0700 X-CSE-ConnectionGUID: D/Km7aaATP+jwEjwYqddxQ== X-CSE-MsgGUID: nEoJkaoATCWuEJ/lDqgxeA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.15,252,1739865600"; d="scan'208";a="133972303" Received: from agladkov-desk.ger.corp.intel.com (HELO debox1-desk4.lan) ([10.125.110.57]) by orviesa009-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Apr 2025 14:21:17 -0700 From: "David E. Box" To: linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org, david.e.box@linux.intel.com, srinivas.pandruvada@linux.intel.com, andriy.shevchenko@linux.intel.com, ilpo.jarvinen@linux.intel.com, tony.luck@intel.com, xi.pardee@linux.intel.com Cc: hdegoede@redhat.com Subject: [PATCH 11/15] platform/x86/intel/vsec: Set OOBMSM to CPU mapping Date: Wed, 30 Apr 2025 14:21:00 -0700 Message-ID: <20250430212106.369208-12-david.e.box@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250430212106.369208-1-david.e.box@linux.intel.com> References: <20250430212106.369208-1-david.e.box@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add functions, intel_vsec_set/get_mapping(), to set and retrieve the OOBMSM-to-CPU mapping data in the private data of the parent Intel VSEC driver. With this mapping information available, other Intel VSEC features on the same OOBMSM device can easily access and use the mapping data, allowing each of the OOBMSM features to map to the CPUs they provides data for. Signed-off-by: David E. Box Tested-by: Tony Luck --- drivers/platform/x86/intel/vsec.c | 31 +++++++++++++++++++++++++++++++ include/linux/intel_vsec.h | 14 ++++++++++++++ 2 files changed, 45 insertions(+) diff --git a/drivers/platform/x86/intel/vsec.c b/drivers/platform/x86/intel= /vsec.c index e3ec17a53e62..989d79d71db1 100644 --- a/drivers/platform/x86/intel/vsec.c +++ b/drivers/platform/x86/intel/vsec.c @@ -43,6 +43,7 @@ enum vsec_device_state { struct vsec_priv { struct intel_vsec_platform_info *info; struct device *suppliers[VSEC_FEATURE_COUNT]; + struct oobmsm_plat_info plat_info; enum vsec_device_state state[VSEC_FEATURE_COUNT]; unsigned long found_caps; }; @@ -661,6 +662,36 @@ static int intel_vsec_pci_probe(struct pci_dev *pdev, = const struct pci_device_id return 0; } =20 +int intel_vsec_set_mapping(struct oobmsm_plat_info *plat_info, + struct intel_vsec_device *vsec_dev) +{ + struct vsec_priv *priv; + + priv =3D pci_get_drvdata(vsec_dev->pcidev); + if (!priv) + return -EINVAL; + + priv->plat_info =3D *plat_info; + + return 0; +} +EXPORT_SYMBOL_NS_GPL(intel_vsec_set_mapping, "INTEL_VSEC"); + +struct oobmsm_plat_info *intel_vsec_get_mapping(struct pci_dev *pdev) +{ + struct vsec_priv *priv; + + if (!pci_match_id(intel_vsec_pci_ids, pdev)) + return ERR_PTR(-EINVAL); + + priv =3D pci_get_drvdata(pdev); + if (!priv) + return ERR_PTR(-EINVAL); + + return &priv->plat_info; +} +EXPORT_SYMBOL_NS_GPL(intel_vsec_get_mapping, "INTEL_VSEC"); + /* DG1 info */ static struct intel_vsec_header dg1_header =3D { .length =3D 0x10, diff --git a/include/linux/intel_vsec.h b/include/linux/intel_vsec.h index cd78d0b2e623..b15155ff1154 100644 --- a/include/linux/intel_vsec.h +++ b/include/linux/intel_vsec.h @@ -170,6 +170,8 @@ int intel_vsec_add_aux(struct pci_dev *pdev, struct dev= ice *parent, struct intel_vsec_device *intel_vsec_dev, const char *name); =20 +int intel_vsec_suppliers_ready(struct intel_vsec_device *vsec_dev, + unsigned long needs); static inline struct intel_vsec_device *dev_to_ivdev(struct device *dev) { return container_of(dev, struct intel_vsec_device, auxdev.dev); @@ -183,11 +185,23 @@ static inline struct intel_vsec_device *auxdev_to_ivd= ev(struct auxiliary_device #if IS_ENABLED(CONFIG_INTEL_VSEC) int intel_vsec_register(struct pci_dev *pdev, struct intel_vsec_platform_info *info); +int intel_vsec_set_mapping(struct oobmsm_plat_info *plat_info, + struct intel_vsec_device *vsec_dev); +struct oobmsm_plat_info *intel_vsec_get_mapping(struct pci_dev *pdev); #else static inline int intel_vsec_register(struct pci_dev *pdev, struct intel_vsec_platform_info *info) { return -ENODEV; } +static inline int intel_vsec_set_mapping(struct oobmsm_plat_info *plat_inf= o, + struct intel_vsec_device *vsec_dev) +{ + return -ENODEV; +} +static inline struct oobmsm_plat_info *intel_vsec_get_mapping(struct pci_d= ev *pdev) +{ + return ERR_PTR(-ENODEV); +} #endif #endif --=20 2.43.0 From nobody Sat Feb 7 18:43:37 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 83F102D26A7; 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X-CSE-ConnectionGUID: C81cbS+ZR2CL/mRdHRXbpg== X-CSE-MsgGUID: UlhSmIbRSUqoBC345aIBow== X-IronPort-AV: E=McAfee;i="6700,10204,11419"; a="65257554" X-IronPort-AV: E=Sophos;i="6.15,252,1739865600"; d="scan'208";a="65257554" Received: from orviesa009.jf.intel.com ([10.64.159.149]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Apr 2025 14:21:17 -0700 X-CSE-ConnectionGUID: 5MGd9Q07Roy4jM2qZcL1fw== X-CSE-MsgGUID: 34+dsDeQQkiBOHlRCGOIgA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.15,252,1739865600"; d="scan'208";a="133972306" Received: from agladkov-desk.ger.corp.intel.com (HELO debox1-desk4.lan) ([10.125.110.57]) by orviesa009-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Apr 2025 14:21:17 -0700 From: "David E. Box" To: linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org, david.e.box@linux.intel.com, srinivas.pandruvada@linux.intel.com, andriy.shevchenko@linux.intel.com, ilpo.jarvinen@linux.intel.com, tony.luck@intel.com, xi.pardee@linux.intel.com Cc: hdegoede@redhat.com Subject: [PATCH 12/15] platform/x86/intel/tpmi: Get OOBMSM CPU mapping from TPMI Date: Wed, 30 Apr 2025 14:21:01 -0700 Message-ID: <20250430212106.369208-13-david.e.box@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250430212106.369208-1-david.e.box@linux.intel.com> References: <20250430212106.369208-1-david.e.box@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Copy TPMI=E2=80=99s OOBMSM platform info into a common area within VSEC pri= vate data via intel_vsec_set_mapping(). This enables other Intel VSEC features to access the CPU mapping without additional queries. Additionally, designate the TPMI driver as a supplier for the Telemetry driver, ensuring it can obtain the necessary platform information for future feature extensions. Signed-off-by: David E. Box Tested-by: Tony Luck --- drivers/platform/x86/intel/vsec.c | 2 +- drivers/platform/x86/intel/vsec_tpmi.c | 4 ++++ 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/drivers/platform/x86/intel/vsec.c b/drivers/platform/x86/intel= /vsec.c index 989d79d71db1..151f87fe928d 100644 --- a/drivers/platform/x86/intel/vsec.c +++ b/drivers/platform/x86/intel/vsec.c @@ -721,7 +721,7 @@ static const struct intel_vsec_platform_info mtl_info = =3D { static const struct vsec_feature_dependency oobmsm_deps[] =3D { { .feature =3D VSEC_CAP_TELEMETRY, - .supplier_bitmap =3D VSEC_CAP_DISCOVERY + .supplier_bitmap =3D VSEC_CAP_DISCOVERY | VSEC_CAP_TPMI, }, }; =20 diff --git a/drivers/platform/x86/intel/vsec_tpmi.c b/drivers/platform/x86/= intel/vsec_tpmi.c index d95a0d994546..7748b5557a18 100644 --- a/drivers/platform/x86/intel/vsec_tpmi.c +++ b/drivers/platform/x86/intel/vsec_tpmi.c @@ -799,6 +799,10 @@ static int intel_vsec_tpmi_init(struct auxiliary_devic= e *auxdev) ret =3D tpmi_process_info(tpmi_info, pfs); if (ret) return ret; + + ret =3D intel_vsec_set_mapping(&tpmi_info->plat_info, vsec_dev); + if (ret) + return ret; } =20 if (pfs->pfs_header.tpmi_id =3D=3D TPMI_CONTROL_ID) --=20 2.43.0 From nobody Sat Feb 7 18:43:37 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E1E2C2D26BA; Wed, 30 Apr 2025 21:21:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.8 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746048087; cv=none; b=aKIf1CR74sKugySSvwj/I6ln1Cd4A6DxZa78mpDT2mcBlDHpEy/wwLwN8hpXPgQ4SF6qlgvR/2Zx+WgVHg5yfHjjNIDCewsgZ57fiW6BbPJH7EMi+VqxgOG93FAahFaH6h5WJZ8hDR5AiYKawqQgV8PcnLIpk/SihmC13oY3sOI= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746048087; c=relaxed/simple; bh=hlhiJKH7Iq/LRzTZtmpQkDUN4Gvdy/F2RT/YcQ7xsco=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=u7D1iqjGa/zzSBgSx2mMywsdvTspCAtRgpJc7syTun8zIzo4MKIvSIFEhiq2EtW5UaGeYSoDDYLtdMRUkWKDIedUCKpxHy2Hnf5Ov3Py+BKb5iMa8MhJft184935xX3BM9wFlh4prwhZ3RZQaOc/UvwKjMRde1jSnf6QxDDNFA0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=SLGqz5Ai; arc=none smtp.client-ip=192.198.163.8 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="SLGqz5Ai" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1746048086; x=1777584086; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=hlhiJKH7Iq/LRzTZtmpQkDUN4Gvdy/F2RT/YcQ7xsco=; b=SLGqz5AiUA78GZORkbFc5EBRtkfEg4slpNrg2bev5TtqP47rwp4hpGO3 NiU8t/CypcFLRzwmojn/jzFEXwG7Yj5bRxFxuTefMeu/mZgtVq10MSCFH Zf1MMGAkyuEfOklKtWj3nbCyRNPSP1pNxpd0Flj0K4r9qRtoFd//7zqTt Bs3HDQsBHTcvO/XN8BHJrWgHQ8bZYlYhps9BoKAg6dt5noPkrY34cVgik +sKAMsoxEPNbXM4zh8leTs6WUCfQkbb0F/qN5r7OgqXaR1lciI8p6TXv3 ofVuz8DQ9Q6wgKF+PJYokbRnyIdOmCFFCdI0ejlpahhCsLUjXuJLgG+dD A==; X-CSE-ConnectionGUID: rggbRnE8TIGPQc3V6WUOpA== X-CSE-MsgGUID: 6pLroSSVSsS9K/Fe12Zx3g== X-IronPort-AV: E=McAfee;i="6700,10204,11419"; a="65257556" X-IronPort-AV: E=Sophos;i="6.15,252,1739865600"; d="scan'208";a="65257556" Received: from orviesa009.jf.intel.com ([10.64.159.149]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Apr 2025 14:21:17 -0700 X-CSE-ConnectionGUID: +U8L+60nQDO+RS4zsFyvXQ== X-CSE-MsgGUID: FY0Xf6LeSz+yJfN3vNoAPA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.15,252,1739865600"; d="scan'208";a="133972309" Received: from agladkov-desk.ger.corp.intel.com (HELO debox1-desk4.lan) ([10.125.110.57]) by orviesa009-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Apr 2025 14:21:17 -0700 From: "David E. Box" To: linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org, david.e.box@linux.intel.com, srinivas.pandruvada@linux.intel.com, andriy.shevchenko@linux.intel.com, ilpo.jarvinen@linux.intel.com, tony.luck@intel.com, xi.pardee@linux.intel.com Cc: hdegoede@redhat.com Subject: [PATCH 13/15] platform/x86/intel/pmt/discovery: Get telemetry attributes Date: Wed, 30 Apr 2025 14:21:02 -0700 Message-ID: <20250430212106.369208-14-david.e.box@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250430212106.369208-1-david.e.box@linux.intel.com> References: <20250430212106.369208-1-david.e.box@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add intel_pmt_get_features() in PMT Discovery to enable the PMT Telemetry driver to obtain attributes of the aggregated telemetry spaces it enumerates. The function gathers feature flags and associated data (like the number of RMIDs) from each PMT entry, laying the groundwork for a future kernel interface that will allow direct access to telemetry regions based on their capabilities. Signed-off-by: David E. Box Tested-by: Tony Luck --- drivers/platform/x86/intel/pmt/Kconfig | 1 + drivers/platform/x86/intel/pmt/class.h | 7 +++++ drivers/platform/x86/intel/pmt/discovery.c | 33 ++++++++++++++++++++++ drivers/platform/x86/intel/pmt/telemetry.c | 5 ++++ include/linux/intel_vsec.h | 16 +++++++++++ 5 files changed, 62 insertions(+) diff --git a/drivers/platform/x86/intel/pmt/Kconfig b/drivers/platform/x86/= intel/pmt/Kconfig index 0ad91b5112e9..83ae17eab462 100644 --- a/drivers/platform/x86/intel/pmt/Kconfig +++ b/drivers/platform/x86/intel/pmt/Kconfig @@ -18,6 +18,7 @@ config INTEL_PMT_CLASS config INTEL_PMT_TELEMETRY tristate "Intel Platform Monitoring Technology (PMT) Telemetry driver" depends on INTEL_VSEC + select INTEL_PMT_DISCOVERY select INTEL_PMT_CLASS help The Intel Platform Monitory Technology (PMT) Telemetry driver provides diff --git a/drivers/platform/x86/intel/pmt/class.h b/drivers/platform/x86/= intel/pmt/class.h index ba276231ce74..e337f19b95d6 100644 --- a/drivers/platform/x86/intel/pmt/class.h +++ b/drivers/platform/x86/intel/pmt/class.h @@ -48,6 +48,7 @@ struct intel_pmt_entry { struct pmt_callbacks *cb; unsigned long base_addr; size_t size; + u64 feature_flags; u32 guid; u32 num_rmids; int devid; @@ -71,4 +72,10 @@ int intel_pmt_dev_create(struct intel_pmt_entry *entry, struct intel_vsec_device *dev, int idx); void intel_pmt_dev_destroy(struct intel_pmt_entry *entry, struct intel_pmt_namespace *ns); +#if IS_ENABLED(CONFIG_INTEL_PMT_DISCOVERY) +void intel_pmt_get_features(struct intel_pmt_entry *entry); +#else +static inline void intel_pmt_get_features(struct intel_pmt_entry *entry) {} +#endif + #endif diff --git a/drivers/platform/x86/intel/pmt/discovery.c b/drivers/platform/= x86/intel/pmt/discovery.c index 8124a5bcbb12..39df65a795eb 100644 --- a/drivers/platform/x86/intel/pmt/discovery.c +++ b/drivers/platform/x86/intel/pmt/discovery.c @@ -581,6 +581,39 @@ static int pmt_features_probe(struct auxiliary_device = *auxdev, const struct auxi return ret; } =20 +static void pmt_get_features(struct intel_pmt_entry *entry, struct feature= *f) +{ + int num_guids =3D f->table.header.num_guids; + int i; + + for (i =3D 0; i < num_guids; i++) { + if (f->table.guids[i] !=3D entry->guid) + continue; + + entry->feature_flags |=3D BIT(f->id); + + if (feature_layout[f->id] =3D=3D LAYOUT_RMID) + entry->num_rmids =3D f->table.rmid.num_rmids; + else + entry->num_rmids =3D 0; /* entry is kzalloc but set anyway */ + } +} + +void intel_pmt_get_features(struct intel_pmt_entry *entry) +{ + struct feature *feature; + + mutex_lock(&feature_list_lock); + list_for_each_entry(feature, &pmt_feature_list, list) { + if (feature->priv->parent !=3D &entry->ep->pcidev->dev) + continue; + + pmt_get_features(entry, feature); + } + mutex_unlock(&feature_list_lock); +} +EXPORT_SYMBOL_NS_GPL(intel_pmt_get_features, "INTEL_PMT"); + static const struct auxiliary_device_id pmt_features_id_table[] =3D { { .name =3D "intel_vsec.discovery" }, {} diff --git a/drivers/platform/x86/intel/pmt/telemetry.c b/drivers/platform/= x86/intel/pmt/telemetry.c index ac3a9bdf5601..58d06749e417 100644 --- a/drivers/platform/x86/intel/pmt/telemetry.c +++ b/drivers/platform/x86/intel/pmt/telemetry.c @@ -9,11 +9,14 @@ */ =20 #include +#include #include #include +#include #include #include #include +#include #include #include =20 @@ -311,6 +314,8 @@ static int pmt_telem_probe(struct auxiliary_device *aux= dev, const struct auxilia continue; =20 priv->num_entries++; + + intel_pmt_get_features(entry); } =20 return 0; diff --git a/include/linux/intel_vsec.h b/include/linux/intel_vsec.h index b15155ff1154..f63e67398a8e 100644 --- a/include/linux/intel_vsec.h +++ b/include/linux/intel_vsec.h @@ -4,6 +4,7 @@ =20 #include #include +#include =20 /* * VSEC_CAP_UNUSED is reserved. It exists to prevent zero initialized @@ -166,6 +167,21 @@ struct oobmsm_plat_info { u8 function_number; }; =20 +struct telemetry_region { + struct oobmsm_plat_info plat_info; + void __iomem *addr; + size_t size; + u32 guid; + u32 num_rmids; +}; + +struct pmt_feature_group { + enum pmt_feature_id id; + int count; + struct kref kref; + struct telemetry_region regions[]; +}; + int intel_vsec_add_aux(struct pci_dev *pdev, struct device *parent, struct intel_vsec_device *intel_vsec_dev, const char *name); --=20 2.43.0 From nobody Sat Feb 7 18:43:37 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D47FD2D29D1; Wed, 30 Apr 2025 21:21:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.8 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746048088; cv=none; b=pi2rMfzsHa8oTgjRShGnqO9xRXfEUWFMRpBtJTA7v5qdkmZSSZxxP4vQjxwoWYhIIpIUa+dF25QP7v2nx8vLOvMKAaJTYSzZPzlJoYCWSPDanfnFkYVsXrBgsHjjp8PLGtefI0bliH7QTA0z/+A5u4+PEx52birTzgIxiZpE0NQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746048088; c=relaxed/simple; bh=S7X9Lo3bhqlfGZaVzZxaMlrW5Z1rfRp6vKl8cRpde1M=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=EEgooUM8KbrsjuO27unHp2xZQAEYEHEsNcm47wlhqV/ws7xxp5jZelwxQZOoep7fo07CTg3yNK2u4z8BJmrIp28MOFXsfIPcfbRzw7umCfBvNLXStMQsjGyfebMsJqGC+2EyR8vsX6Og2e/qT04CylCj9ye3YcY37DmX83jNZQc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=E7577Lwv; arc=none smtp.client-ip=192.198.163.8 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="E7577Lwv" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1746048087; x=1777584087; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=S7X9Lo3bhqlfGZaVzZxaMlrW5Z1rfRp6vKl8cRpde1M=; b=E7577LwvtiK5u7SXt8CaNEvUdJIHwCF9kRN8JgERpGaUytVAxR2Y6DB6 IVecKIdAbe8ZOmH0kaC6rY73AwGlGWZCb1iT0AISeZcI8vHlIuyKsZmP1 pINtkMwa8cO1ZdqekuAyyNssqV+Qv67H2UHewPUlmLoRsHruaVTLHAXZo QJmeaEAznA7d+Ie5XllTo+As2tTPpvqAmTRQ1FejEuovFk6usNWGp0KMS 0cxv9ZgeTMCHqFq/Q5WCvhTMIZymV+c/WDCeTbRtlMVxZBuQEdJLfGw5e 0twMCgahwD/lwwkZIPPJAyFoVIpG4Y3o7TJdvnXfmGkGgXtDYJ5IdgQBu g==; X-CSE-ConnectionGUID: Cp0I3vPVRgqVJZU4dSbCfg== X-CSE-MsgGUID: i1lwGtHFTy20BTORVbFUxw== X-IronPort-AV: E=McAfee;i="6700,10204,11419"; a="65257558" X-IronPort-AV: E=Sophos;i="6.15,252,1739865600"; d="scan'208";a="65257558" Received: from orviesa009.jf.intel.com ([10.64.159.149]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Apr 2025 14:21:18 -0700 X-CSE-ConnectionGUID: XG/RkU3qR+G5up4fyTFQAQ== X-CSE-MsgGUID: rutZkDxrTG+Md5jx7DReKA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.15,252,1739865600"; d="scan'208";a="133972313" Received: from agladkov-desk.ger.corp.intel.com (HELO debox1-desk4.lan) ([10.125.110.57]) by orviesa009-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Apr 2025 14:21:18 -0700 From: "David E. Box" To: linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org, david.e.box@linux.intel.com, srinivas.pandruvada@linux.intel.com, andriy.shevchenko@linux.intel.com, ilpo.jarvinen@linux.intel.com, tony.luck@intel.com, xi.pardee@linux.intel.com Cc: hdegoede@redhat.com Subject: [PATCH 14/15] platform/x86/intel/pmt/telemetry: Add API to retrieve telemetry regions by feature Date: Wed, 30 Apr 2025 14:21:03 -0700 Message-ID: <20250430212106.369208-15-david.e.box@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250430212106.369208-1-david.e.box@linux.intel.com> References: <20250430212106.369208-1-david.e.box@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Introduce a new API, intel_pmt_get_regions_by_feature(), that gathers telemetry regions based on a provided capability flag. This API enables retrieval of regions with various capabilities (for example, RMID-based telemetry) and provides a unified interface for accessing them. Resource management is handled via reference counting using intel_pmt_put_feature_group(). Signed-off-by: David E. Box Tested-by: Tony Luck --- drivers/platform/x86/intel/pmt/telemetry.c | 89 +++++++++++++++++++++- include/linux/intel_vsec.h | 15 ++++ 2 files changed, 103 insertions(+), 1 deletion(-) diff --git a/drivers/platform/x86/intel/pmt/telemetry.c b/drivers/platform/= x86/intel/pmt/telemetry.c index 58d06749e417..d071dca4a689 100644 --- a/drivers/platform/x86/intel/pmt/telemetry.c +++ b/drivers/platform/x86/intel/pmt/telemetry.c @@ -9,16 +9,20 @@ */ =20 #include +#include +#include #include #include #include #include #include +#include +#include #include #include #include #include -#include +#include =20 #include "class.h" =20 @@ -209,6 +213,88 @@ int pmt_telem_get_endpoint_info(int devid, struct tele= m_endpoint_info *info) } EXPORT_SYMBOL_NS_GPL(pmt_telem_get_endpoint_info, "INTEL_PMT_TELEMETRY"); =20 +static int pmt_copy_region(struct telemetry_region *region, + struct intel_pmt_entry *entry) +{ + + struct oobmsm_plat_info *plat_info; + + plat_info =3D intel_vsec_get_mapping(entry->ep->pcidev); + if (IS_ERR(plat_info)) + return PTR_ERR(plat_info); + + region->plat_info =3D *plat_info; + region->guid =3D entry->guid; + region->addr =3D entry->ep->base; + region->size =3D entry->size; + region->num_rmids =3D entry->num_rmids; + + return 0; +} + +static void pmt_feature_group_release(struct kref *kref) +{ + struct pmt_feature_group *feature_group; + + feature_group =3D container_of(kref, struct pmt_feature_group, kref); + kfree(feature_group); +} + +struct pmt_feature_group *intel_pmt_get_regions_by_feature(enum pmt_featur= e_id id) +{ + struct pmt_feature_group *feature_group; + struct telemetry_region *region; + struct intel_pmt_entry *entry; + unsigned long idx; + int count =3D 0; + size_t size; + + if (!pmt_feature_id_is_valid(id)) + return ERR_PTR(-EINVAL); + + guard(mutex)(&ep_lock); + xa_for_each(&telem_array, idx, entry) { + if (entry->feature_flags & BIT(id)) + count++; + } + + if (!count) + return ERR_PTR(-ENOENT); + + size =3D struct_size(feature_group, regions, count); + feature_group =3D kzalloc(size, GFP_KERNEL); + if (!feature_group) + return ERR_PTR(-ENOMEM); + + feature_group->count =3D count; + + region =3D feature_group->regions; + xa_for_each(&telem_array, idx, entry) { + int ret; + + if (!(entry->feature_flags & BIT(id))) + continue; + + ret =3D pmt_copy_region(region, entry); + if (ret) { + kfree(feature_group); + return ERR_PTR(ret); + } + region++; + } + + kref_init(&feature_group->kref); + + return feature_group; +} +EXPORT_SYMBOL(intel_pmt_get_regions_by_feature); + +void intel_pmt_put_feature_group(struct pmt_feature_group *feature_group) +{ + kref_put(&feature_group->kref, pmt_feature_group_release); +} +EXPORT_SYMBOL(intel_pmt_put_feature_group); + int pmt_telem_read(struct telem_endpoint *ep, u32 id, u64 *data, u32 count) { u32 offset, size; @@ -353,3 +439,4 @@ MODULE_AUTHOR("David E. Box "); MODULE_DESCRIPTION("Intel PMT Telemetry driver"); MODULE_LICENSE("GPL v2"); MODULE_IMPORT_NS("INTEL_PMT"); +MODULE_IMPORT_NS("INTEL_VSEC"); diff --git a/include/linux/intel_vsec.h b/include/linux/intel_vsec.h index f63e67398a8e..f41d2ec974fd 100644 --- a/include/linux/intel_vsec.h +++ b/include/linux/intel_vsec.h @@ -220,4 +220,19 @@ static inline struct oobmsm_plat_info *intel_vsec_get_= mapping(struct pci_dev *pd return ERR_PTR(-ENODEV); } #endif + +#if IS_ENABLED(CONFIG_INTEL_PMT_TELEMETRY) +struct pmt_feature_group * +intel_pmt_get_regions_by_feature(enum pmt_feature_id id); + +void intel_pmt_put_feature_group(struct pmt_feature_group *feature_group); +#else +static inline struct pmt_feature_group * +intel_pmt_get_regions_by_feature(enum pmt_feature_id id) +{ return ERR_PTR(-ENODEV); } + +static inline void +intel_pmt_put_feature_group(struct pmt_feature_group *feature_group) {} +#endif + #endif --=20 2.43.0 From nobody Sat Feb 7 18:43:37 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 93D672D3216; Wed, 30 Apr 2025 21:21:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.8 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746048089; cv=none; b=CnSe6ntOYlsSLdZqZfTuBUwgcWBR18Y1XrgiYiWs1hQBpzgSGYjicNSIx7o/xTxRMLZ1hwh0Eha2wuFpM4pKfiS2HpoXzcj6/yTGtTZcCIVdG89fvsi8oG5lpkl3oqytLnGZSxcg8hypzie7cEjyP6hQ3WhLJ0oWSaA+FS8W94M= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1746048089; c=relaxed/simple; bh=A21ca/LGpPQK4PmvVGaNq/WgOLgChSkAM2Oz5LmXFDU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=aC5q0109avWcANHOuo3q59M/h4gl3U5Gu9oWadgU9ZmQnFADYMx14M66uLnBX3oqjZUhtrm/+i5/aFlFZbtNgUCq2EJfAzRJpro49VTQnUstn5AA2hpPBAWpXCY4SflXeH5lwsMKi0tSIYrAUwUiWW/S0VlWpuSpyfC80tee8qY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=none smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=dy765GrK; arc=none smtp.client-ip=192.198.163.8 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="dy765GrK" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1746048088; x=1777584088; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=A21ca/LGpPQK4PmvVGaNq/WgOLgChSkAM2Oz5LmXFDU=; b=dy765GrKwBdwnJLt63qdmssU0G55fPzc/Cfie2Gz+Y+/LpQU72wVtLBX O7b3RVvPO2gAmPDLIq1csOyGhDmApSNefxkYPIoi+ZQ3n4qO7/YSwvfEc MdlkJUou5eXLxzlV+BhTXkmrDZtf1Lzwl0fW85qQ6QLTAwIQPaWwM4sgc CbkVqQFQmEc93ouPsOsRnXGMrT1mX6eMfHVjLc4AGRCQJrCPz3HufSZUZ 88sL+6zsyBFsXA954ODUWFM/+kYVEKptc7XEYJlTBG298l3UbTJoYrx6O 307/pQCnuXh+mQGAFB85R4ApehrdFdw/hn/X38hEMIS+XXzOKD+yJhvm6 w==; X-CSE-ConnectionGUID: roC0q6RaSk26p/128DA3xw== X-CSE-MsgGUID: 7L3eejtURA+gTc5kydYPTA== X-IronPort-AV: E=McAfee;i="6700,10204,11419"; a="65257560" X-IronPort-AV: E=Sophos;i="6.15,252,1739865600"; d="scan'208";a="65257560" Received: from orviesa009.jf.intel.com ([10.64.159.149]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Apr 2025 14:21:18 -0700 X-CSE-ConnectionGUID: R/4ubYzRS0SXFINeU14TOw== X-CSE-MsgGUID: ez6dfFu9TIq+cTK4lAbKOQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.15,252,1739865600"; d="scan'208";a="133972316" Received: from agladkov-desk.ger.corp.intel.com (HELO debox1-desk4.lan) ([10.125.110.57]) by orviesa009-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 30 Apr 2025 14:21:18 -0700 From: "David E. Box" To: linux-kernel@vger.kernel.org, platform-driver-x86@vger.kernel.org, david.e.box@linux.intel.com, srinivas.pandruvada@linux.intel.com, andriy.shevchenko@linux.intel.com, ilpo.jarvinen@linux.intel.com, tony.luck@intel.com, xi.pardee@linux.intel.com Cc: hdegoede@redhat.com Subject: [PATCH 15/15] platform/x86/intel/pmt: KUNIT test for PMT Enhanced Discovery API Date: Wed, 30 Apr 2025 14:21:04 -0700 Message-ID: <20250430212106.369208-16-david.e.box@linux.intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250430212106.369208-1-david.e.box@linux.intel.com> References: <20250430212106.369208-1-david.e.box@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Adds a KUNIT test for the intel_pmt_get_regions_by_feature() API. Signed-off-by: David E. Box Tested-by: Tony Luck --- drivers/platform/x86/intel/pmt/Kconfig | 14 +++ drivers/platform/x86/intel/pmt/Makefile | 2 + .../platform/x86/intel/pmt/discovery-kunit.c | 116 ++++++++++++++++++ 3 files changed, 132 insertions(+) create mode 100644 drivers/platform/x86/intel/pmt/discovery-kunit.c diff --git a/drivers/platform/x86/intel/pmt/Kconfig b/drivers/platform/x86/= intel/pmt/Kconfig index 83ae17eab462..83e20afc5655 100644 --- a/drivers/platform/x86/intel/pmt/Kconfig +++ b/drivers/platform/x86/intel/pmt/Kconfig @@ -51,3 +51,17 @@ config INTEL_PMT_DISCOVERY =20 To compile this driver as a module, choose M here: the module will be called pmt_discovery. + +config INTEL_PMT_KUNIT_TEST + tristate "KUnit tests for Intel PMT driver" + depends on INTEL_PMT_DISCOVERY + depends on KUNIT + help + Enable this option to compile and run a suite of KUnit tests for the In= tel + Platform Monitoring Technology (PMT) driver. These tests are designed to + validate the driver=E2=80=99s functionality, error handling, and overal= l stability, + helping developers catch regressions and ensure code quality during cha= nges. + + This option is intended for development and testing environments. It is + recommended to disable it in production builds. To compile this driver = as a + module, choose M here: the module will be called pmt-discovery-kunit. diff --git a/drivers/platform/x86/intel/pmt/Makefile b/drivers/platform/x86= /intel/pmt/Makefile index 8aed7e1592e4..47f692c091c9 100644 --- a/drivers/platform/x86/intel/pmt/Makefile +++ b/drivers/platform/x86/intel/pmt/Makefile @@ -12,3 +12,5 @@ obj-$(CONFIG_INTEL_PMT_CRASHLOG) +=3D pmt_crashlog.o pmt_crashlog-y :=3D crashlog.o obj-$(CONFIG_INTEL_PMT_DISCOVERY) +=3D pmt_discovery.o pmt_discovery-y :=3D discovery.o features.o +obj-$(CONFIG_INTEL_PMT_KUNIT_TEST) +=3D pmt-discovery-kunit.o +pmt-discovery-kunit-y :=3D discovery-kunit.o diff --git a/drivers/platform/x86/intel/pmt/discovery-kunit.c b/drivers/pla= tform/x86/intel/pmt/discovery-kunit.c new file mode 100644 index 000000000000..b4493fb96738 --- /dev/null +++ b/drivers/platform/x86/intel/pmt/discovery-kunit.c @@ -0,0 +1,116 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Intel Platform Monitory Technology Discovery KUNIT tests + * + * Copyright (c) 2025, Intel Corporation. + * All Rights Reserved. + */ + +#include +#include +#include +#include +#include +#include + +#define PMT_FEATURE_COUNT (FEATURE_MAX + 1) + +static void +validate_pmt_regions(struct kunit *test, struct pmt_feature_group *feature= _group, int feature_id) +{ + int i; + + kunit_info(test, "Feature ID %d [%s] has %d regions.\n", feature_id, + pmt_feature_names[feature_id], feature_group->count); + + for (i =3D 0; i < feature_group->count; i++) { + struct telemetry_region *region =3D &feature_group->regions[i]; + + kunit_info(test, " - Region %d: cdie_mask=3D%u, package_id=3D%u, partit= ion=3D%u, segment=3D%u,", + i, region->plat_info.cdie_mask, region->plat_info.package_id, + region->plat_info.partition, region->plat_info.segment); + kunit_info(test, "\t\tbus=3D%u, device=3D%u, function=3D%u, guid=3D0x%x,= ", + region->plat_info.bus_number, region->plat_info.device_number, + region->plat_info.function_number, region->guid); + kunit_info(test, "\t\taddr=3D%p, size=3D%lu, num_rmids=3D%u", region->ad= dr, region->size, + region->num_rmids); + + + KUNIT_ASSERT_GE(test, region->plat_info.cdie_mask, 0); + KUNIT_ASSERT_GE(test, region->plat_info.package_id, 0); + KUNIT_ASSERT_GE(test, region->plat_info.partition, 0); + KUNIT_ASSERT_GE(test, region->plat_info.segment, 0); + KUNIT_ASSERT_GE(test, region->plat_info.bus_number, 0); + KUNIT_ASSERT_GE(test, region->plat_info.device_number, 0); + KUNIT_ASSERT_GE(test, region->plat_info.function_number, 0); + + KUNIT_ASSERT_NE(test, region->guid, 0); + + KUNIT_ASSERT_NOT_ERR_OR_NULL(test, (__force const void *)region->addr); + } +} + +static void linebreak(struct kunit *test) +{ + kunit_info(test, "*******************************************************= **********************\n"); +} + +static void test_intel_pmt_get_regions_by_feature(struct kunit *test) +{ + struct pmt_feature_group *feature_group; + int num_available =3D 0; + int feature_id; + + /* Iterate through all possible feature IDs */ + for (feature_id =3D 1; feature_id < PMT_FEATURE_COUNT; feature_id++, line= break(test)) { + const char *name; + + if (!pmt_feature_id_is_valid(feature_id)) + continue; + + name =3D pmt_feature_names[feature_id]; + + feature_group =3D intel_pmt_get_regions_by_feature(feature_id); + if (IS_ERR(feature_group)) { + if (PTR_ERR(feature_group) =3D=3D -ENOENT) + kunit_warn(test, "intel_pmt_get_regions_by_feature() reporting feature= %d [%s] is not present.\n", + feature_id, name); + else + kunit_warn(test, "intel_pmt_get_regions_by_feature() returned error %l= d while attempt to lookup %d [%s].\n", + PTR_ERR(feature_group), feature_id, name); + + continue; + } + + if (!feature_group) { + kunit_warn(test, "Feature ID %d: %s is not available.\n", feature_id, n= ame); + continue; + } + + num_available++; + + validate_pmt_regions(test, feature_group, feature_id); + + intel_pmt_put_feature_group(feature_group); + } + + if (num_available =3D=3D 0) + kunit_warn(test, "No PMT region groups were available for any feature ID= (0-10).\n"); +} + +static struct kunit_case intel_pmt_discovery_test_cases[] =3D { + KUNIT_CASE(test_intel_pmt_get_regions_by_feature), + {} +}; + +static struct kunit_suite intel_pmt_discovery_test_suite =3D { + .name =3D "pmt_discovery_test", + .test_cases =3D intel_pmt_discovery_test_cases, +}; + +kunit_test_suite(intel_pmt_discovery_test_suite); + +MODULE_IMPORT_NS("INTEL_PMT_DISCOVERY"); +MODULE_AUTHOR("David E. Box "); +MODULE_DESCRIPTION("Intel PMT Discovery KUNIT test driver"); +MODULE_LICENSE("GPL"); --=20 2.43.0