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(unknown [10.167.135.44]) by edo.cn.fujitsu.com (Postfix) with ESMTP id 4EB271A0071; Wed, 30 Apr 2025 09:29:17 +0800 (CST) From: Li Zhijian To: linux-cxl@vger.kernel.org Cc: Jonathan Cameron , Dave Jiang , Alison Schofield , Vishal Verma , Ira Weiny , Dan Williams , linux-kernel@vger.kernel.org, Li Zhijian Subject: [RFC PATCH] cxl: Allow reprogramming misconfigured hdm decoders Date: Wed, 30 Apr 2025 09:29:15 +0800 Message-Id: <20250430012915.295136-1-lizhijian@fujitsu.com> X-Mailer: git-send-email 2.31.1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable During kernel booting, CXL drivers will attempt to construct the CXL region according to the pre-programed(firmware provisioning) HDM decoders. This construction process will fail for some reasons, in this case, the userspace cli like ndctl/cxl cannot destroy nor create regions upon the existing decoders. Introuce a new flag CXL_DECODER_F_NEED_RESET tell the driver to reset the decoder during `cxl destroy-region regionN`, so that region can be create again after that. Signed-off-by: Li Zhijian --- Cover letter is here. Hi all, Previously, we encountered a CXL device with differing IG between the device and its USP, which resulted in the driver=E2=80=99s failure to automatically complete the creation of the region, and user cannot create/destroy region after this failure. Although this IG issue has been ignored in the new kernel [1], I realized that if there was an error in firmware provisioning the HDM decoders, the user might not be able to destroy the unfinished region and recreate it. This is because certain components related to this region are in an inconsistent state, preventing the CXL tool from operating on it. This implies that the OS administrator cannot reconfigure the CXL device, which is largely contrary to user expectations. I am keen to hear your thoughts on this matter. A modified QEMU [2] is able to limitly program the HDM decoders to inject s= ome wrong decoder configurations. [1] https://lore.kernel.org/lkml/20250402232552.999634-1-gourry@gourry.net/ [2] https://github.com/zhijianli88/qemu/tree/program-decoder --- --- drivers/cxl/core/hdm.c | 4 +++- drivers/cxl/core/region.c | 6 ++++-- drivers/cxl/cxl.h | 3 ++- tools/testing/cxl/test/cxl.c | 1 + 4 files changed, 10 insertions(+), 4 deletions(-) diff --git a/drivers/cxl/core/hdm.c b/drivers/cxl/core/hdm.c index 70cae4ebf8a4..afbbda780d4d 100644 --- a/drivers/cxl/core/hdm.c +++ b/drivers/cxl/core/hdm.c @@ -559,7 +559,8 @@ int cxl_dpa_free(struct cxl_endpoint_decoder *cxled) dev_name(&cxled->cxld.region->dev)); return -EBUSY; } - if (cxled->cxld.flags & CXL_DECODER_F_ENABLE) { + if (cxled->cxld.flags & CXL_DECODER_F_ENABLE && + !(cxled->cxld.flags & CXL_DECODER_F_NEED_RESET)) { dev_dbg(dev, "decoder enabled\n"); return -EBUSY; } @@ -918,6 +919,7 @@ static void cxl_decoder_reset(struct cxl_decoder *cxld) up_read(&cxl_dpa_rwsem); =20 cxld->flags &=3D ~CXL_DECODER_F_ENABLE; + cxld->flags &=3D ~CXL_DECODER_F_NEED_RESET; =20 /* Userspace is now responsible for reconfiguring this decoder */ if (is_endpoint_decoder(&cxld->dev)) { diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c index c3f4dc244df7..d025e892d07d 100644 --- a/drivers/cxl/core/region.c +++ b/drivers/cxl/core/region.c @@ -2096,7 +2096,8 @@ static int cxl_region_detach(struct cxl_endpoint_deco= der *cxled) p =3D &cxlr->params; get_device(&cxlr->dev); =20 - if (p->state > CXL_CONFIG_ACTIVE) { + if (p->state > CXL_CONFIG_ACTIVE || + cxled->cxld.flags & CXL_DECODER_F_NEED_RESET) { cxl_region_decode_reset(cxlr, p->interleave_ways); p->state =3D CXL_CONFIG_ACTIVE; } @@ -3434,7 +3435,8 @@ int cxl_add_to_region(struct cxl_port *root, struct c= xl_endpoint_decoder *cxled) if (device_attach(&cxlr->dev) < 0) dev_err(&cxlr->dev, "failed to enable, range: %pr\n", p->res); - } + } else + cxled->cxld.flags |=3D CXL_DECODER_F_NEED_RESET; =20 put_device(region_dev); out: diff --git a/drivers/cxl/cxl.h b/drivers/cxl/cxl.h index be8a7dc77719..60fae072bbcf 100644 --- a/drivers/cxl/cxl.h +++ b/drivers/cxl/cxl.h @@ -331,7 +331,8 @@ int cxl_dport_map_rcd_linkcap(struct pci_dev *pdev, str= uct cxl_dport *dport); #define CXL_DECODER_F_TYPE3 BIT(3) #define CXL_DECODER_F_LOCK BIT(4) #define CXL_DECODER_F_ENABLE BIT(5) -#define CXL_DECODER_F_MASK GENMASK(5, 0) +#define CXL_DECODER_F_NEED_RESET BIT(6) +#define CXL_DECODER_F_MASK GENMASK(6, 0) =20 enum cxl_decoder_type { CXL_DECODER_DEVMEM =3D 2, diff --git a/tools/testing/cxl/test/cxl.c b/tools/testing/cxl/test/cxl.c index 1c3336095923..5dac454ca0e2 100644 --- a/tools/testing/cxl/test/cxl.c +++ b/tools/testing/cxl/test/cxl.c @@ -709,6 +709,7 @@ static void mock_decoder_reset(struct cxl_decoder *cxld) "%s: out of order reset, expected decoder%d.%d\n", dev_name(&cxld->dev), port->id, port->commit_end); cxld->flags &=3D ~CXL_DECODER_F_ENABLE; + cxld->flags &=3D ~CXL_DECODER_F_NEED_RESET; } =20 static void default_mock_decoder(struct cxl_decoder *cxld) --=20 2.27.0