From nobody Mon Feb 9 10:12:50 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E49D611CBA for ; Wed, 30 Apr 2025 01:05:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1745975127; cv=none; b=FBn/10TyobxA3yR7IIHOJK3/nDxw5jDXQv5oW3QN5nftguJT9iLOao7anmzg9/TsM7ZksGXFeGaByhTsNQ5GZECUqNH29NMpa1M/KQObgxA5RKG6eKng5DNrDFkQHHnThwWNwcepZZwkQWI4DxHV5rygePvurhf7wwax6iql1n0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1745975127; c=relaxed/simple; bh=oSI4AdvwmcSLbAbbuCxcWerS/mPOdTcxQRziDu39kWk=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; b=WVC8kfT2FVIUOzOZsOeSJHw0hvLysTodDBv+2vHbHcbV2wr6zF9VVdNTRWJLYYsP7FydEFQuiwdY8H2mBXLJFd7+WUc6qe8nReiVHuO3pOBJdTlrJjJlZGCXjFimJoTix2wiPKBCyR/RBwQ9D+SUe8nYmyXFG9n4jzh0kHmKCbw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=UMfXMPf5; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="UMfXMPf5" Received: by smtp.kernel.org (Postfix) with ESMTPSA id ABC3BC4CEF1; Wed, 30 Apr 2025 01:05:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1745975126; bh=oSI4AdvwmcSLbAbbuCxcWerS/mPOdTcxQRziDu39kWk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=UMfXMPf5xvH5ArBjNBTG7Tv8pWiWvDjbeVtolcSJm7iXVCypcUrf3INOHPeiDZxPZ 2Ls/nsp3B/fyPA8dm0MSEpKeTqUKSZAM0sgKzIHyoE3gYjk0oJAsT9VwHJcyd1g7jQ 0Yxkam1PeoGWs83YeRiqxvJYkDkEISG5M+h/YynLeoHLZtquzHCvKAyN/nNaeN+ge+ bgbkPqqyRmPvlua0r0eabHvnsoO1hlponjPv8OLGxGvw8+XASO2Uw34HFvkI94YByH zHN1cUv1R0TUp86Jhf3lPXe/w7eC5cxHumHeiB8ckhBmg9dJzLmZ+/KqE7d2+YYeCL LwLLAgbvXE1Qg== Received: by paulmck-ThinkPad-P17-Gen-1.home (Postfix, from userid 1000) id 6475CCE0E56; Tue, 29 Apr 2025 18:05:25 -0700 (PDT) From: "Paul E. McKenney" To: linux-kernel@vger.kernel.org Cc: kernel-team@meta.com, Andrew Morton , Kuniyuki Iwashima , Mateusz Guzik , Petr Mladek , Steven Rostedt , John Ogness , Sergey Senozhatsky , Jon Pan-Doh , Bjorn Helgaas , Karolina Stolarek , "Paul E. McKenney" , kernel test robot , Alex Deucher , Kenneth Feng , =?UTF-8?q?Christian=20K=C3=B6nig?= , Xinhui Pan , David Airlie , Simona Vetter , amd-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org Subject: [PATCH v4 05/20] drm/amd/pm: Avoid open-coded use of ratelimit_state structure's internals Date: Tue, 29 Apr 2025 18:05:09 -0700 Message-Id: <20250430010524.3614408-5-paulmck@kernel.org> X-Mailer: git-send-email 2.40.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The amdgpu_set_thermal_throttling_logging() function directly accesses the ratelimit_state structure's ->missed field, which works, but which also makes it more difficult to change this field. Therefore, make use of the ratelimit_state_reset_interval() function instead of directly accessing the ->missed field. Nevertheless, open-coded use of ->burst and ->interval is still permitted, for example, for runtime sysfs adjustment of these fields. Link: https://lore.kernel.org/all/fbe93a52-365e-47fe-93a4-44a44547d601@paul= mck-laptop/ Link: https://lore.kernel.org/all/20250423115409.3425-1-spasswolf@web.de/ Reported-by: kernel test robot Closes: https://lore.kernel.org/oe-kbuild-all/202503180826.EiekA1MB-lkp@int= el.com/ Signed-off-by: Paul E. McKenney Acked-by: Alex Deucher Reviewed-by: Petr Mladek Cc: Kenneth Feng Cc: "Christian K=C3=B6nig" Cc: Xinhui Pan Cc: David Airlie Cc: Simona Vetter Cc: Cc: --- drivers/gpu/drm/amd/pm/amdgpu_pm.c | 11 ++--------- 1 file changed, 2 insertions(+), 9 deletions(-) diff --git a/drivers/gpu/drm/amd/pm/amdgpu_pm.c b/drivers/gpu/drm/amd/pm/am= dgpu_pm.c index 922def51685b0..d533c79f7e215 100644 --- a/drivers/gpu/drm/amd/pm/amdgpu_pm.c +++ b/drivers/gpu/drm/amd/pm/amdgpu_pm.c @@ -1606,7 +1606,6 @@ static ssize_t amdgpu_set_thermal_throttling_logging(= struct device *dev, struct drm_device *ddev =3D dev_get_drvdata(dev); struct amdgpu_device *adev =3D drm_to_adev(ddev); long throttling_logging_interval; - unsigned long flags; int ret =3D 0; =20 ret =3D kstrtol(buf, 0, &throttling_logging_interval); @@ -1617,18 +1616,12 @@ static ssize_t amdgpu_set_thermal_throttling_loggin= g(struct device *dev, return -EINVAL; =20 if (throttling_logging_interval > 0) { - raw_spin_lock_irqsave(&adev->throttling_logging_rs.lock, flags); /* * Reset the ratelimit timer internals. * This can effectively restart the timer. */ - adev->throttling_logging_rs.interval =3D - (throttling_logging_interval - 1) * HZ; - adev->throttling_logging_rs.begin =3D 0; - adev->throttling_logging_rs.printed =3D 0; - adev->throttling_logging_rs.missed =3D 0; - raw_spin_unlock_irqrestore(&adev->throttling_logging_rs.lock, flags); - + ratelimit_state_reset_interval(&adev->throttling_logging_rs, + (throttling_logging_interval - 1) * HZ); atomic_set(&adev->throttling_logging_enabled, 1); } else { atomic_set(&adev->throttling_logging_enabled, 0); --=20 2.40.1