From nobody Fri Apr 3 01:29:35 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B33AF3CFF7A; Wed, 25 Mar 2026 11:51:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774439469; cv=none; b=O5oqqFFiQlCv6IunMtnF6E9wHX+wQ3pNjssKnZ7SgH+jEUESjkhT3cGsYcPnbBHGx0oWEpGZgsO+fhdMNsPf/sUrAwGNl28PgGc/+EtiG4uLKVQ5KIkWvP/FGjjy/SR55MsWWIlnSrCbovQEl18GuiCws9jEpSY62QVHI7IPe04= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774439469; c=relaxed/simple; bh=KeHI21tX17zitbyWM/R6acwXiOl1c2DxdhSIx3r5B2Q=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=a8I8+kppSeDqP0l0uzfDcAAg14ob3sJNfv57LbasNxpiZMFVg3Oap0M61GDrjS1IukeLry/7arSt1Esy6k2M1Zy1KGsljVtNT6FH2SMHlas4g8YmwLo97r2HM4Sr6kXF/ZAMT9vgOOMUd4rlAk7PPeSr8WtuiFJNOsPFYYZdt/4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=At+9rire; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="At+9rire" Received: by smtp.kernel.org (Postfix) with ESMTPS id 599CDC2BCB0; Wed, 25 Mar 2026 11:51:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1774439469; bh=KeHI21tX17zitbyWM/R6acwXiOl1c2DxdhSIx3r5B2Q=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=At+9rirePFu0GD7weoBRWDz/whd0ugh9kPLeHHXaiK3Q3TxqVl3rTDh5hjUD93SHP MLlpTzsLA0Mx63R+/BYSXQEOpzYhSSZbINB8UhSk33TwYDSMJHQq2BW3cFgaHRXNKU 1c6Ssc3ayoFu17qONPzv0XFw6h7ZjqskRMOb3daRx9RZt2A2h9Ly+gOcyxda9EqeAG h5y2WVIfX5EF8FDnl23xgt8algGEHgYuliiGn6egUzWpE9x2mG6gGopRZ9bvkDzRKh V/XP1y/DBFf6jVlKxom70UTe/xfB1tP+6FKdPSd0vkGCALRyG0vO25D0GI+Vp4kWJU psYReOh/D+3qQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 46FB6103A9BF; Wed, 25 Mar 2026 11:51:09 +0000 (UTC) From: Michael Riesch via B4 Relay Date: Wed, 25 Mar 2026 12:51:06 +0100 Subject: [PATCH v3 1/9] Documentation: admin-guide: media: add rk3588 vicap Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250430-rk3588-vicap-v3-1-e38e428868cc@collabora.com> References: <20250430-rk3588-vicap-v3-0-e38e428868cc@collabora.com> In-Reply-To: <20250430-rk3588-vicap-v3-0-e38e428868cc@collabora.com> To: Mehdi Djait , Laurent Pinchart , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Kever Yang , Jagan Teki , =?utf-8?q?=D0=9A=D1=83=D0=B7=D0=BD=D0=B5=D1=86=D0=BE=D0=B2_=D0=9C=D0=B8=D1=85=D0=B0=D0=B8=D0=BB?= , Charalampos Mitrodimas , Sebastian Reichel , Nicolas Dufresne , Collabora Kernel Team , Sakari Ailus Cc: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Michael Riesch X-Mailer: b4 0.12.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1774439467; l=4759; i=michael.riesch@collabora.com; s=20250410; h=from:subject:message-id; bh=pTp72GEyrYn0y0wkkq8ExYmYCRhqw9pZRiQOONnrYOg=; b=p2ddiO+BNbwKEbQI2oCzFXph9RouyAdBUN4czfnPoJacnmUU/dKwQD+L6044pVvnKJvLJ9BDG waqddnjf5dIC+pFg7zc77LLwOEViCQeUny03d8eFb6zzHdFo/Dw9WF1 X-Developer-Key: i=michael.riesch@collabora.com; a=ed25519; pk=+MWX1fffLFZtTPG/I6XdYm/+OSvpRE8D9evQaWbiN04= X-Endpoint-Received: by B4 Relay for michael.riesch@collabora.com/20250410 with auth_id=371 X-Original-From: Michael Riesch Reply-To: michael.riesch@collabora.com From: Michael Riesch Add a section that describes the Rockchip RK3588 VICAP. Reviewed-by: Mehdi Djait Signed-off-by: Michael Riesch --- .../admin-guide/media/rkcif-rk3588-vicap.dot | 29 ++++++++++++++++++= ++ Documentation/admin-guide/media/rkcif.rst | 32 ++++++++++++++++++= ++++ 2 files changed, 61 insertions(+) diff --git a/Documentation/admin-guide/media/rkcif-rk3588-vicap.dot b/Docum= entation/admin-guide/media/rkcif-rk3588-vicap.dot new file mode 100644 index 000000000000..f6d3404920b5 --- /dev/null +++ b/Documentation/admin-guide/media/rkcif-rk3588-vicap.dot @@ -0,0 +1,29 @@ +digraph board { + rankdir=3DTB + n00000007 [label=3D"{{ 0} | rkcif-mipi2\n/dev/v4l-subdev0 |= { 1}}", shape=3DMrecord, style=3Dfilled, fillcolor=3Dgreen] + n00000007:port1 -> n0000000a + n00000007:port1 -> n00000010 [style=3Ddashed] + n00000007:port1 -> n00000016 [style=3Ddashed] + n00000007:port1 -> n0000001c [style=3Ddashed] + n0000000a [label=3D"rkcif-mipi2-id0\n/dev/video0", shape=3Dbox, st= yle=3Dfilled, fillcolor=3Dyellow] + n00000010 [label=3D"rkcif-mipi2-id1\n/dev/video1", shape=3Dbox, st= yle=3Dfilled, fillcolor=3Dyellow] + n00000016 [label=3D"rkcif-mipi2-id2\n/dev/video2", shape=3Dbox, st= yle=3Dfilled, fillcolor=3Dyellow] + n0000001c [label=3D"rkcif-mipi2-id3\n/dev/video3", shape=3Dbox, st= yle=3Dfilled, fillcolor=3Dyellow] + n00000025 [label=3D"{{ 0} | rkcif-mipi4\n/dev/v4l-subdev1 |= { 1}}", shape=3DMrecord, style=3Dfilled, fillcolor=3Dgreen] + n00000025:port1 -> n00000028 + n00000025:port1 -> n0000002e [style=3Ddashed] + n00000025:port1 -> n00000034 [style=3Ddashed] + n00000025:port1 -> n0000003a [style=3Ddashed] + n00000028 [label=3D"rkcif-mipi4-id0\n/dev/video4", shape=3Dbox, st= yle=3Dfilled, fillcolor=3Dyellow] + n0000002e [label=3D"rkcif-mipi4-id1\n/dev/video5", shape=3Dbox, st= yle=3Dfilled, fillcolor=3Dyellow] + n00000034 [label=3D"rkcif-mipi4-id2\n/dev/video6", shape=3Dbox, st= yle=3Dfilled, fillcolor=3Dyellow] + n0000003a [label=3D"rkcif-mipi4-id3\n/dev/video7", shape=3Dbox, st= yle=3Dfilled, fillcolor=3Dyellow] + n00000043 [label=3D"{{ 0} | dw-mipi-csi2rx fdd30000.csi\n/d= ev/v4l-subdev2 | { 1}}", shape=3DMrecord, style=3Dfilled, fillcolor= =3Dgreen] + n00000043:port1 -> n00000007:port0 + n00000048 [label=3D"{{ 0} | dw-mipi-csi2rx fdd50000.csi\n/d= ev/v4l-subdev3 | { 1}}", shape=3DMrecord, style=3Dfilled, fillcolor= =3Dgreen] + n00000048:port1 -> n00000025:port0 + n0000004d [label=3D"{{} | imx415 3-001a\n/dev/v4l-subdev4 | { 0}}", shape=3DMrecord, style=3Dfilled, fillcolor=3Dgreen] + n0000004d:port0 -> n00000043:port0 + n00000051 [label=3D"{{} | imx415 4-001a\n/dev/v4l-subdev5 | { 0}}", shape=3DMrecord, style=3Dfilled, fillcolor=3Dgreen] + n00000051:port0 -> n00000048:port0 +} diff --git a/Documentation/admin-guide/media/rkcif.rst b/Documentation/admi= n-guide/media/rkcif.rst index 2558c121abc4..313a0ea45d16 100644 --- a/Documentation/admin-guide/media/rkcif.rst +++ b/Documentation/admin-guide/media/rkcif.rst @@ -77,3 +77,35 @@ and the following video devices: .. kernel-figure:: rkcif-rk3568-vicap.dot :alt: Topology of the RK3568 Video Capture (VICAP) unit :align: center + +Rockchip RK3588 Video Capture (VICAP) +------------------------------------- + +The RK3588 Video Capture (VICAP) unit features a digital video port and six +MIPI CSI-2 capture interfaces that can receive video data independently. +The DVP accepts parallel video data, BT.656 and BT.1120. +Since the BT.1120 protocol may feature more than one stream, the RK3588 VI= CAP +DVP features four DMA engines that can capture different streams. +Similarly, the RK3588 VICAP MIPI CSI-2 receivers feature four DMA engines = each +to handle different Virtual Channels (VCs). + +The rkcif driver represents this hardware variant by exposing the following +V4L2 subdevices: + +* dw-mipi-csi2rx fdd30000.csi: MIPI CSI-2 receiver connected to MIPI DPHY0 +* dw-mipi-csi2rx fdd50000.csi: MIPI CSI-2 receiver connected to MIPI DPHY1 +* rkcif-mipi2: INTERFACE/CROP block for the MIPI CSI-2 receiver connected = to + MIPI DPHY0 +* rkcif-mipi4: INTERFACE/CROP block for the MIPI CSI-2 receiver connected = to + MIPI DPHY1 + +and the following video devices: + +* rkcif-mipi2-id{0,1,2,3}: The DMA engines connected to the rkcif-mipi2 + INTERFACE/CROP block. +* rkcif-mipi4-id{0,1,2,3}: The DMA engines connected to the rkcif-mipi4 + INTERFACE/CROP block. + +.. kernel-figure:: rkcif-rk3588-vicap.dot + :alt: Topology of the RK3588 Video Capture (VICAP) unit + :align: center --=20 2.39.5 From nobody Fri Apr 3 01:29:35 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B32C73CFF6F; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250430-rk3588-vicap-v3-2-e38e428868cc@collabora.com> References: <20250430-rk3588-vicap-v3-0-e38e428868cc@collabora.com> In-Reply-To: <20250430-rk3588-vicap-v3-0-e38e428868cc@collabora.com> To: Mehdi Djait , Laurent Pinchart , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Kever Yang , Jagan Teki , =?utf-8?q?=D0=9A=D1=83=D0=B7=D0=BD=D0=B5=D1=86=D0=BE=D0=B2_=D0=9C=D0=B8=D1=85=D0=B0=D0=B8=D0=BB?= , Charalampos Mitrodimas , Sebastian Reichel , Nicolas Dufresne , Collabora Kernel Team , Sakari Ailus Cc: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Michael Riesch X-Mailer: b4 0.12.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1774439467; l=6555; i=michael.riesch@collabora.com; s=20250410; h=from:subject:message-id; bh=oa4KcT9fRYz9I8qYtj9tZE2sEkoYMSd4GpMdemZqn04=; b=/KDSFbVMYD09sLoLmNNsigUIQm54I9NYo0iabgQuiGDwRr508GdhthCGkPJOyS+aLQIO1ysV+ 6uuoRJpIvRaA8ILKyI4sIs5L72oIG2pxGKQzoZCAF8EMJDTCZ3vgsqR X-Developer-Key: i=michael.riesch@collabora.com; a=ed25519; pk=+MWX1fffLFZtTPG/I6XdYm/+OSvpRE8D9evQaWbiN04= X-Endpoint-Received: by B4 Relay for michael.riesch@collabora.com/20250410 with auth_id=371 X-Original-From: Michael Riesch Reply-To: michael.riesch@collabora.com From: Michael Riesch Add documentation for the Rockchip RK3588 Video Capture (VICAP) unit. To that end, make the existing rockchip,rk3568-vicap documentation more general and introduce variant specific constraints. Signed-off-by: Michael Riesch Acked-by: Conor Dooley --- .../bindings/media/rockchip,rk3568-vicap.yaml | 187 +++++++++++++++++= +--- 1 file changed, 163 insertions(+), 24 deletions(-) diff --git a/Documentation/devicetree/bindings/media/rockchip,rk3568-vicap.= yaml b/Documentation/devicetree/bindings/media/rockchip,rk3568-vicap.yaml index 18cd0a5a5318..897ed00c239b 100644 --- a/Documentation/devicetree/bindings/media/rockchip,rk3568-vicap.yaml +++ b/Documentation/devicetree/bindings/media/rockchip,rk3568-vicap.yaml @@ -15,9 +15,15 @@ description: the data from camera sensors, video decoders, or other companion ICs and transfers it into system main memory by AXI bus. =20 + The Rockchip RK3588 Video Capture (VICAP) is similar to its RK3568 + counterpart, but features six MIPI CSI-2 ports and additional connections + to the image signal processor (ISP) blocks. + properties: compatible: - const: rockchip,rk3568-vicap + enum: + - rockchip,rk3568-vicap + - rockchip,rk3588-vicap =20 reg: maxItems: 1 @@ -26,37 +32,23 @@ properties: maxItems: 1 =20 clocks: - items: - - description: ACLK - - description: HCLK - - description: DCLK - - description: ICLK + minItems: 4 + maxItems: 5 =20 clock-names: - items: - - const: aclk - - const: hclk - - const: dclk - - const: iclk + minItems: 4 + maxItems: 5 =20 iommus: maxItems: 1 =20 resets: - items: - - description: ARST - - description: HRST - - description: DRST - - description: PRST - - description: IRST + minItems: 5 + maxItems: 9 =20 reset-names: - items: - - const: arst - - const: hrst - - const: drst - - const: prst - - const: irst + minItems: 5 + maxItems: 9 =20 rockchip,grf: $ref: /schemas/types.yaml#/definitions/phandle @@ -67,8 +59,15 @@ properties: =20 ports: $ref: /schemas/graph.yaml#/properties/ports + additionalProperties: false =20 properties: + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + port@0: $ref: /schemas/graph.yaml#/$defs/port-base unevaluatedProperties: false @@ -100,13 +99,75 @@ properties: =20 port@1: $ref: /schemas/graph.yaml#/properties/port - description: Port connected to the MIPI CSI-2 receiver output. + description: Port connected to the MIPI CSI-2 receiver 0 output. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + port@2: + $ref: /schemas/graph.yaml#/properties/port + description: Port connected to the MIPI CSI-2 receiver 1 output. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + port@3: + $ref: /schemas/graph.yaml#/properties/port + description: Port connected to the MIPI CSI-2 receiver 2 output. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + port@4: + $ref: /schemas/graph.yaml#/properties/port + description: Port connected to the MIPI CSI-2 receiver 3 output. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + port@5: + $ref: /schemas/graph.yaml#/properties/port + description: Port connected to the MIPI CSI-2 receiver 4 output. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + port@6: + $ref: /schemas/graph.yaml#/properties/port + description: Port connected to the MIPI CSI-2 receiver 5 output. =20 properties: endpoint: $ref: video-interfaces.yaml# unevaluatedProperties: false =20 + port@10: + $ref: /schemas/graph.yaml#/properties/port + description: Port connected to the ISP0 input. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + port@11: + $ref: /schemas/graph.yaml#/properties/port + description: Port connected to the ISP1 input. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false required: - compatible - reg @@ -114,6 +175,84 @@ required: - clocks - ports =20 +allOf: + - if: + properties: + compatible: + contains: + const: rockchip,rk3568-vicap + then: + properties: + clocks: + maxItems: 4 + + clock-names: + items: + - const: aclk + - const: hclk + - const: dclk + - const: iclk + + resets: + maxItems: 5 + + reset-names: + items: + - const: arst + - const: hrst + - const: drst + - const: prst + - const: irst + + ports: + properties: + port@2: false + + port@3: false + + port@4: false + + port@5: false + + port@6: false + + port@10: false + + port@11: false + + - if: + properties: + compatible: + contains: + const: rockchip,rk3588-vicap + then: + properties: + clocks: + minItems: 5 + + clock-names: + items: + - const: aclk + - const: hclk + - const: dclk + - const: iclk0 + - const: iclk1 + + resets: + minItems: 9 + + reset-names: + items: + - const: arst + - const: hrst + - const: drst + - const: irst0 + - const: irst1 + - const: irst2 + - const: irst3 + - const: irst4 + - const: irst5 + additionalProperties: false =20 examples: --=20 2.39.5 From nobody Fri Apr 3 01:29:35 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher 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smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=VXB8TExG; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="VXB8TExG" Received: by smtp.kernel.org (Postfix) with ESMTPS id 80160C2BC9E; Wed, 25 Mar 2026 11:51:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1774439469; bh=d4ez7jEUT/joOsHbkMBIyukqL830zQ6jH3ptuSAAgq4=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=VXB8TExGxj3XJ+CEvUC1zX+ftcSmVBnyzVJOMjUt0rjVaAD/fxuFvEeIr4nae+ifn /G/qI8m69ZCgNgDCVpmL9jpwKHOj93Ar0DTpjOhb3WpaMm5s++GiVasfdKwHBCi9Jb gKK+dt7U+XYvf9MUDRXPS4El4e9QTSyY5iG6tfY5nz6w3+YRg0PYKLqhv3CS7jXKeS FZAAruCDLTa13wa8s4gByzYtYkbs1TrCqQh14VX7q6lXTp+KibkZ62ZcyeUa/UV9T/ bHikZPeHsxwNvwhWNIPcrTQTfS3LV6RJEGtC5Rw8ZvschXeewSvT1uBJNrTQrRhk5x kSJyjmxCGLkxw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6ED0A109449E; Wed, 25 Mar 2026 11:51:09 +0000 (UTC) From: Michael Riesch via B4 Relay Date: Wed, 25 Mar 2026 12:51:08 +0100 Subject: [PATCH v3 3/9] media: rockchip: rkcif: add support for rk3588 vicap mipi capture Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250430-rk3588-vicap-v3-3-e38e428868cc@collabora.com> References: <20250430-rk3588-vicap-v3-0-e38e428868cc@collabora.com> In-Reply-To: <20250430-rk3588-vicap-v3-0-e38e428868cc@collabora.com> To: Mehdi Djait , Laurent Pinchart , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Kever Yang , Jagan Teki , =?utf-8?q?=D0=9A=D1=83=D0=B7=D0=BD=D0=B5=D1=86=D0=BE=D0=B2_=D0=9C=D0=B8=D1=85=D0=B0=D0=B8=D0=BB?= , Charalampos Mitrodimas , Sebastian Reichel , Nicolas Dufresne , Collabora Kernel Team , Sakari Ailus Cc: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Michael Riesch X-Mailer: b4 0.12.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1774439467; l=8163; i=michael.riesch@collabora.com; s=20250410; h=from:subject:message-id; bh=+ZsKtunle38UW+Tp1O/frPIfW8fVjcpDT3gT8MV7y+I=; b=/ajhRcLFwxpsb5BXSAs0H5c8NMlWCKZkiKs00og+pFthWpsFd9SCVf6SKcQSPOwwEkQxdmo/A wtViN9/DJYKDHf9Pv/XlJpqHyPQgn+5rYjlSWJyUVXUjbM/j5XTLop+ X-Developer-Key: i=michael.riesch@collabora.com; a=ed25519; pk=+MWX1fffLFZtTPG/I6XdYm/+OSvpRE8D9evQaWbiN04= X-Endpoint-Received: by B4 Relay for michael.riesch@collabora.com/20250410 with auth_id=371 X-Original-From: Michael Riesch Reply-To: michael.riesch@collabora.com From: Michael Riesch The RK3588 Video Capture (VICAP) unit features a Digital Video Port (DVP) and six MIPI CSI-2 capture interfaces. Add initial support for this variant to the rkcif driver and enable the MIPI CSI-2 capture interfaces. Signed-off-by: Michael Riesch Reviewed-by: Mehdi Djait --- .../platform/rockchip/rkcif/rkcif-capture-mipi.c | 141 +++++++++++++++++= ++++ .../platform/rockchip/rkcif/rkcif-capture-mipi.h | 1 + .../media/platform/rockchip/rkcif/rkcif-common.h | 2 +- drivers/media/platform/rockchip/rkcif/rkcif-dev.c | 18 +++ 4 files changed, 161 insertions(+), 1 deletion(-) diff --git a/drivers/media/platform/rockchip/rkcif/rkcif-capture-mipi.c b/d= rivers/media/platform/rockchip/rkcif/rkcif-capture-mipi.c index 9e67160a16e4..ad083dc9f5ad 100644 --- a/drivers/media/platform/rockchip/rkcif/rkcif-capture-mipi.c +++ b/drivers/media/platform/rockchip/rkcif/rkcif-capture-mipi.c @@ -30,6 +30,14 @@ #define RK3568_MIPI_CTRL0_CROP_EN BIT(5) #define RK3568_MIPI_CTRL0_WRDDR(type) ((type) << 1) =20 +#define RK3588_MIPI_CTRL0_DMA_EN BIT(28) +#define RK3588_MIPI_CTRL0_HIGH_ALIGN BIT(27) +#define RK3588_MIPI_CTRL0_WRDDR(type) ((type) << 5) +#define RK3588_MIPI_CTRL0_CROP_EN BIT(4) +#define RK3588_MIPI_CTRL0_PARSE(type) ((type) << 1) + +#define RK3588_MIPI_CTRL_CAP_EN BIT(0) + #define RKCIF_MIPI_CTRL0_DT_ID(id) ((id) << 10) #define RKCIF_MIPI_CTRL0_VC_ID(id) ((id) << 8) #define RKCIF_MIPI_CTRL0_CAP_EN BIT(0) @@ -481,6 +489,132 @@ const struct rkcif_mipi_match_data rkcif_rk3568_vicap= _mipi_match_data =3D { }, }; =20 +static u32 +rkcif_rk3588_mipi_ctrl0(struct rkcif_stream *stream, + const struct rkcif_output_fmt *active_out_fmt) +{ + u32 ctrl0 =3D 0; + + ctrl0 |=3D RK3588_MIPI_CTRL0_DMA_EN; + ctrl0 |=3D RKCIF_MIPI_CTRL0_DT_ID(active_out_fmt->mipi.dt); + ctrl0 |=3D RK3588_MIPI_CTRL0_CROP_EN; + ctrl0 |=3D RKCIF_MIPI_CTRL0_CAP_EN; + + switch (active_out_fmt->mipi.type) { + case RKCIF_MIPI_TYPE_RAW8: + break; + case RKCIF_MIPI_TYPE_RAW10: + ctrl0 |=3D RK3588_MIPI_CTRL0_PARSE(0x1); + if (!active_out_fmt->mipi.compact) + ctrl0 |=3D RK3588_MIPI_CTRL0_WRDDR(0x1); + break; + case RKCIF_MIPI_TYPE_RAW12: + ctrl0 |=3D RK3588_MIPI_CTRL0_PARSE(0x2); + if (!active_out_fmt->mipi.compact) + ctrl0 |=3D RK3588_MIPI_CTRL0_WRDDR(0x1); + break; + case RKCIF_MIPI_TYPE_RGB888: + break; + case RKCIF_MIPI_TYPE_YUV422SP: + ctrl0 |=3D RK3588_MIPI_CTRL0_WRDDR(0x4); + break; + case RKCIF_MIPI_TYPE_YUV420SP: + ctrl0 |=3D RK3588_MIPI_CTRL0_WRDDR(0x5); + break; + case RKCIF_MIPI_TYPE_YUV400: + ctrl0 |=3D RK3588_MIPI_CTRL0_WRDDR(0x3); + break; + default: + break; + } + + return ctrl0; +} + +const struct rkcif_mipi_match_data rkcif_rk3588_vicap_mipi_match_data =3D { + .mipi_num =3D 6, + .mipi_ctrl0 =3D rkcif_rk3588_mipi_ctrl0, + .regs =3D { + [RKCIF_MIPI_CTRL] =3D 0x20, + [RKCIF_MIPI_INTEN] =3D 0x74, + [RKCIF_MIPI_INTSTAT] =3D 0x78, + }, + .regs_id =3D { + [RKCIF_ID0] =3D { + [RKCIF_MIPI_CTRL0] =3D 0x00, + [RKCIF_MIPI_CTRL1] =3D 0x04, + [RKCIF_MIPI_FRAME0_ADDR_Y] =3D 0x24, + [RKCIF_MIPI_FRAME0_ADDR_UV] =3D 0x2c, + [RKCIF_MIPI_FRAME0_VLW_Y] =3D 0x34, + [RKCIF_MIPI_FRAME0_VLW_UV] =3D RKCIF_REGISTER_NOTSUPPORTED, + [RKCIF_MIPI_FRAME1_ADDR_Y] =3D 0x28, + [RKCIF_MIPI_FRAME1_ADDR_UV] =3D 0x30, + [RKCIF_MIPI_FRAME1_VLW_Y] =3D RKCIF_REGISTER_NOTSUPPORTED, + [RKCIF_MIPI_FRAME1_VLW_UV] =3D RKCIF_REGISTER_NOTSUPPORTED, + [RKCIF_MIPI_CROP_START] =3D 0x8c, + }, + [RKCIF_ID1] =3D { + [RKCIF_MIPI_CTRL0] =3D 0x08, + [RKCIF_MIPI_CTRL1] =3D 0x0c, + [RKCIF_MIPI_FRAME0_ADDR_Y] =3D 0x38, + [RKCIF_MIPI_FRAME0_ADDR_UV] =3D 0x40, + [RKCIF_MIPI_FRAME0_VLW_Y] =3D 0x48, + [RKCIF_MIPI_FRAME0_VLW_UV] =3D RKCIF_REGISTER_NOTSUPPORTED, + [RKCIF_MIPI_FRAME1_ADDR_Y] =3D 0x3c, + [RKCIF_MIPI_FRAME1_ADDR_UV] =3D 0x44, + [RKCIF_MIPI_FRAME1_VLW_Y] =3D RKCIF_REGISTER_NOTSUPPORTED, + [RKCIF_MIPI_FRAME1_VLW_UV] =3D RKCIF_REGISTER_NOTSUPPORTED, + [RKCIF_MIPI_CROP_START] =3D 0x90, + }, + [RKCIF_ID2] =3D { + [RKCIF_MIPI_CTRL0] =3D 0x10, + [RKCIF_MIPI_CTRL1] =3D 0x14, + [RKCIF_MIPI_FRAME0_ADDR_Y] =3D 0x4c, + [RKCIF_MIPI_FRAME0_ADDR_UV] =3D 0x54, + [RKCIF_MIPI_FRAME0_VLW_Y] =3D 0x5c, + [RKCIF_MIPI_FRAME0_VLW_UV] =3D RKCIF_REGISTER_NOTSUPPORTED, + [RKCIF_MIPI_FRAME1_ADDR_Y] =3D 0x50, + [RKCIF_MIPI_FRAME1_ADDR_UV] =3D 0x58, + [RKCIF_MIPI_FRAME1_VLW_Y] =3D RKCIF_REGISTER_NOTSUPPORTED, + [RKCIF_MIPI_FRAME1_VLW_UV] =3D RKCIF_REGISTER_NOTSUPPORTED, + [RKCIF_MIPI_CROP_START] =3D 0x94, + }, + [RKCIF_ID3] =3D { + [RKCIF_MIPI_CTRL0] =3D 0x18, + [RKCIF_MIPI_CTRL1] =3D 0x1c, + [RKCIF_MIPI_FRAME0_ADDR_Y] =3D 0x60, + [RKCIF_MIPI_FRAME0_ADDR_UV] =3D 0x68, + [RKCIF_MIPI_FRAME0_VLW_Y] =3D 0x70, + [RKCIF_MIPI_FRAME0_VLW_UV] =3D RKCIF_REGISTER_NOTSUPPORTED, + [RKCIF_MIPI_FRAME1_ADDR_Y] =3D 0x64, + [RKCIF_MIPI_FRAME1_ADDR_UV] =3D 0x6c, + [RKCIF_MIPI_FRAME1_VLW_Y] =3D RKCIF_REGISTER_NOTSUPPORTED, + [RKCIF_MIPI_FRAME1_VLW_UV] =3D RKCIF_REGISTER_NOTSUPPORTED, + [RKCIF_MIPI_CROP_START] =3D 0x98, + }, + }, + .blocks =3D { + { + .offset =3D 0x100, + }, + { + .offset =3D 0x200, + }, + { + .offset =3D 0x300, + }, + { + .offset =3D 0x400, + }, + { + .offset =3D 0x500, + }, + { + .offset =3D 0x600, + }, + }, +}; + static inline unsigned int rkcif_mipi_get_reg(struct rkcif_interface *inte= rface, unsigned int index) { @@ -631,6 +765,13 @@ static int rkcif_mipi_start_streaming(struct rkcif_str= eam *stream) rkcif_mipi_stream_write(stream, RKCIF_MIPI_CTRL1, ctrl1); rkcif_mipi_stream_write(stream, RKCIF_MIPI_CTRL0, ctrl0); =20 + /* + * TODO: This bit has a different meaning on the RK3568, but it is + * set there by default anyway. While correct, this is not exactly + * nice and shall be reworked during the next refactoring. + */ + rkcif_mipi_write(interface, RKCIF_MIPI_CTRL, RK3588_MIPI_CTRL_CAP_EN); + ret =3D 0; =20 out: diff --git a/drivers/media/platform/rockchip/rkcif/rkcif-capture-mipi.h b/d= rivers/media/platform/rockchip/rkcif/rkcif-capture-mipi.h index 7f16eadc474c..7edaca44f653 100644 --- a/drivers/media/platform/rockchip/rkcif/rkcif-capture-mipi.h +++ b/drivers/media/platform/rockchip/rkcif/rkcif-capture-mipi.h @@ -13,6 +13,7 @@ #include "rkcif-common.h" =20 extern const struct rkcif_mipi_match_data rkcif_rk3568_vicap_mipi_match_da= ta; +extern const struct rkcif_mipi_match_data rkcif_rk3588_vicap_mipi_match_da= ta; =20 int rkcif_mipi_register(struct rkcif_device *rkcif); =20 diff --git a/drivers/media/platform/rockchip/rkcif/rkcif-common.h b/drivers= /media/platform/rockchip/rkcif/rkcif-common.h index dd92cfbc879f..4d9211ba9bda 100644 --- a/drivers/media/platform/rockchip/rkcif/rkcif-common.h +++ b/drivers/media/platform/rockchip/rkcif/rkcif-common.h @@ -27,7 +27,7 @@ #include "rkcif-regs.h" =20 #define RKCIF_DRIVER_NAME "rockchip-cif" -#define RKCIF_CLK_MAX 4 +#define RKCIF_CLK_MAX 5 =20 enum rkcif_format_type { RKCIF_FMT_TYPE_INVALID, diff --git a/drivers/media/platform/rockchip/rkcif/rkcif-dev.c b/drivers/me= dia/platform/rockchip/rkcif/rkcif-dev.c index b4cf1146f131..c8542398b7f0 100644 --- a/drivers/media/platform/rockchip/rkcif/rkcif-dev.c +++ b/drivers/media/platform/rockchip/rkcif/rkcif-dev.c @@ -53,6 +53,20 @@ static const struct rkcif_match_data rk3568_vicap_match_= data =3D { .mipi =3D &rkcif_rk3568_vicap_mipi_match_data, }; =20 +static const char *const rk3588_vicap_clks[] =3D { + "aclk", + "hclk", + "dclk", + "iclk0", + "iclk1", +}; + +static const struct rkcif_match_data rk3588_vicap_match_data =3D { + .clks =3D rk3588_vicap_clks, + .clks_num =3D ARRAY_SIZE(rk3588_vicap_clks), + .mipi =3D &rkcif_rk3588_vicap_mipi_match_data, +}; + static const struct of_device_id rkcif_plat_of_match[] =3D { { .compatible =3D "rockchip,px30-vip", @@ -62,6 +76,10 @@ static const struct of_device_id rkcif_plat_of_match[] = =3D { .compatible =3D "rockchip,rk3568-vicap", .data =3D &rk3568_vicap_match_data, }, + { + .compatible =3D "rockchip,rk3588-vicap", + .data =3D &rk3588_vicap_match_data, + }, {} }; MODULE_DEVICE_TABLE(of, rkcif_plat_of_match); --=20 2.39.5 From nobody Fri Apr 3 01:29:35 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CC5023D0901; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250430-rk3588-vicap-v3-4-e38e428868cc@collabora.com> References: <20250430-rk3588-vicap-v3-0-e38e428868cc@collabora.com> In-Reply-To: <20250430-rk3588-vicap-v3-0-e38e428868cc@collabora.com> To: Mehdi Djait , Laurent Pinchart , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Kever Yang , Jagan Teki , =?utf-8?q?=D0=9A=D1=83=D0=B7=D0=BD=D0=B5=D1=86=D0=BE=D0=B2_=D0=9C=D0=B8=D1=85=D0=B0=D0=B8=D0=BB?= , Charalampos Mitrodimas , Sebastian Reichel , Nicolas Dufresne , Collabora Kernel Team , Sakari Ailus Cc: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Michael Riesch X-Mailer: b4 0.12.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1774439467; l=1219; i=michael.riesch@collabora.com; s=20250410; h=from:subject:message-id; bh=/GzYE6Y65z4sqAFCGq0r5VgZhg70cR93RCV+j70gjCI=; b=rumYL0cT6v/mAk4sBmBymQu3l2qnRLwxnrYc8TFIKAHX/VVave0B4ZkbLy3lcDrTWToIMBiPo cLFWk+c+LgcBfWYM9WVSq2Fp+AXah0djUl5cvBmuSg2zWCtcRIrpfvz X-Developer-Key: i=michael.riesch@collabora.com; a=ed25519; pk=+MWX1fffLFZtTPG/I6XdYm/+OSvpRE8D9evQaWbiN04= X-Endpoint-Received: by B4 Relay for michael.riesch@collabora.com/20250410 with auth_id=371 X-Original-From: Michael Riesch Reply-To: michael.riesch@collabora.com From: Michael Riesch This patch is discussed over at https://lore.kernel.org/all/20260305-rk3588-csi2rx-v2-0-79d01b615486@collab= ora.com included here for testing purposes only. The RK3588 MIPI CSI-2 receivers are compatible to the ones found in the RK3568. Introduce a list of compatible variants and add the RK3588 variant to it. Signed-off-by: Michael Riesch --- .../devicetree/bindings/media/rockchip,rk3568-mipi-csi2.yaml | 8 ++++= ++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/media/rockchip,rk3568-mipi-c= si2.yaml b/Documentation/devicetree/bindings/media/rockchip,rk3568-mipi-csi= 2.yaml index 2c2bd87582eb..5e864e92f8a8 100644 --- a/Documentation/devicetree/bindings/media/rockchip,rk3568-mipi-csi2.yaml +++ b/Documentation/devicetree/bindings/media/rockchip,rk3568-mipi-csi2.yaml @@ -16,8 +16,12 @@ description: =20 properties: compatible: - enum: - - rockchip,rk3568-mipi-csi2 + oneOf: + - const: rockchip,rk3568-mipi-csi2 + - items: + - enum: + - rockchip,rk3588-mipi-csi2 + - const: rockchip,rk3568-mipi-csi2 =20 reg: maxItems: 1 --=20 2.39.5 From nobody Fri Apr 3 01:29:35 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E62C33D16F5; Wed, 25 Mar 2026 11:51:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774439470; cv=none; b=EOr43Ccy3NWxSp4zlJ0xU+TSq4hLAtOVBcbwjHc4vfjxbtOcZlCA4hmEWEBIgNeX+VbyRlMwVn7HugVAY6i+mEYlqz79YInQig1mnAsJHsKo4TlMX+IU3hWRhPnZdaYGPZsMydhEvQPTkzQUssRQUmmX3AWaLyFpn/zSqY44w2s= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1774439470; c=relaxed/simple; bh=FhTQ5SVdxITPm8tDe0bW/0ZG36G8hCk0e58aJbKwRGQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=sjxq04tO83hhkFAuXUgk4GlwE5uYgUCNlUj6n244V06/aUN3Cw9hmNT44CzmrEVEI0qJzN1bk/iEEdza3sfk1RYbx83ovykdi69b8ZJbsWsioWzDk6F91EoFp5pAnHlrCdYIIGS3IuqHQfwNdvH+IoZnFWOf2yqFm51DXaAuZ8A= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=XsJIQs5n; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="XsJIQs5n" Received: by smtp.kernel.org (Postfix) with ESMTPS id B8B7AC2BCB4; Wed, 25 Mar 2026 11:51:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1774439469; bh=FhTQ5SVdxITPm8tDe0bW/0ZG36G8hCk0e58aJbKwRGQ=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=XsJIQs5nUfsoCD4kXCZ/p07nUTUzb2pVaCE/yr4cSrpj8FLZW+3WqxGc0JYnMhlsB 99fWMkodbjKzqXQ4sL7ffqgp0DqeK/1V7CLEQKHzjKl68920tZGSLImaEfJj3bXVpe D29y79/7e13VjvnB70G8PTU/wjrGRmWRg+BDkz4+zgGO1xDf34gisMvTBH23O78hRO mOsPRQseC3HfoPKxD0pw4DldYJfaVlWwTIHwfTNni36zFH7veTF+z1C2YYDMMmSAeS uQqCf05NYIgfIkW9q8TtMYg+udrjPOO87+8KIKt78orPeFm9EF/b/pJV/8FR2iyyBX XgRF/YOaQmYuA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id AD8251093168; Wed, 25 Mar 2026 11:51:09 +0000 (UTC) From: Michael Riesch via B4 Relay Date: Wed, 25 Mar 2026 12:51:10 +0100 Subject: [PATCH DONOTMERGE v3 5/9] arm64: dts: rockchip: add mipi csi-2 receiver nodes to rk3588 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250430-rk3588-vicap-v3-5-e38e428868cc@collabora.com> References: <20250430-rk3588-vicap-v3-0-e38e428868cc@collabora.com> In-Reply-To: <20250430-rk3588-vicap-v3-0-e38e428868cc@collabora.com> To: Mehdi Djait , Laurent Pinchart , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Kever Yang , Jagan Teki , =?utf-8?q?=D0=9A=D1=83=D0=B7=D0=BD=D0=B5=D1=86=D0=BE=D0=B2_=D0=9C=D0=B8=D1=85=D0=B0=D0=B8=D0=BB?= , Charalampos Mitrodimas , Sebastian Reichel , Nicolas Dufresne , Collabora Kernel Team , Sakari Ailus Cc: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Michael Riesch X-Mailer: b4 0.12.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1774439467; l=2664; i=michael.riesch@collabora.com; s=20250410; h=from:subject:message-id; bh=5oU0klzEB2FubzgZ+1XdUaBRRnzqz5jTIQAtdWBAHeM=; b=oQeLZuLnHjPODXz57PN56HG7/Z8VKGuTMmGUJZ2wD3kPB+K6OURrirtPoB3oTdtxusvxcqIEL 2QMUfW+Ucd+BKslYGmtTv25RU+py1zOa+TRJ08RWdPTHoiyv7P9nZxM X-Developer-Key: i=michael.riesch@collabora.com; a=ed25519; pk=+MWX1fffLFZtTPG/I6XdYm/+OSvpRE8D9evQaWbiN04= X-Endpoint-Received: by B4 Relay for michael.riesch@collabora.com/20250410 with auth_id=371 X-Original-From: Michael Riesch Reply-To: michael.riesch@collabora.com From: Michael Riesch This patch is discussed over at https://lore.kernel.org/all/20260305-rk3588-csi2rx-v2-0-79d01b615486@collab= ora.com included here for testing purposes only. The Rockchip RK3588 features six MIPI CSI-2 receiver units: - MIPI0: connected to MIPI DCPHY0 (not supported) - MIPI1: connected to MIPI DCPHY1 (not supported) - MIPI2: connected to MIPI DPHY0 - MIPI3: connected to MIPI DPHY0-1 (not supported) - MIPI4: connected to MIPI DPHY1 - MIPI5: connected to MIPI DPHY1-1 (not supported) As the MIPI DCPHYs as well as the split DPHY mode of the DPHYs are not yet supported, add only the device tree nodes for the MIPI2 and MIPI4 units. Signed-off-by: Michael Riesch --- arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 52 +++++++++++++++++++++++= ++++ 1 file changed, 52 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi b/arch/arm64/boo= t/dts/rockchip/rk3588-base.dtsi index 7fe9593d8c19..6c593b0255c3 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi @@ -1430,6 +1430,58 @@ av1d: video-codec@fdc70000 { resets =3D <&cru SRST_A_AV1>, <&cru SRST_P_AV1>, <&cru SRST_A_AV1_BIU>, = <&cru SRST_P_AV1_BIU>; }; =20 + csi2: csi@fdd30000 { + compatible =3D "rockchip,rk3588-mipi-csi2", "rockchip,rk3568-mipi-csi2"; + reg =3D <0x0 0xfdd30000 0x0 0x10000>; + interrupts =3D , + ; + interrupt-names =3D "err1", "err2"; + clocks =3D <&cru PCLK_CSI_HOST_2>; + phys =3D <&csi_dphy0>; + power-domains =3D <&power RK3588_PD_VI>; + resets =3D <&cru SRST_P_CSI_HOST_2>; + status =3D "disabled"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + csi2_in: port@0 { + reg =3D <0>; + }; + + csi2_out: port@1 { + reg =3D <1>; + }; + }; + }; + + csi4: csi@fdd50000 { + compatible =3D "rockchip,rk3588-mipi-csi2", "rockchip,rk3568-mipi-csi2"; + reg =3D <0x0 0xfdd50000 0x0 0x10000>; + interrupts =3D , + ; + interrupt-names =3D "err1", "err2"; + clocks =3D <&cru PCLK_CSI_HOST_4>; + phys =3D <&csi_dphy1>; + power-domains =3D <&power RK3588_PD_VI>; + resets =3D <&cru SRST_P_CSI_HOST_4>; + status =3D "disabled"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + csi4_in: port@0 { + reg =3D <0>; + }; + + csi4_out: port@1 { + reg =3D <1>; + }; + }; + }; + vop: vop@fdd90000 { compatible =3D "rockchip,rk3588-vop"; reg =3D <0x0 0xfdd90000 0x0 0x4200>, <0x0 0xfdd95000 0x0 0x1000>; --=20 2.39.5 From nobody Fri Apr 3 01:29:35 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F08763D1701; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250430-rk3588-vicap-v3-6-e38e428868cc@collabora.com> References: <20250430-rk3588-vicap-v3-0-e38e428868cc@collabora.com> In-Reply-To: <20250430-rk3588-vicap-v3-0-e38e428868cc@collabora.com> To: Mehdi Djait , Laurent Pinchart , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Kever Yang , Jagan Teki , =?utf-8?q?=D0=9A=D1=83=D0=B7=D0=BD=D0=B5=D1=86=D0=BE=D0=B2_=D0=9C=D0=B8=D1=85=D0=B0=D0=B8=D0=BB?= , Charalampos Mitrodimas , Sebastian Reichel , Nicolas Dufresne , Collabora Kernel Team , Sakari Ailus Cc: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Michael Riesch X-Mailer: b4 0.12.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1774439467; l=3247; i=michael.riesch@collabora.com; s=20250410; h=from:subject:message-id; bh=hvR3DNjF4Z+gqzZ4KtJS+9HylbHwDx6q1Xxnc+ArBRM=; b=ixDIfg3ZxPVtoVby/vNTd2lrTGli7/Ciu2aUG8rhbq/UFyE9Hiq4fWKz5kmm6v/Ievl7njgrI cUIigAJXIPxAPrdXAgQHcaIw36GbeCDpWvr48GpJjsOQlVZwemERuxc X-Developer-Key: i=michael.riesch@collabora.com; a=ed25519; pk=+MWX1fffLFZtTPG/I6XdYm/+OSvpRE8D9evQaWbiN04= X-Endpoint-Received: by B4 Relay for michael.riesch@collabora.com/20250410 with auth_id=371 X-Original-From: Michael Riesch Reply-To: michael.riesch@collabora.com From: Michael Riesch Add the device tree node for the RK3588 Video Capture (VICAP) unit. Signed-off-by: Michael Riesch --- arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 91 +++++++++++++++++++++++= ++++ 1 file changed, 91 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi b/arch/arm64/boo= t/dts/rockchip/rk3588-base.dtsi index 6c593b0255c3..8b98e5c3cc8b 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi @@ -1430,6 +1430,89 @@ av1d: video-codec@fdc70000 { resets =3D <&cru SRST_A_AV1>, <&cru SRST_P_AV1>, <&cru SRST_A_AV1_BIU>, = <&cru SRST_P_AV1_BIU>; }; =20 + vicap: video-capture@fdce0000 { + compatible =3D "rockchip,rk3588-vicap"; + reg =3D <0x0 0xfdce0000 0x0 0x800>; + interrupts =3D ; + clocks =3D <&cru ACLK_VICAP>, <&cru HCLK_VICAP>, + <&cru DCLK_VICAP>, <&cru ICLK_CSIHOST0>, + <&cru ICLK_CSIHOST1>; + clock-names =3D "aclk", "hclk", "dclk", "iclk0", "iclk1"; + iommus =3D <&vicap_mmu>; + power-domains =3D <&power RK3588_PD_VI>; + resets =3D <&cru SRST_A_VICAP>, <&cru SRST_H_VICAP>, + <&cru SRST_D_VICAP>, <&cru SRST_CSIHOST0_VICAP>, + <&cru SRST_CSIHOST1_VICAP>, + <&cru SRST_CSIHOST2_VICAP>, + <&cru SRST_CSIHOST3_VICAP>, + <&cru SRST_CSIHOST4_VICAP>, + <&cru SRST_CSIHOST5_VICAP>; + reset-names =3D "arst", "hrst", "drst", "irst0", "irst1", + "irst2", "irst3", "irst4", "irst5"; + status =3D "disabled"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + vicap_dvp: port@0 { + reg =3D <0>; + }; + + vicap_mipi0: port@1 { + reg =3D <1>; + }; + + vicap_mipi1: port@2 { + reg =3D <2>; + }; + + vicap_mipi2: port@3 { + reg =3D <3>; + + vicap_mipi2_input: endpoint { + remote-endpoint =3D <&csi2_output>; + }; + }; + + vicap_mipi3: port@4 { + reg =3D <4>; + }; + + vicap_mipi4: port@5 { + reg =3D <5>; + + vicap_mipi4_input: endpoint { + remote-endpoint =3D <&csi4_output>; + }; + }; + + vicap_mipi5: port@6 { + reg =3D <6>; + }; + + vicap_toisp0: port@10 { + reg =3D <16>; + }; + + vicap_toisp1: port@11 { + reg =3D <17>; + }; + }; + }; + + vicap_mmu: iommu@fdce0800 { + compatible =3D "rockchip,rk3588-iommu", "rockchip,rk3568-iommu"; + reg =3D <0x0 0xfdce0800 0x0 0x40>, <0x0 0xfdce0900 0x0 0x40>; + interrupts =3D ; + clocks =3D <&cru ACLK_VICAP>, <&cru HCLK_VICAP>; + clock-names =3D "aclk", "iface"; + #iommu-cells =3D <0>; + power-domains =3D <&power RK3588_PD_VI>; + rockchip,disable-mmu-reset; + status =3D "disabled"; + }; + csi2: csi@fdd30000 { compatible =3D "rockchip,rk3588-mipi-csi2", "rockchip,rk3568-mipi-csi2"; reg =3D <0x0 0xfdd30000 0x0 0x10000>; @@ -1452,6 +1535,10 @@ csi2_in: port@0 { =20 csi2_out: port@1 { reg =3D <1>; + + csi2_output: endpoint { + remote-endpoint =3D <&vicap_mipi2_input>; + }; }; }; }; @@ -1478,6 +1565,10 @@ csi4_in: port@0 { =20 csi4_out: port@1 { reg =3D <1>; + + csi4_output: endpoint { + remote-endpoint =3D <&vicap_mipi4_input>; + }; }; }; }; --=20 2.39.5 From nobody Fri Apr 3 01:29:35 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 173EE3D1CB3; Wed, 25 Mar 2026 11:51:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250430-rk3588-vicap-v3-7-e38e428868cc@collabora.com> References: <20250430-rk3588-vicap-v3-0-e38e428868cc@collabora.com> In-Reply-To: <20250430-rk3588-vicap-v3-0-e38e428868cc@collabora.com> To: Mehdi Djait , Laurent Pinchart , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Kever Yang , Jagan Teki , =?utf-8?q?=D0=9A=D1=83=D0=B7=D0=BD=D0=B5=D1=86=D0=BE=D0=B2_=D0=9C=D0=B8=D1=85=D0=B0=D0=B8=D0=BB?= , Charalampos Mitrodimas , Sebastian Reichel , Nicolas Dufresne , Collabora Kernel Team , Sakari Ailus Cc: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Michael Riesch X-Mailer: b4 0.12.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1774439467; l=4268; i=michael.riesch@collabora.com; s=20250410; h=from:subject:message-id; bh=0nNnhdbQ217tvNoFygSbOgCx2i2xX88Dl6UgQ4VtEnw=; b=5ilQPTQWmZ99ebKVzffeyrebJN7Nw+7AN6tvp9QYvsAJ426ZbQNHokkzk9KmgXcWwxi1Fp7ga C8auWvlCIdLAWizQMsKmmeqEHBc3+COC7fZwWSlK9IAwRasW/ePnmdJ X-Developer-Key: i=michael.riesch@collabora.com; a=ed25519; pk=+MWX1fffLFZtTPG/I6XdYm/+OSvpRE8D9evQaWbiN04= X-Endpoint-Received: by B4 Relay for michael.riesch@collabora.com/20250410 with auth_id=371 X-Original-From: Michael Riesch Reply-To: michael.riesch@collabora.com From: Michael Riesch Add device tree overlay for the Radxa Camera 4K (featuring the Sony IMX415 image sensor) to applied on the Radxa ROCK 5B+ CAM0 port. Signed-off-by: Michael Riesch --- arch/arm64/boot/dts/rockchip/Makefile | 5 ++ .../rk3588-rock-5b-plus-radxa-cam4k-cam0.dtso | 99 ++++++++++++++++++= ++++ 2 files changed, 104 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/ro= ckchip/Makefile index 4d384f153c13..77c587f43dda 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -199,6 +199,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-rock-5b.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-rock-5b-pcie-ep.dtbo dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-rock-5b-pcie-srns.dtbo dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-rock-5b-plus.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-rock-5b-plus-radxa-cam4k-cam0.dtbo dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-rock-5t.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-tiger-haikou.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-tiger-haikou-video-demo.dtbo @@ -298,6 +299,10 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-rock-5b-pcie-s= rns.dtb rk3588-rock-5b-pcie-srns-dtbs :=3D rk3588-rock-5b.dtb \ rk3588-rock-5b-pcie-srns.dtbo =20 +dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-rock-5b-plus-radxa-4k-cam.dtb +rk3588-rock-5b-plus-radxa-4k-cam-dtbs :=3D rk3588-rock-5b-plus.dtb \ + rk3588-rock-5b-plus-radxa-cam4k-cam0.dtbo + dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-tiger-haikou-haikou-video-demo.dtb rk3588-tiger-haikou-haikou-video-demo-dtbs :=3D rk3588-tiger-haikou.dtb \ rk3588-tiger-haikou-video-demo.dtbo diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus-radxa-cam4k-c= am0.dtso b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus-radxa-cam4k-cam= 0.dtso new file mode 100644 index 000000000000..ee9ecf68a886 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus-radxa-cam4k-cam0.dtso @@ -0,0 +1,99 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Device tree overlay for the Radxa Camera 4K attached to the CAM0 port of + * the Radxa ROCK 5B+. + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include + +&{/} { + savdd_cam0: regulator-savdd-cam0 { + compatible =3D "regulator-fixed"; + regulator-min-microvolt =3D <2900000>; + regulator-max-microvolt =3D <2900000>; + regulator-name =3D "savdd_cam0"; + vin-supply =3D <&vcc_3v3_s3>; + }; + + sdvdd_cam0: regulator-sdvdd-cam0 { + compatible =3D "regulator-fixed"; + regulator-min-microvolt =3D <1100000>; + regulator-max-microvolt =3D <1100000>; + regulator-name =3D "sdvdd_cam0"; + vin-supply =3D <&vcc5v0_sys>; + }; + + siovdd_cam0: regulator-siovdd-cam0 { + compatible =3D "regulator-fixed"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-name =3D "siovdd_cam0"; + vin-supply =3D <&vcc_3v3_s3>; + }; +}; + +&i2c3 { + #address-cells =3D <1>; + #size-cells =3D <0>; + status =3D "okay"; + + imx415: camera-sensor@1a { + compatible =3D "sony,imx415"; + reg =3D <0x1a>; + assigned-clocks =3D <&cru CLK_MIPI_CAMARAOUT_M3>; + assigned-clock-rates =3D <37125000>; + avdd-supply =3D <&savdd_cam0>; + clocks =3D <&cru CLK_MIPI_CAMARAOUT_M3>; + dvdd-supply =3D <&sdvdd_cam0>; + orientation =3D <2>; /* External */ + ovdd-supply =3D <&siovdd_cam0>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&cam0_rstn &mipim0_camera3_clk>; + reset-gpios =3D <&gpio4 RK_PA0 GPIO_ACTIVE_LOW>; + + port { + imx415_output: endpoint { + data-lanes =3D <1 2 3 4>; + link-frequencies =3D /bits/ 64 <445500000>; + remote-endpoint =3D <&csi2_input>; + }; + }; + }; +}; + +&pinctrl { + cam0 { + cam0_rstn: cam0-rstn-pinctrl { + rockchip,pins =3D <4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&csi2 { + status =3D "okay"; +}; + +&csi2_in { + csi2_input: endpoint { + data-lanes =3D <1 2 3 4>; + link-frequencies =3D /bits/ 64 <445500000>; + remote-endpoint =3D <&imx415_output>; + }; +}; + +&csi_dphy0 { + status =3D "okay"; +}; + +&vicap { + status =3D "okay"; +}; + +&vicap_mmu { + status =3D "okay"; +}; --=20 2.39.5 From nobody Fri Apr 3 01:29:35 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 25E7A3D1CC5; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250430-rk3588-vicap-v3-8-e38e428868cc@collabora.com> References: <20250430-rk3588-vicap-v3-0-e38e428868cc@collabora.com> In-Reply-To: <20250430-rk3588-vicap-v3-0-e38e428868cc@collabora.com> To: Mehdi Djait , Laurent Pinchart , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Kever Yang , Jagan Teki , =?utf-8?q?=D0=9A=D1=83=D0=B7=D0=BD=D0=B5=D1=86=D0=BE=D0=B2_=D0=9C=D0=B8=D1=85=D0=B0=D0=B8=D0=BB?= , Charalampos Mitrodimas , Sebastian Reichel , Nicolas Dufresne , Collabora Kernel Team , Sakari Ailus Cc: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Michael Riesch X-Mailer: b4 0.12.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1774439467; l=4277; i=michael.riesch@collabora.com; s=20250410; h=from:subject:message-id; bh=nLkcB1Bsd5vddmgjChqUvZyyk/Ls/mtNhdJe225yM4k=; b=Kxg8wo1WFK1LxSUd4lv0+ndVc2Zjoe2GH+w618XmBjGfS4X7zBYHCLm6U/SOc7Jhv9q7NENpT rQ6AAY7LI0mBflAU+m8S5p7ucO7lYdLJNqT8zTwOqcLq3iwuODjZo+D X-Developer-Key: i=michael.riesch@collabora.com; a=ed25519; pk=+MWX1fffLFZtTPG/I6XdYm/+OSvpRE8D9evQaWbiN04= X-Endpoint-Received: by B4 Relay for michael.riesch@collabora.com/20250410 with auth_id=371 X-Original-From: Michael Riesch Reply-To: michael.riesch@collabora.com From: Michael Riesch Add device tree overlay for the Radxa Camera 4K (featuring the Sony IMX415 image sensor) to applied on the Radxa ROCK 5B+ CAM1 port. Signed-off-by: Michael Riesch --- arch/arm64/boot/dts/rockchip/Makefile | 4 +- .../rk3588-rock-5b-plus-radxa-cam4k-cam1.dtso | 99 ++++++++++++++++++= ++++ 2 files changed, 102 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/ro= ckchip/Makefile index 77c587f43dda..191666821a80 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -200,6 +200,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-rock-5b-pcie-ep= .dtbo dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-rock-5b-pcie-srns.dtbo dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-rock-5b-plus.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-rock-5b-plus-radxa-cam4k-cam0.dtbo +dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-rock-5b-plus-radxa-cam4k-cam1.dtbo dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-rock-5t.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-tiger-haikou.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-tiger-haikou-video-demo.dtbo @@ -301,7 +302,8 @@ rk3588-rock-5b-pcie-srns-dtbs :=3D rk3588-rock-5b.dtb \ =20 dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-rock-5b-plus-radxa-4k-cam.dtb rk3588-rock-5b-plus-radxa-4k-cam-dtbs :=3D rk3588-rock-5b-plus.dtb \ - rk3588-rock-5b-plus-radxa-cam4k-cam0.dtbo + rk3588-rock-5b-plus-radxa-cam4k-cam0.dtbo \ + rk3588-rock-5b-plus-radxa-cam4k-cam1.dtbo =20 dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-tiger-haikou-haikou-video-demo.dtb rk3588-tiger-haikou-haikou-video-demo-dtbs :=3D rk3588-tiger-haikou.dtb \ diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus-radxa-cam4k-c= am1.dtso b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus-radxa-cam4k-cam= 1.dtso new file mode 100644 index 000000000000..96b8df4ed354 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus-radxa-cam4k-cam1.dtso @@ -0,0 +1,99 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Device tree overlay for the Radxa Camera 4K attached to the CAM1 port of + * the Radxa ROCK 5B+. + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include + +&{/} { + savdd_cam1: regulator-savdd-cam1 { + compatible =3D "regulator-fixed"; + regulator-min-microvolt =3D <2900000>; + regulator-max-microvolt =3D <2900000>; + regulator-name =3D "savdd_cam1"; + vin-supply =3D <&vcc_3v3_s3>; + }; + + sdvdd_cam1: regulator-sdvdd-cam1 { + compatible =3D "regulator-fixed"; + regulator-min-microvolt =3D <1100000>; + regulator-max-microvolt =3D <1100000>; + regulator-name =3D "sdvdd_cam1"; + vin-supply =3D <&vcc5v0_sys>; + }; + + siovdd_cam1: regulator-siovdd-cam1 { + compatible =3D "regulator-fixed"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-name =3D "siovdd_cam1"; + vin-supply =3D <&vcc_3v3_s3>; + }; +}; + +&i2c4 { + #address-cells =3D <1>; + #size-cells =3D <0>; + status =3D "okay"; + + cam1_imx415: camera-sensor@1a { + compatible =3D "sony,imx415"; + reg =3D <0x1a>; + assigned-clocks =3D <&cru CLK_MIPI_CAMARAOUT_M4>; + assigned-clock-rates =3D <37125000>; + avdd-supply =3D <&savdd_cam1>; + clocks =3D <&cru CLK_MIPI_CAMARAOUT_M4>; + dvdd-supply =3D <&sdvdd_cam1>; + orientation =3D <2>; /* External */ + ovdd-supply =3D <&savdd_cam1>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&cam1_rstn &mipim0_camera4_clk>; + reset-gpios =3D <&gpio2 RK_PB0 GPIO_ACTIVE_LOW>; + + port { + cam1_imx415_output: endpoint { + data-lanes =3D <1 2 3 4>; + link-frequencies =3D /bits/ 64 <445500000>; + remote-endpoint =3D <&csi4_input>; + }; + }; + }; +}; + +&pinctrl { + cam1 { + cam1_rstn: cam1-rstn-pinctrl { + rockchip,pins =3D <2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&csi4 { + status =3D "okay"; +}; + +&csi4_in { + csi4_input: endpoint { + data-lanes =3D <1 2 3 4>; + link-frequencies =3D /bits/ 64 <445500000>; + remote-endpoint =3D <&cam1_imx415_output>; + }; +}; + +&csi_dphy1 { + status =3D "okay"; +}; + +&vicap { + status =3D "okay"; +}; + +&vicap_mmu { + status =3D "okay"; +}; --=20 2.39.5 From nobody Fri Apr 3 01:29:35 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 43BFF3D3308; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250430-rk3588-vicap-v3-9-e38e428868cc@collabora.com> References: <20250430-rk3588-vicap-v3-0-e38e428868cc@collabora.com> In-Reply-To: <20250430-rk3588-vicap-v3-0-e38e428868cc@collabora.com> To: Mehdi Djait , Laurent Pinchart , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Kever Yang , Jagan Teki , =?utf-8?q?=D0=9A=D1=83=D0=B7=D0=BD=D0=B5=D1=86=D0=BE=D0=B2_=D0=9C=D0=B8=D1=85=D0=B0=D0=B8=D0=BB?= , Charalampos Mitrodimas , Sebastian Reichel , Nicolas Dufresne , Collabora Kernel Team , Sakari Ailus Cc: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Michael Riesch X-Mailer: b4 0.12.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1774439467; l=993; i=michael.riesch@collabora.com; s=20250410; h=from:subject:message-id; bh=eVdcF2RtkbDMqyOIRg7mK2YspwU31YYBLyox7Iyaf8I=; b=5b0EALvi9AXxAzBR2WZjbhqWRsq4l3NOZJOtSuurCwB1qJ34wwEVVp8xormh8ck4hlrKqstzt CKkgHyYVA8qAvN8sYl/xbtzmIgN3LmuBAU6oshZeJbZDA9aryrebqbJ X-Developer-Key: i=michael.riesch@collabora.com; a=ed25519; pk=+MWX1fffLFZtTPG/I6XdYm/+OSvpRE8D9evQaWbiN04= X-Endpoint-Received: by B4 Relay for michael.riesch@collabora.com/20250410 with auth_id=371 X-Original-From: Michael Riesch Reply-To: michael.riesch@collabora.com From: Michael Riesch The Synopsys DesignWare MIPI CSI-2 Receiver is integrated into recent Rockchip SoCs, such as the RK3568 and the RK3588. As a consequence, they are used on a lot of Rockchip-based single board computers and/or corresponding camera modules, such as the Radxa Camera 4K. Enable the driver for it in the default configuration. Reviewed-by: Mehdi Djait Signed-off-by: Michael Riesch --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index b67d5b1fc45b..a93ff73ae52c 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -907,6 +907,7 @@ CONFIG_SDR_PLATFORM_DRIVERS=3Dy CONFIG_V4L_MEM2MEM_DRIVERS=3Dy CONFIG_VIDEO_AMPHION_VPU=3Dm CONFIG_VIDEO_CADENCE_CSI2RX=3Dm +CONFIG_VIDEO_DW_MIPI_CSI2RX=3Dm CONFIG_VIDEO_MEDIATEK_JPEG=3Dm CONFIG_VIDEO_MEDIATEK_VCODEC=3Dm CONFIG_VIDEO_WAVE_VPU=3Dm --=20 2.39.5