From nobody Mon Apr 6 23:36:57 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1EAEB36403A; Tue, 17 Mar 2026 09:32:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773739944; cv=none; b=dputFqWMR2+2ep5I8KYsE3iZQsM0OGLHCBq0NSrlxY5Fev+ZdiekbPJ80vjBVsnEvJwYTRwZGiwso2JpDtdfkEaa5I8BkXENOvilAbyC31MxCEuKEEDoGLXnE1EvbJSwbYaiG0dFGwKxAvywrMgd9rBOS1O/+Vv1we8VaKdrpEw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773739944; c=relaxed/simple; bh=p8cijtpU/HSsGMiP46YwtSX4nNkA+3J4pw4gPojkcGs=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=GgG/TgZbi+MvazJr4B8+hjY86sOVro7IYeeTD7rNj//nx3NC03VCExN+NIAMyg7no0gbrKVFc0+TXQWaYcrKKWrLunZ/Xkf9etQJN1kptWVVLltuf6aRgIaoCuPsC4ruumsjZ3pFVvCY1vifP3Nd5oI363m1wguBphXFzTdBxOw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=UxT1sfvb; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="UxT1sfvb" Received: by smtp.kernel.org (Postfix) with ESMTPS id EEFA3C19425; Tue, 17 Mar 2026 09:32:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1773739944; bh=p8cijtpU/HSsGMiP46YwtSX4nNkA+3J4pw4gPojkcGs=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=UxT1sfvbxgTb3B9ITJ/TbmS4lHIDkn/zydRUjoKNKIrt86o+P6srfZAE6loUauh1+ BEDPiUtzt4pqLtW5kj/3n+6xTJJ5eSSQGaxZuwz/uwHHbmNtGzI8RMbrfTkhz68074 XhSR9XIpKhKT9UFVl/yxv/khTsTKWvzCh6xDdt2S7kTLVn0xo6szzHWitvdvRrwIyC 3+aW9n7AW4p4j4ZEPGYRia7joJW27YZYx4hlGGVZbdkaoMJ6gw7RGRkwhYMO6bRLbh bfYlNwsjni81riLPTQ6niTYnTgSY4NwIF+Kz4v7V875O/tXcANr1Fxtd7GOi49u+mh 5YEuPx9EUbkrg== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id E1441F33820; Tue, 17 Mar 2026 09:32:23 +0000 (UTC) From: Michael Riesch via B4 Relay Date: Tue, 17 Mar 2026 10:32:19 +0100 Subject: [PATCH v2 1/9] Documentation: admin-guide: media: add rk3588 vicap Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250430-rk3588-vicap-v2-1-77de5ee9048e@collabora.com> References: <20250430-rk3588-vicap-v2-0-77de5ee9048e@collabora.com> In-Reply-To: <20250430-rk3588-vicap-v2-0-77de5ee9048e@collabora.com> To: Mehdi Djait , Laurent Pinchart , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Kever Yang , Jagan Teki , =?utf-8?q?=D0=9A=D1=83=D0=B7=D0=BD=D0=B5=D1=86=D0=BE=D0=B2_=D0=9C=D0=B8=D1=85=D0=B0=D0=B8=D0=BB?= , Sebastian Reichel , Nicolas Dufresne , Collabora Kernel Team , Sakari Ailus Cc: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Michael Riesch X-Mailer: b4 0.12.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1773739942; l=4703; i=michael.riesch@collabora.com; s=20250410; h=from:subject:message-id; bh=+eC6O18wtYpvs9VlVLfglS6X0TZCIanqcH/7iXnFd4I=; b=q11rIe2Goh3Zc4dkARzS0JFn3gmHBBTXW8XXeo89TPokkuSqBK7B646840c+h/eljYONw2tnm 32ZB5g+PzNrCcXukt6/yl4xHYd4FITsE3izMv3aQjEZ2vrqhX1Bxuex X-Developer-Key: i=michael.riesch@collabora.com; a=ed25519; pk=+MWX1fffLFZtTPG/I6XdYm/+OSvpRE8D9evQaWbiN04= X-Endpoint-Received: by B4 Relay for michael.riesch@collabora.com/20250410 with auth_id=371 X-Original-From: Michael Riesch Reply-To: michael.riesch@collabora.com From: Michael Riesch Add a section that describes the Rockchip RK3588 VICAP. Signed-off-by: Michael Riesch Reviewed-by: Mehdi Djait --- .../admin-guide/media/rkcif-rk3588-vicap.dot | 29 ++++++++++++++++++= ++ Documentation/admin-guide/media/rkcif.rst | 32 ++++++++++++++++++= ++++ 2 files changed, 61 insertions(+) diff --git a/Documentation/admin-guide/media/rkcif-rk3588-vicap.dot b/Docum= entation/admin-guide/media/rkcif-rk3588-vicap.dot new file mode 100644 index 000000000000..f6d3404920b5 --- /dev/null +++ b/Documentation/admin-guide/media/rkcif-rk3588-vicap.dot @@ -0,0 +1,29 @@ +digraph board { + rankdir=3DTB + n00000007 [label=3D"{{ 0} | rkcif-mipi2\n/dev/v4l-subdev0 |= { 1}}", shape=3DMrecord, style=3Dfilled, fillcolor=3Dgreen] + n00000007:port1 -> n0000000a + n00000007:port1 -> n00000010 [style=3Ddashed] + n00000007:port1 -> n00000016 [style=3Ddashed] + n00000007:port1 -> n0000001c [style=3Ddashed] + n0000000a [label=3D"rkcif-mipi2-id0\n/dev/video0", shape=3Dbox, st= yle=3Dfilled, fillcolor=3Dyellow] + n00000010 [label=3D"rkcif-mipi2-id1\n/dev/video1", shape=3Dbox, st= yle=3Dfilled, fillcolor=3Dyellow] + n00000016 [label=3D"rkcif-mipi2-id2\n/dev/video2", shape=3Dbox, st= yle=3Dfilled, fillcolor=3Dyellow] + n0000001c [label=3D"rkcif-mipi2-id3\n/dev/video3", shape=3Dbox, st= yle=3Dfilled, fillcolor=3Dyellow] + n00000025 [label=3D"{{ 0} | rkcif-mipi4\n/dev/v4l-subdev1 |= { 1}}", shape=3DMrecord, style=3Dfilled, fillcolor=3Dgreen] + n00000025:port1 -> n00000028 + n00000025:port1 -> n0000002e [style=3Ddashed] + n00000025:port1 -> n00000034 [style=3Ddashed] + n00000025:port1 -> n0000003a [style=3Ddashed] + n00000028 [label=3D"rkcif-mipi4-id0\n/dev/video4", shape=3Dbox, st= yle=3Dfilled, fillcolor=3Dyellow] + n0000002e [label=3D"rkcif-mipi4-id1\n/dev/video5", shape=3Dbox, st= yle=3Dfilled, fillcolor=3Dyellow] + n00000034 [label=3D"rkcif-mipi4-id2\n/dev/video6", shape=3Dbox, st= yle=3Dfilled, fillcolor=3Dyellow] + n0000003a [label=3D"rkcif-mipi4-id3\n/dev/video7", shape=3Dbox, st= yle=3Dfilled, fillcolor=3Dyellow] + n00000043 [label=3D"{{ 0} | dw-mipi-csi2rx fdd30000.csi\n/d= ev/v4l-subdev2 | { 1}}", shape=3DMrecord, style=3Dfilled, fillcolor= =3Dgreen] + n00000043:port1 -> n00000007:port0 + n00000048 [label=3D"{{ 0} | dw-mipi-csi2rx fdd50000.csi\n/d= ev/v4l-subdev3 | { 1}}", shape=3DMrecord, style=3Dfilled, fillcolor= =3Dgreen] + n00000048:port1 -> n00000025:port0 + n0000004d [label=3D"{{} | imx415 3-001a\n/dev/v4l-subdev4 | { 0}}", shape=3DMrecord, style=3Dfilled, fillcolor=3Dgreen] + n0000004d:port0 -> n00000043:port0 + n00000051 [label=3D"{{} | imx415 4-001a\n/dev/v4l-subdev5 | { 0}}", shape=3DMrecord, style=3Dfilled, fillcolor=3Dgreen] + n00000051:port0 -> n00000048:port0 +} diff --git a/Documentation/admin-guide/media/rkcif.rst b/Documentation/admi= n-guide/media/rkcif.rst index 2558c121abc4..fcd7f8cfc5d3 100644 --- a/Documentation/admin-guide/media/rkcif.rst +++ b/Documentation/admin-guide/media/rkcif.rst @@ -77,3 +77,35 @@ and the following video devices: .. kernel-figure:: rkcif-rk3568-vicap.dot :alt: Topology of the RK3568 Video Capture (VICAP) unit :align: center + +Rockchip RK3588 Video Capture (VICAP) +------------------------------------- + +The RK3588 Video Capture (VICAP) unit features a digital video port and six +MIPI CSI-2 capture interfaces that can receive video data independently. +The DVP accepts parallel video data, BT.656 and BT.1120. +Since the BT.1120 protocol may feature more than one stream, the RK3568 VI= CAP +DVP features four DMA engines that can capture different streams. +Similarly, the RK3588 VICAP MIPI CSI-2 receivers feature four DMA engines = each +to handle different Virtual Channels (VCs). + +The rkcif driver represents this hardware variant by exposing the following +V4L2 subdevices: + +* dw-mipi-csi2rx fdd30000.csi: MIPI CSI-2 receiver connected to MIPI DPHY0 +* dw-mipi-csi2rx fdd50000.csi: MIPI CSI-2 receiver connected to MIPI DPHY1 +* rkcif-mipi2: INTERFACE/CROP block for the MIPI CSI-2 receiver connected = to + MIPI DPHY0 +* rkcif-mipi4: INTERFACE/CROP block for the MIPI CSI-2 receiver connected = to + MIPI DPHY1 + +and the following video devices: + +* rkcif-mipi2-id{0,1,2,3}: The DMA engines connected to the rkcif-mipi2 + INTERFACE/CROP block. +* rkcif-mipi4-id{0,1,2,3}: The DMA engines connected to the rkcif-mipi4 + INTERFACE/CROP block. + +.. kernel-figure:: rkcif-rk3588-vicap.dot + :alt: Topology of the RK3588 Video Capture (VICAP) unit + :align: center --=20 2.39.5 From nobody Mon Apr 6 23:36:57 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2B1F736403F; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250430-rk3588-vicap-v2-2-77de5ee9048e@collabora.com> References: <20250430-rk3588-vicap-v2-0-77de5ee9048e@collabora.com> In-Reply-To: <20250430-rk3588-vicap-v2-0-77de5ee9048e@collabora.com> To: Mehdi Djait , Laurent Pinchart , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Kever Yang , Jagan Teki , =?utf-8?q?=D0=9A=D1=83=D0=B7=D0=BD=D0=B5=D1=86=D0=BE=D0=B2_=D0=9C=D0=B8=D1=85=D0=B0=D0=B8=D0=BB?= , Sebastian Reichel , Nicolas Dufresne , Collabora Kernel Team , Sakari Ailus Cc: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Michael Riesch X-Mailer: b4 0.12.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1773739942; l=6651; i=michael.riesch@collabora.com; s=20250410; h=from:subject:message-id; bh=PLP1i3Q3G/G8xseLo4+pMV9u9+xVQUl6byMHyUWuO4g=; b=AqS14d5aadM5bP6UR7gw9PFX4fEa2SMiTGSJoGH84HOsgFCJyDi3galru8oBMOouhvm3lKLKH Raox9YOVttcBvcz3F2xqU2truM5WXGQp6BOVmNFPY65prKVneInYJLE X-Developer-Key: i=michael.riesch@collabora.com; a=ed25519; pk=+MWX1fffLFZtTPG/I6XdYm/+OSvpRE8D9evQaWbiN04= X-Endpoint-Received: by B4 Relay for michael.riesch@collabora.com/20250410 with auth_id=371 X-Original-From: Michael Riesch Reply-To: michael.riesch@collabora.com From: Michael Riesch Add documentation for the Rockchip RK3588 Video Capture (VICAP) unit. To that end, make the existing rockchip,rk3568-vicap documentation more general and introduce variant specific constraints. Signed-off-by: Michael Riesch --- .../bindings/media/rockchip,rk3568-vicap.yaml | 191 +++++++++++++++++= +--- 1 file changed, 167 insertions(+), 24 deletions(-) diff --git a/Documentation/devicetree/bindings/media/rockchip,rk3568-vicap.= yaml b/Documentation/devicetree/bindings/media/rockchip,rk3568-vicap.yaml index 18cd0a5a5318..15a889ff8e52 100644 --- a/Documentation/devicetree/bindings/media/rockchip,rk3568-vicap.yaml +++ b/Documentation/devicetree/bindings/media/rockchip,rk3568-vicap.yaml @@ -15,9 +15,15 @@ description: the data from camera sensors, video decoders, or other companion ICs and transfers it into system main memory by AXI bus. =20 + The Rockchip RK3588 Video Capture (VICAP) is similar to its RK3568 + counterpart, but features six MIPI CSI-2 ports and additional connections + to the image signal processor (ISP) blocks. + properties: compatible: - const: rockchip,rk3568-vicap + enum: + - rockchip,rk3568-vicap + - rockchip,rk3588-vicap =20 reg: maxItems: 1 @@ -26,37 +32,23 @@ properties: maxItems: 1 =20 clocks: - items: - - description: ACLK - - description: HCLK - - description: DCLK - - description: ICLK + minItems: 4 + maxItems: 5 =20 clock-names: - items: - - const: aclk - - const: hclk - - const: dclk - - const: iclk + minItems: 4 + maxItems: 5 =20 iommus: maxItems: 1 =20 resets: - items: - - description: ARST - - description: HRST - - description: DRST - - description: PRST - - description: IRST + minItems: 5 + maxItems: 9 =20 reset-names: - items: - - const: arst - - const: hrst - - const: drst - - const: prst - - const: irst + minItems: 5 + maxItems: 9 =20 rockchip,grf: $ref: /schemas/types.yaml#/definitions/phandle @@ -67,8 +59,15 @@ properties: =20 ports: $ref: /schemas/graph.yaml#/properties/ports + additionalProperties: false =20 properties: + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + port@0: $ref: /schemas/graph.yaml#/$defs/port-base unevaluatedProperties: false @@ -100,13 +99,75 @@ properties: =20 port@1: $ref: /schemas/graph.yaml#/properties/port - description: Port connected to the MIPI CSI-2 receiver output. + description: Port connected to the MIPI CSI-2 receiver 0 output. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + port@2: + $ref: /schemas/graph.yaml#/properties/port + description: Port connected to the MIPI CSI-2 receiver 1 output. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + port@3: + $ref: /schemas/graph.yaml#/properties/port + description: Port connected to the MIPI CSI-2 receiver 2 output. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + port@4: + $ref: /schemas/graph.yaml#/properties/port + description: Port connected to the MIPI CSI-2 receiver 3 output. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + port@5: + $ref: /schemas/graph.yaml#/properties/port + description: Port connected to the MIPI CSI-2 receiver 4 output. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + port@6: + $ref: /schemas/graph.yaml#/properties/port + description: Port connected to the MIPI CSI-2 receiver 5 output. =20 properties: endpoint: $ref: video-interfaces.yaml# unevaluatedProperties: false =20 + port@10: + $ref: /schemas/graph.yaml#/properties/port + description: Port connected to the ISP0 input. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + port@11: + $ref: /schemas/graph.yaml#/properties/port + description: Port connected to the ISP1 input. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false required: - compatible - reg @@ -114,6 +175,88 @@ required: - clocks - ports =20 +allOf: + - if: + properties: + compatible: + contains: + const: rockchip,rk3568-vicap + then: + properties: + clocks: + minItems: 4 + maxItems: 4 + + clock-names: + items: + - const: aclk + - const: hclk + - const: dclk + - const: iclk + + resets: + minItems: 5 + maxItems: 5 + + reset-names: + items: + - const: arst + - const: hrst + - const: drst + - const: prst + - const: irst + + ports: + properties: + port@2: false + + port@3: false + + port@4: false + + port@5: false + + port@6: false + + port@10: false + + port@11: false + + - if: + properties: + compatible: + contains: + const: rockchip,rk3588-vicap + then: + properties: + clocks: + minItems: 5 + maxItems: 5 + + clock-names: + items: + - const: aclk + - const: hclk + - const: dclk + - const: iclk0 + - const: iclk1 + + resets: + minItems: 9 + maxItems: 9 + + reset-names: + items: + - const: arst + - const: hrst + - const: drst + - const: irst0 + - const: irst1 + - const: irst2 + - const: irst3 + - const: irst4 + - const: irst5 + additionalProperties: false =20 examples: --=20 2.39.5 From nobody Mon Apr 6 23:36:57 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3DD4F3644B7; Tue, 17 Mar 2026 09:32:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773739944; cv=none; b=oVfM0KE5YV31iDStk67K6HWKG2YuzBasx9xUAu9QO4GCP+AyCaabP8iL5bBJdCmHVo7WY/3S6ZDEcU1H+LV19oyGh3YOzC+uiPeWSDLAvZtCa45fiHZHNQOq/+raogx/+reQ+XWoLfKNF4ZR5+5aeZ4K+9VQ36dDLum4LsYugJ0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773739944; c=relaxed/simple; bh=6oqLEIZJ3OWAkU4LDt+EygdAJx/QFwJoMmkYh+kr/fw=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=kY/xgZDs7XoWWNC+uDYnYdIJafT8DPXkanANNneffu/v1ukLTcbSPrH6ZLhv7bZws8Md3SOXpx4jVwmWE1DvbLLuHmcQgZLqzAAjdm4xMB3lOymUCpnvrH55fiZ9S1zKbWCdETFlEFy5c+BEkcSXt0C21bcz03MUQ2Hv924l2GM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=YQOOMlfH; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="YQOOMlfH" Received: by smtp.kernel.org (Postfix) with ESMTPS id 197C4C2BC9E; Tue, 17 Mar 2026 09:32:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1773739944; bh=6oqLEIZJ3OWAkU4LDt+EygdAJx/QFwJoMmkYh+kr/fw=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=YQOOMlfHbBLFZkPZsxxmJazIzZusUM8kgdxUAMSCLg25fDHYbqZ8khtKA2RDgFqb+ RjMClsUj+1A2mpFuG73JlFHXmb2HVGQcb2y9JsHis/em5gk+d+kyVXlLrconDkJltv U7sJyRN/Qcgw/mH5UxfWpAZ2AjvcmQH1uELA2OJxFdmIUInTrSKB+NaOVEfmRjEfKh mmzAgC2+/3JCAh1t7jiJR7IL1AtTTyg6nuRT1jChVbJBiOiUGLKL9T9gRHt4fi5il5 sWxkp43PHmMwWnmKyi5HEENau7MHOzx3bCtQXpmi0svd3zS0xdiW6lYQZ+Pac/Fd42 R1xpssANSjufA== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0E3BEF33827; Tue, 17 Mar 2026 09:32:24 +0000 (UTC) From: Michael Riesch via B4 Relay Date: Tue, 17 Mar 2026 10:32:21 +0100 Subject: [PATCH v2 3/9] media: rockchip: rkcif: add support for rk3588 vicap mipi capture Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250430-rk3588-vicap-v2-3-77de5ee9048e@collabora.com> References: <20250430-rk3588-vicap-v2-0-77de5ee9048e@collabora.com> In-Reply-To: <20250430-rk3588-vicap-v2-0-77de5ee9048e@collabora.com> To: Mehdi Djait , Laurent Pinchart , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Kever Yang , Jagan Teki , =?utf-8?q?=D0=9A=D1=83=D0=B7=D0=BD=D0=B5=D1=86=D0=BE=D0=B2_=D0=9C=D0=B8=D1=85=D0=B0=D0=B8=D0=BB?= , Sebastian Reichel , Nicolas Dufresne , Collabora Kernel Team , Sakari Ailus Cc: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Michael Riesch X-Mailer: b4 0.12.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1773739942; l=8077; i=michael.riesch@collabora.com; s=20250410; h=from:subject:message-id; bh=d03027InleX9FrXweJNrh6cSAZZgQVUSSox74qHfGLs=; b=zYtBgMUvgQKm1EKcqv2xbtbzCSj6raqboIz5N5y5VMQnr+RVrkPM4NDAzRSw1tf+sKxd4Vv6q nan1FfILBOeAi0Tihh2pVLaIQ8SMm23hpenNjH1o9MKEYAPCRyYnzF9 X-Developer-Key: i=michael.riesch@collabora.com; a=ed25519; pk=+MWX1fffLFZtTPG/I6XdYm/+OSvpRE8D9evQaWbiN04= X-Endpoint-Received: by B4 Relay for michael.riesch@collabora.com/20250410 with auth_id=371 X-Original-From: Michael Riesch Reply-To: michael.riesch@collabora.com From: Michael Riesch The RK3588 Video Capture (VICAP) unit features a Digital Video Port (DVP) and six MIPI CSI-2 capture interfaces. Add initial support for this variant to the rkcif driver and enable the MIPI CSI-2 capture interfaces. Signed-off-by: Michael Riesch --- .../platform/rockchip/rkcif/rkcif-capture-mipi.c | 136 +++++++++++++++++= ++++ .../platform/rockchip/rkcif/rkcif-capture-mipi.h | 1 + .../media/platform/rockchip/rkcif/rkcif-common.h | 2 +- drivers/media/platform/rockchip/rkcif/rkcif-dev.c | 18 +++ 4 files changed, 156 insertions(+), 1 deletion(-) diff --git a/drivers/media/platform/rockchip/rkcif/rkcif-capture-mipi.c b/d= rivers/media/platform/rockchip/rkcif/rkcif-capture-mipi.c index 9e67160a16e4..aa70d3e9db04 100644 --- a/drivers/media/platform/rockchip/rkcif/rkcif-capture-mipi.c +++ b/drivers/media/platform/rockchip/rkcif/rkcif-capture-mipi.c @@ -30,10 +30,18 @@ #define RK3568_MIPI_CTRL0_CROP_EN BIT(5) #define RK3568_MIPI_CTRL0_WRDDR(type) ((type) << 1) =20 +#define RK3588_MIPI_CTRL0_DMA_EN BIT(28) +#define RK3588_MIPI_CTRL0_HIGH_ALIGN BIT(27) +#define RK3588_MIPI_CTRL0_WRDDR(type) ((type) << 5) +#define RK3588_MIPI_CTRL0_CROP_EN BIT(4) +#define RK3588_MIPI_CTRL0_PARSE(type) ((type) << 1) + #define RKCIF_MIPI_CTRL0_DT_ID(id) ((id) << 10) #define RKCIF_MIPI_CTRL0_VC_ID(id) ((id) << 8) #define RKCIF_MIPI_CTRL0_CAP_EN BIT(0) =20 +#define RKCIF_MIPI_CTRL_CAP_EN BIT(0) + #define RKCIF_MIPI_INT_FRAME0_END(id) BIT(8 + (id) * 2 + 0) #define RKCIF_MIPI_INT_FRAME1_END(id) BIT(8 + (id) * 2 + 1) =20 @@ -481,6 +489,132 @@ const struct rkcif_mipi_match_data rkcif_rk3568_vicap= _mipi_match_data =3D { }, }; =20 +static u32 +rkcif_rk3588_mipi_ctrl0(struct rkcif_stream *stream, + const struct rkcif_output_fmt *active_out_fmt) +{ + u32 ctrl0 =3D 0; + + ctrl0 |=3D RK3588_MIPI_CTRL0_DMA_EN; + ctrl0 |=3D RKCIF_MIPI_CTRL0_DT_ID(active_out_fmt->mipi.dt); + ctrl0 |=3D RK3588_MIPI_CTRL0_CROP_EN; + ctrl0 |=3D RKCIF_MIPI_CTRL0_CAP_EN; + + switch (active_out_fmt->mipi.type) { + case RKCIF_MIPI_TYPE_RAW8: + break; + case RKCIF_MIPI_TYPE_RAW10: + ctrl0 |=3D RK3588_MIPI_CTRL0_PARSE(0x1); + if (!active_out_fmt->mipi.compact) + ctrl0 |=3D RK3588_MIPI_CTRL0_WRDDR(0x1); + break; + case RKCIF_MIPI_TYPE_RAW12: + ctrl0 |=3D RK3588_MIPI_CTRL0_PARSE(0x2); + if (!active_out_fmt->mipi.compact) + ctrl0 |=3D RK3588_MIPI_CTRL0_WRDDR(0x1); + break; + case RKCIF_MIPI_TYPE_RGB888: + break; + case RKCIF_MIPI_TYPE_YUV422SP: + ctrl0 |=3D RK3588_MIPI_CTRL0_WRDDR(0x4); + break; + case RKCIF_MIPI_TYPE_YUV420SP: + ctrl0 |=3D RK3588_MIPI_CTRL0_WRDDR(0x5); + break; + case RKCIF_MIPI_TYPE_YUV400: + ctrl0 |=3D RK3588_MIPI_CTRL0_WRDDR(0x3); + break; + default: + break; + } + + return ctrl0; +} + +const struct rkcif_mipi_match_data rkcif_rk3588_vicap_mipi_match_data =3D { + .mipi_num =3D 6, + .mipi_ctrl0 =3D rkcif_rk3588_mipi_ctrl0, + .regs =3D { + [RKCIF_MIPI_CTRL] =3D 0x20, + [RKCIF_MIPI_INTEN] =3D 0x74, + [RKCIF_MIPI_INTSTAT] =3D 0x78, + }, + .regs_id =3D { + [RKCIF_ID0] =3D { + [RKCIF_MIPI_CTRL0] =3D 0x00, + [RKCIF_MIPI_CTRL1] =3D 0x04, + [RKCIF_MIPI_FRAME0_ADDR_Y] =3D 0x24, + [RKCIF_MIPI_FRAME0_ADDR_UV] =3D 0x2c, + [RKCIF_MIPI_FRAME0_VLW_Y] =3D 0x34, + [RKCIF_MIPI_FRAME0_VLW_UV] =3D RKCIF_REGISTER_NOTSUPPORTED, + [RKCIF_MIPI_FRAME1_ADDR_Y] =3D 0x28, + [RKCIF_MIPI_FRAME1_ADDR_UV] =3D 0x30, + [RKCIF_MIPI_FRAME1_VLW_Y] =3D RKCIF_REGISTER_NOTSUPPORTED, + [RKCIF_MIPI_FRAME1_VLW_UV] =3D RKCIF_REGISTER_NOTSUPPORTED, + [RKCIF_MIPI_CROP_START] =3D 0x8c, + }, + [RKCIF_ID1] =3D { + [RKCIF_MIPI_CTRL0] =3D 0x08, + [RKCIF_MIPI_CTRL1] =3D 0x0c, + [RKCIF_MIPI_FRAME0_ADDR_Y] =3D 0x38, + [RKCIF_MIPI_FRAME0_ADDR_UV] =3D 0x40, + [RKCIF_MIPI_FRAME0_VLW_Y] =3D 0x48, + [RKCIF_MIPI_FRAME0_VLW_UV] =3D RKCIF_REGISTER_NOTSUPPORTED, + [RKCIF_MIPI_FRAME1_ADDR_Y] =3D 0x3c, + [RKCIF_MIPI_FRAME1_ADDR_UV] =3D 0x44, + [RKCIF_MIPI_FRAME1_VLW_Y] =3D RKCIF_REGISTER_NOTSUPPORTED, + [RKCIF_MIPI_FRAME1_VLW_UV] =3D RKCIF_REGISTER_NOTSUPPORTED, + [RKCIF_MIPI_CROP_START] =3D 0x90, + }, + [RKCIF_ID2] =3D { + [RKCIF_MIPI_CTRL0] =3D 0x10, + [RKCIF_MIPI_CTRL1] =3D 0x14, + [RKCIF_MIPI_FRAME0_ADDR_Y] =3D 0x4c, + [RKCIF_MIPI_FRAME0_ADDR_UV] =3D 0x54, + [RKCIF_MIPI_FRAME0_VLW_Y] =3D 0x5c, + [RKCIF_MIPI_FRAME0_VLW_UV] =3D RKCIF_REGISTER_NOTSUPPORTED, + [RKCIF_MIPI_FRAME1_ADDR_Y] =3D 0x50, + [RKCIF_MIPI_FRAME1_ADDR_UV] =3D 0x58, + [RKCIF_MIPI_FRAME1_VLW_Y] =3D RKCIF_REGISTER_NOTSUPPORTED, + [RKCIF_MIPI_FRAME1_VLW_UV] =3D RKCIF_REGISTER_NOTSUPPORTED, + [RKCIF_MIPI_CROP_START] =3D 0x94, + }, + [RKCIF_ID3] =3D { + [RKCIF_MIPI_CTRL0] =3D 0x18, + [RKCIF_MIPI_CTRL1] =3D 0x1c, + [RKCIF_MIPI_FRAME0_ADDR_Y] =3D 0x60, + [RKCIF_MIPI_FRAME0_ADDR_UV] =3D 0x68, + [RKCIF_MIPI_FRAME0_VLW_Y] =3D 0x70, + [RKCIF_MIPI_FRAME0_VLW_UV] =3D RKCIF_REGISTER_NOTSUPPORTED, + [RKCIF_MIPI_FRAME1_ADDR_Y] =3D 0x64, + [RKCIF_MIPI_FRAME1_ADDR_UV] =3D 0x6c, + [RKCIF_MIPI_FRAME1_VLW_Y] =3D RKCIF_REGISTER_NOTSUPPORTED, + [RKCIF_MIPI_FRAME1_VLW_UV] =3D RKCIF_REGISTER_NOTSUPPORTED, + [RKCIF_MIPI_CROP_START] =3D 0x98, + }, + }, + .blocks =3D { + { + .offset =3D 0x100, + }, + { + .offset =3D 0x200, + }, + { + .offset =3D 0x300, + }, + { + .offset =3D 0x400, + }, + { + .offset =3D 0x500, + }, + { + .offset =3D 0x600, + }, + }, +}; + static inline unsigned int rkcif_mipi_get_reg(struct rkcif_interface *inte= rface, unsigned int index) { @@ -631,6 +765,8 @@ static int rkcif_mipi_start_streaming(struct rkcif_stre= am *stream) rkcif_mipi_stream_write(stream, RKCIF_MIPI_CTRL1, ctrl1); rkcif_mipi_stream_write(stream, RKCIF_MIPI_CTRL0, ctrl0); =20 + rkcif_mipi_write(interface, RKCIF_MIPI_CTRL, RKCIF_MIPI_CTRL_CAP_EN); + ret =3D 0; =20 out: diff --git a/drivers/media/platform/rockchip/rkcif/rkcif-capture-mipi.h b/d= rivers/media/platform/rockchip/rkcif/rkcif-capture-mipi.h index 7f16eadc474c..7edaca44f653 100644 --- a/drivers/media/platform/rockchip/rkcif/rkcif-capture-mipi.h +++ b/drivers/media/platform/rockchip/rkcif/rkcif-capture-mipi.h @@ -13,6 +13,7 @@ #include "rkcif-common.h" =20 extern const struct rkcif_mipi_match_data rkcif_rk3568_vicap_mipi_match_da= ta; +extern const struct rkcif_mipi_match_data rkcif_rk3588_vicap_mipi_match_da= ta; =20 int rkcif_mipi_register(struct rkcif_device *rkcif); =20 diff --git a/drivers/media/platform/rockchip/rkcif/rkcif-common.h b/drivers= /media/platform/rockchip/rkcif/rkcif-common.h index dd92cfbc879f..4d9211ba9bda 100644 --- a/drivers/media/platform/rockchip/rkcif/rkcif-common.h +++ b/drivers/media/platform/rockchip/rkcif/rkcif-common.h @@ -27,7 +27,7 @@ #include "rkcif-regs.h" =20 #define RKCIF_DRIVER_NAME "rockchip-cif" -#define RKCIF_CLK_MAX 4 +#define RKCIF_CLK_MAX 5 =20 enum rkcif_format_type { RKCIF_FMT_TYPE_INVALID, diff --git a/drivers/media/platform/rockchip/rkcif/rkcif-dev.c b/drivers/me= dia/platform/rockchip/rkcif/rkcif-dev.c index b4cf1146f131..c8542398b7f0 100644 --- a/drivers/media/platform/rockchip/rkcif/rkcif-dev.c +++ b/drivers/media/platform/rockchip/rkcif/rkcif-dev.c @@ -53,6 +53,20 @@ static const struct rkcif_match_data rk3568_vicap_match_= data =3D { .mipi =3D &rkcif_rk3568_vicap_mipi_match_data, }; =20 +static const char *const rk3588_vicap_clks[] =3D { + "aclk", + "hclk", + "dclk", + "iclk0", + "iclk1", +}; + +static const struct rkcif_match_data rk3588_vicap_match_data =3D { + .clks =3D rk3588_vicap_clks, + .clks_num =3D ARRAY_SIZE(rk3588_vicap_clks), + .mipi =3D &rkcif_rk3588_vicap_mipi_match_data, +}; + static const struct of_device_id rkcif_plat_of_match[] =3D { { .compatible =3D "rockchip,px30-vip", @@ -62,6 +76,10 @@ static const struct of_device_id rkcif_plat_of_match[] = =3D { .compatible =3D "rockchip,rk3568-vicap", .data =3D &rk3568_vicap_match_data, }, + { + .compatible =3D "rockchip,rk3588-vicap", + .data =3D &rk3588_vicap_match_data, + }, {} }; MODULE_DEVICE_TABLE(of, rkcif_plat_of_match); --=20 2.39.5 From nobody Mon Apr 6 23:36:57 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 56BCB36C599; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250430-rk3588-vicap-v2-4-77de5ee9048e@collabora.com> References: <20250430-rk3588-vicap-v2-0-77de5ee9048e@collabora.com> In-Reply-To: <20250430-rk3588-vicap-v2-0-77de5ee9048e@collabora.com> To: Mehdi Djait , Laurent Pinchart , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Kever Yang , Jagan Teki , =?utf-8?q?=D0=9A=D1=83=D0=B7=D0=BD=D0=B5=D1=86=D0=BE=D0=B2_=D0=9C=D0=B8=D1=85=D0=B0=D0=B8=D0=BB?= , Sebastian Reichel , Nicolas Dufresne , Collabora Kernel Team , Sakari Ailus Cc: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Michael Riesch X-Mailer: b4 0.12.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1773739942; l=1219; i=michael.riesch@collabora.com; s=20250410; h=from:subject:message-id; bh=/GzYE6Y65z4sqAFCGq0r5VgZhg70cR93RCV+j70gjCI=; b=EsCexHaXRnuve5IWe2UkP6w6t8XbFF7d9ELL0LCXKwkUsDCDUJI2xIvqYl2wO4SL3lEI9lYbh LVUzW+l58xtBk8vwrBfiDN0iez4A1eFjEbAlqJv9xK1uT4qnLTV5AGZ X-Developer-Key: i=michael.riesch@collabora.com; a=ed25519; pk=+MWX1fffLFZtTPG/I6XdYm/+OSvpRE8D9evQaWbiN04= X-Endpoint-Received: by B4 Relay for michael.riesch@collabora.com/20250410 with auth_id=371 X-Original-From: Michael Riesch Reply-To: michael.riesch@collabora.com From: Michael Riesch This patch is discussed over at https://lore.kernel.org/all/20260305-rk3588-csi2rx-v2-0-79d01b615486@collab= ora.com included here for testing purposes only. The RK3588 MIPI CSI-2 receivers are compatible to the ones found in the RK3568. Introduce a list of compatible variants and add the RK3588 variant to it. Signed-off-by: Michael Riesch --- .../devicetree/bindings/media/rockchip,rk3568-mipi-csi2.yaml | 8 ++++= ++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/media/rockchip,rk3568-mipi-c= si2.yaml b/Documentation/devicetree/bindings/media/rockchip,rk3568-mipi-csi= 2.yaml index 2c2bd87582eb..5e864e92f8a8 100644 --- a/Documentation/devicetree/bindings/media/rockchip,rk3568-mipi-csi2.yaml +++ b/Documentation/devicetree/bindings/media/rockchip,rk3568-mipi-csi2.yaml @@ -16,8 +16,12 @@ description: =20 properties: compatible: - enum: - - rockchip,rk3568-mipi-csi2 + oneOf: + - const: rockchip,rk3568-mipi-csi2 + - items: + - enum: + - rockchip,rk3588-mipi-csi2 + - const: rockchip,rk3568-mipi-csi2 =20 reg: maxItems: 1 --=20 2.39.5 From nobody Mon Apr 6 23:36:57 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 689A436EAB3; Tue, 17 Mar 2026 09:32:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773739944; cv=none; b=lqdE7vxBflQyjHJb8v+fw8h7T3YkD7eb8l6kPM6yL/bH6VE0lxkRoNppRZiB3+xor0x3AhX/xzyAPcJSOvjSmJ3RIbiO/Vy2IDKnf8Gt/+AAfk9rM/XoOgU9BOIm/05AV14GPLBuEpA2Cmr6pnNTOcDOvNeuhMAztR6MyrR0PKQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773739944; c=relaxed/simple; bh=FhTQ5SVdxITPm8tDe0bW/0ZG36G8hCk0e58aJbKwRGQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=pH3g1BCrCbkfQp8Antysu01F8oQiNbqbAdmX9sdPZwiokImTnaSbhFMWgfuVXK76P5GjOjB7Ppdc/FMLW81HSCczngY2S+sCZ3ECzQzefZfTKR3NTVmwVhkWCYcSMmlqot/r3K7aRLhG/xtZtGhZ53cyZqT5Wlt87DyH1Ft7rik= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=NWeimc5d; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="NWeimc5d" Received: by smtp.kernel.org (Postfix) with ESMTPS id 37BEBC2BCB8; Tue, 17 Mar 2026 09:32:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1773739944; bh=FhTQ5SVdxITPm8tDe0bW/0ZG36G8hCk0e58aJbKwRGQ=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=NWeimc5d6KUL7jG80958m4/U2fgofL8fE2HkzI8dX7zmu4fB662u1ALzAPkMQx/2h f7s+14CQwiTz8S97Hrm+wyN8iCO81QQfXXH7pQIop5OE6VQy5cMkeDr7V68TpbqqJ+ 6pCvNcy5Fv9jWxxgl80a3m2Pdoi2vpfB1fb9jqetzzTP/qqV0KXBkkWw62SWX2ciGJ cWFCmHVnMcizUCvwiAA24bP2ip7nhjCuqlhUnwk/s6ENc2DCttMmt9gD7aa8UxhG64 OSrhFxXeGieiw7z6JebiLHf79s7EP6sZkSRqlAv0y610GC+WgbWkQ7ktgGpvtet2Gq yCjFlqPkgQxuQ== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2B19CF33820; Tue, 17 Mar 2026 09:32:24 +0000 (UTC) From: Michael Riesch via B4 Relay Date: Tue, 17 Mar 2026 10:32:23 +0100 Subject: [PATCH DONOTMERGE v2 5/9] arm64: dts: rockchip: add mipi csi-2 receiver nodes to rk3588 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250430-rk3588-vicap-v2-5-77de5ee9048e@collabora.com> References: <20250430-rk3588-vicap-v2-0-77de5ee9048e@collabora.com> In-Reply-To: <20250430-rk3588-vicap-v2-0-77de5ee9048e@collabora.com> To: Mehdi Djait , Laurent Pinchart , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Kever Yang , Jagan Teki , =?utf-8?q?=D0=9A=D1=83=D0=B7=D0=BD=D0=B5=D1=86=D0=BE=D0=B2_=D0=9C=D0=B8=D1=85=D0=B0=D0=B8=D0=BB?= , Sebastian Reichel , Nicolas Dufresne , Collabora Kernel Team , Sakari Ailus Cc: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Michael Riesch X-Mailer: b4 0.12.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1773739942; l=2664; i=michael.riesch@collabora.com; s=20250410; h=from:subject:message-id; bh=5oU0klzEB2FubzgZ+1XdUaBRRnzqz5jTIQAtdWBAHeM=; b=BSVyZ9aTWAGIG0h0pHTDryOMNXpZvrb4MyDjA0qEhp1rl/gsB7DgNbFaIo04IKCjWXUAVvk5I p4Xqq2hJSd3D79nDQ46CIMWkfmNNwSWyE4DYMk7AOwEk6deVPY1ZlvG X-Developer-Key: i=michael.riesch@collabora.com; a=ed25519; pk=+MWX1fffLFZtTPG/I6XdYm/+OSvpRE8D9evQaWbiN04= X-Endpoint-Received: by B4 Relay for michael.riesch@collabora.com/20250410 with auth_id=371 X-Original-From: Michael Riesch Reply-To: michael.riesch@collabora.com From: Michael Riesch This patch is discussed over at https://lore.kernel.org/all/20260305-rk3588-csi2rx-v2-0-79d01b615486@collab= ora.com included here for testing purposes only. The Rockchip RK3588 features six MIPI CSI-2 receiver units: - MIPI0: connected to MIPI DCPHY0 (not supported) - MIPI1: connected to MIPI DCPHY1 (not supported) - MIPI2: connected to MIPI DPHY0 - MIPI3: connected to MIPI DPHY0-1 (not supported) - MIPI4: connected to MIPI DPHY1 - MIPI5: connected to MIPI DPHY1-1 (not supported) As the MIPI DCPHYs as well as the split DPHY mode of the DPHYs are not yet supported, add only the device tree nodes for the MIPI2 and MIPI4 units. Signed-off-by: Michael Riesch --- arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 52 +++++++++++++++++++++++= ++++ 1 file changed, 52 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi b/arch/arm64/boo= t/dts/rockchip/rk3588-base.dtsi index 7fe9593d8c19..6c593b0255c3 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi @@ -1430,6 +1430,58 @@ av1d: video-codec@fdc70000 { resets =3D <&cru SRST_A_AV1>, <&cru SRST_P_AV1>, <&cru SRST_A_AV1_BIU>, = <&cru SRST_P_AV1_BIU>; }; =20 + csi2: csi@fdd30000 { + compatible =3D "rockchip,rk3588-mipi-csi2", "rockchip,rk3568-mipi-csi2"; + reg =3D <0x0 0xfdd30000 0x0 0x10000>; + interrupts =3D , + ; + interrupt-names =3D "err1", "err2"; + clocks =3D <&cru PCLK_CSI_HOST_2>; + phys =3D <&csi_dphy0>; + power-domains =3D <&power RK3588_PD_VI>; + resets =3D <&cru SRST_P_CSI_HOST_2>; + status =3D "disabled"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + csi2_in: port@0 { + reg =3D <0>; + }; + + csi2_out: port@1 { + reg =3D <1>; + }; + }; + }; + + csi4: csi@fdd50000 { + compatible =3D "rockchip,rk3588-mipi-csi2", "rockchip,rk3568-mipi-csi2"; + reg =3D <0x0 0xfdd50000 0x0 0x10000>; + interrupts =3D , + ; + interrupt-names =3D "err1", "err2"; + clocks =3D <&cru PCLK_CSI_HOST_4>; + phys =3D <&csi_dphy1>; + power-domains =3D <&power RK3588_PD_VI>; + resets =3D <&cru SRST_P_CSI_HOST_4>; + status =3D "disabled"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + csi4_in: port@0 { + reg =3D <0>; + }; + + csi4_out: port@1 { + reg =3D <1>; + }; + }; + }; + vop: vop@fdd90000 { compatible =3D "rockchip,rk3588-vop"; reg =3D <0x0 0xfdd90000 0x0 0x4200>, <0x0 0xfdd95000 0x0 0x1000>; --=20 2.39.5 From nobody Mon Apr 6 23:36:57 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7A4D8370D73; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250430-rk3588-vicap-v2-6-77de5ee9048e@collabora.com> References: <20250430-rk3588-vicap-v2-0-77de5ee9048e@collabora.com> In-Reply-To: <20250430-rk3588-vicap-v2-0-77de5ee9048e@collabora.com> To: Mehdi Djait , Laurent Pinchart , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Kever Yang , Jagan Teki , =?utf-8?q?=D0=9A=D1=83=D0=B7=D0=BD=D0=B5=D1=86=D0=BE=D0=B2_=D0=9C=D0=B8=D1=85=D0=B0=D0=B8=D0=BB?= , Sebastian Reichel , Nicolas Dufresne , Collabora Kernel Team , Sakari Ailus Cc: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Michael Riesch X-Mailer: b4 0.12.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1773739942; l=3247; i=michael.riesch@collabora.com; s=20250410; h=from:subject:message-id; bh=5m1TI1JCn0xwCW+Lu2Bsv0EUfJ/OG5gXux9j14Zr9GY=; b=Jr6sXsKfwnr0bmWI3Yvmdj194JbzH2OSGEd5CZTQy08iQxtnCkpLO4pfJQ5WcGS6oatN9qCbh 8oRfDgSG5L1AnZmZxUKteBXGrPXuUmMArbhP500bubx4cmhP3jz2axb X-Developer-Key: i=michael.riesch@collabora.com; a=ed25519; pk=+MWX1fffLFZtTPG/I6XdYm/+OSvpRE8D9evQaWbiN04= X-Endpoint-Received: by B4 Relay for michael.riesch@collabora.com/20250410 with auth_id=371 X-Original-From: Michael Riesch Reply-To: michael.riesch@collabora.com From: Michael Riesch Add the device tree node for the RK3588 Video Capture (VICAP) unit. Signed-off-by: Michael Riesch --- arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 91 +++++++++++++++++++++++= ++++ 1 file changed, 91 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi b/arch/arm64/boo= t/dts/rockchip/rk3588-base.dtsi index 6c593b0255c3..9c5b68fd02c7 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi @@ -1430,6 +1430,89 @@ av1d: video-codec@fdc70000 { resets =3D <&cru SRST_A_AV1>, <&cru SRST_P_AV1>, <&cru SRST_A_AV1_BIU>, = <&cru SRST_P_AV1_BIU>; }; =20 + vicap: video-capture@fdce0000 { + compatible =3D "rockchip,rk3588-vicap"; + reg =3D <0x0 0xfdce0000 0x0 0x800>; + interrupts =3D ; + clocks =3D <&cru ACLK_VICAP>, <&cru HCLK_VICAP>, + <&cru DCLK_VICAP>, <&cru ICLK_CSIHOST0>, + <&cru ICLK_CSIHOST1>; + clock-names =3D "aclk", "hclk", "dclk", "iclk0", "iclk1"; + iommus =3D <&vicap_mmu>; + power-domains =3D <&power RK3588_PD_VI>; + resets =3D <&cru SRST_A_VICAP>, <&cru SRST_H_VICAP>, + <&cru SRST_D_VICAP>, <&cru SRST_CSIHOST0_VICAP>, + <&cru SRST_CSIHOST1_VICAP>, + <&cru SRST_CSIHOST2_VICAP>, + <&cru SRST_CSIHOST3_VICAP>, + <&cru SRST_CSIHOST4_VICAP>, + <&cru SRST_CSIHOST5_VICAP>; + reset-names =3D "arst", "hrst", "drst", "irst0", "irst1", + "irst2", "irst3", "irst4", "irst5"; + status =3D "disabled"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + vicap_dvp: port@0 { + reg =3D <0>; + }; + + vicap_mipi0: port@1 { + reg =3D <1>; + }; + + vicap_mipi1: port@2 { + reg =3D <2>; + }; + + vicap_mipi2: port@3 { + reg =3D <3>; + + vicap_mipi2_input: endpoint { + remote-endpoint =3D <&csi2_output>; + }; + }; + + vicap_mipi3: port@4 { + reg =3D <4>; + }; + + vicap_mipi4: port@5 { + reg =3D <5>; + + vicap_mipi4_input: endpoint { + remote-endpoint =3D <&csi4_output>; + }; + }; + + vicap_mipi5: port@6 { + reg =3D <6>; + }; + + vicap_toisp0: port@10 { + reg =3D <10>; + }; + + vicap_toisp1: port@11 { + reg =3D <11>; + }; + }; + }; + + vicap_mmu: iommu@fdce0800 { + compatible =3D "rockchip,rk3588-iommu", "rockchip,rk3568-iommu"; + reg =3D <0x0 0xfdce0800 0x0 0x40>, <0x0 0xfdce0900 0x0 0x40>; + interrupts =3D ; + clocks =3D <&cru ACLK_VICAP>, <&cru HCLK_VICAP>; + clock-names =3D "aclk", "iface"; + #iommu-cells =3D <0>; + power-domains =3D <&power RK3588_PD_VI>; + rockchip,disable-mmu-reset; + status =3D "disabled"; + }; + csi2: csi@fdd30000 { compatible =3D "rockchip,rk3588-mipi-csi2", "rockchip,rk3568-mipi-csi2"; reg =3D <0x0 0xfdd30000 0x0 0x10000>; @@ -1452,6 +1535,10 @@ csi2_in: port@0 { =20 csi2_out: port@1 { reg =3D <1>; + + csi2_output: endpoint { + remote-endpoint =3D <&vicap_mipi2_input>; + }; }; }; }; @@ -1478,6 +1565,10 @@ csi4_in: port@0 { =20 csi4_out: port@1 { reg =3D <1>; + + csi4_output: endpoint { + remote-endpoint =3D <&vicap_mipi4_input>; + }; }; }; }; --=20 2.39.5 From nobody Mon Apr 6 23:36:57 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8D460371879; Tue, 17 Mar 2026 09:32:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250430-rk3588-vicap-v2-7-77de5ee9048e@collabora.com> References: <20250430-rk3588-vicap-v2-0-77de5ee9048e@collabora.com> In-Reply-To: <20250430-rk3588-vicap-v2-0-77de5ee9048e@collabora.com> To: Mehdi Djait , Laurent Pinchart , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Kever Yang , Jagan Teki , =?utf-8?q?=D0=9A=D1=83=D0=B7=D0=BD=D0=B5=D1=86=D0=BE=D0=B2_=D0=9C=D0=B8=D1=85=D0=B0=D0=B8=D0=BB?= , Sebastian Reichel , Nicolas Dufresne , Collabora Kernel Team , Sakari Ailus Cc: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Michael Riesch X-Mailer: b4 0.12.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1773739942; l=3957; i=michael.riesch@collabora.com; s=20250410; h=from:subject:message-id; bh=0IGxS8JbtLH7trkBy9V2Ur/nAvpqj7WKMLLd/LMBhQs=; b=bjZl9IwqOmybyyMWJZUOQLn6j/43QSGHZEYxDQkRk2vqof/aQ498l5lF1T9jzTcxJH+/d4Nyt UGZv3PZw0vbDOPVfoRLY7uuaE72p0/kd3/hrrF3lOfaed2vOSeUsVbj X-Developer-Key: i=michael.riesch@collabora.com; a=ed25519; pk=+MWX1fffLFZtTPG/I6XdYm/+OSvpRE8D9evQaWbiN04= X-Endpoint-Received: by B4 Relay for michael.riesch@collabora.com/20250410 with auth_id=371 X-Original-From: Michael Riesch Reply-To: michael.riesch@collabora.com From: Michael Riesch Add device tree overlay for the Radxa Camera 4K (featuring the Sony IMX415 image sensor) to applied on the Radxa ROCK 5B+ CAM0 port. Signed-off-by: Michael Riesch --- arch/arm64/boot/dts/rockchip/Makefile | 5 ++ .../rk3588-rock-5b-plus-radxa-cam4k-cam0.dtso | 89 ++++++++++++++++++= ++++ 2 files changed, 94 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/ro= ckchip/Makefile index 4d384f153c13..77c587f43dda 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -199,6 +199,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-rock-5b.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-rock-5b-pcie-ep.dtbo dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-rock-5b-pcie-srns.dtbo dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-rock-5b-plus.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-rock-5b-plus-radxa-cam4k-cam0.dtbo dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-rock-5t.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-tiger-haikou.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-tiger-haikou-video-demo.dtbo @@ -298,6 +299,10 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-rock-5b-pcie-s= rns.dtb rk3588-rock-5b-pcie-srns-dtbs :=3D rk3588-rock-5b.dtb \ rk3588-rock-5b-pcie-srns.dtbo =20 +dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-rock-5b-plus-radxa-4k-cam.dtb +rk3588-rock-5b-plus-radxa-4k-cam-dtbs :=3D rk3588-rock-5b-plus.dtb \ + rk3588-rock-5b-plus-radxa-cam4k-cam0.dtbo + dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-tiger-haikou-haikou-video-demo.dtb rk3588-tiger-haikou-haikou-video-demo-dtbs :=3D rk3588-tiger-haikou.dtb \ rk3588-tiger-haikou-video-demo.dtbo diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus-radxa-cam4k-c= am0.dtso b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus-radxa-cam4k-cam= 0.dtso new file mode 100644 index 000000000000..c107c74c2188 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus-radxa-cam4k-cam0.dtso @@ -0,0 +1,89 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Device tree overlay for the Radxa Camera 4K attached to the CAM0 port of + * the Radxa ROCK 5B+. + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include + +&{/} { + vcc_cam0: regulator-vcc-cam0 { + compatible =3D "regulator-fixed"; + enable-active-high; + gpio =3D <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&cam0_power0_en>; + regulator-name =3D "vcc_cam0"; + vin-supply =3D <&vcc_3v3_s3>; + }; +}; + +&i2c3 { + #address-cells =3D <1>; + #size-cells =3D <0>; + status =3D "okay"; + + imx415: camera-sensor@1a { + compatible =3D "sony,imx415"; + reg =3D <0x1a>; + assigned-clocks =3D <&cru CLK_MIPI_CAMARAOUT_M3>; + assigned-clock-rates =3D <37125000>; + avdd-supply =3D <&vcc_cam0>; + clocks =3D <&cru CLK_MIPI_CAMARAOUT_M3>; + dvdd-supply =3D <&vcc_cam0>; + orientation =3D <2>; /* External */ + ovdd-supply =3D <&vcc_cam0>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&cam0_rstn &mipim0_camera3_clk>; + reset-gpios =3D <&gpio4 RK_PA0 GPIO_ACTIVE_LOW>; + + port { + imx415_output: endpoint { + data-lanes =3D <1 2 3 4>; + link-frequencies =3D /bits/ 64 <445500000>; + remote-endpoint =3D <&csi2_input>; + }; + }; + }; +}; + +&pinctrl { + cam0 { + cam0_power0_en: cam0-power0-en-pinctrl { + rockchip,pins =3D <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + cam0_rstn: cam0-rstn-pinctrl { + rockchip,pins =3D <4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&csi2 { + status =3D "okay"; +}; + +&csi2_in { + csi2_input: endpoint { + data-lanes =3D <1 2 3 4>; + link-frequencies =3D /bits/ 64 <445500000>; + remote-endpoint =3D <&imx415_output>; + }; +}; + +&csi_dphy0 { + status =3D "okay"; +}; + +&vicap { + status =3D "okay"; +}; + +&vicap_mmu { + status =3D "okay"; +}; --=20 2.39.5 From nobody Mon Apr 6 23:36:57 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9E2B737189E; Tue, 17 Mar 2026 09:32:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250430-rk3588-vicap-v2-8-77de5ee9048e@collabora.com> References: <20250430-rk3588-vicap-v2-0-77de5ee9048e@collabora.com> In-Reply-To: <20250430-rk3588-vicap-v2-0-77de5ee9048e@collabora.com> To: Mehdi Djait , Laurent Pinchart , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Kever Yang , Jagan Teki , =?utf-8?q?=D0=9A=D1=83=D0=B7=D0=BD=D0=B5=D1=86=D0=BE=D0=B2_=D0=9C=D0=B8=D1=85=D0=B0=D0=B8=D0=BB?= , Sebastian Reichel , Nicolas Dufresne , Collabora Kernel Team , Sakari Ailus Cc: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Michael Riesch X-Mailer: b4 0.12.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1773739942; l=3967; i=michael.riesch@collabora.com; s=20250410; h=from:subject:message-id; bh=/xz9Ovdx8s36O++AwAB8xnz6JsWAcvoIzDlRdwqiUzw=; b=k70GfUEwfQXAxmBZBbhrYlw6Q2J4Gj6ZtvJ5mdxNWq6jLN+ynr+onqXffiwsu20Im2vdI02ZY EMzIgP/gFONDXGHFrlGU2R4vzB1xdIKsgFlanm5/1BBhawxpuSGcF6H X-Developer-Key: i=michael.riesch@collabora.com; a=ed25519; pk=+MWX1fffLFZtTPG/I6XdYm/+OSvpRE8D9evQaWbiN04= X-Endpoint-Received: by B4 Relay for michael.riesch@collabora.com/20250410 with auth_id=371 X-Original-From: Michael Riesch Reply-To: michael.riesch@collabora.com From: Michael Riesch Add device tree overlay for the Radxa Camera 4K (featuring the Sony IMX415 image sensor) to applied on the Radxa ROCK 5B+ CAM1 port. Signed-off-by: Michael Riesch --- arch/arm64/boot/dts/rockchip/Makefile | 4 +- .../rk3588-rock-5b-plus-radxa-cam4k-cam1.dtso | 89 ++++++++++++++++++= ++++ 2 files changed, 92 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/ro= ckchip/Makefile index 77c587f43dda..191666821a80 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -200,6 +200,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-rock-5b-pcie-ep= .dtbo dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-rock-5b-pcie-srns.dtbo dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-rock-5b-plus.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-rock-5b-plus-radxa-cam4k-cam0.dtbo +dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-rock-5b-plus-radxa-cam4k-cam1.dtbo dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-rock-5t.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-tiger-haikou.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-tiger-haikou-video-demo.dtbo @@ -301,7 +302,8 @@ rk3588-rock-5b-pcie-srns-dtbs :=3D rk3588-rock-5b.dtb \ =20 dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-rock-5b-plus-radxa-4k-cam.dtb rk3588-rock-5b-plus-radxa-4k-cam-dtbs :=3D rk3588-rock-5b-plus.dtb \ - rk3588-rock-5b-plus-radxa-cam4k-cam0.dtbo + rk3588-rock-5b-plus-radxa-cam4k-cam0.dtbo \ + rk3588-rock-5b-plus-radxa-cam4k-cam1.dtbo =20 dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-tiger-haikou-haikou-video-demo.dtb rk3588-tiger-haikou-haikou-video-demo-dtbs :=3D rk3588-tiger-haikou.dtb \ diff --git a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus-radxa-cam4k-c= am1.dtso b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus-radxa-cam4k-cam= 1.dtso new file mode 100644 index 000000000000..8e586950d0c0 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b-plus-radxa-cam4k-cam1.dtso @@ -0,0 +1,89 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Device tree overlay for the Radxa Camera 4K attached to the CAM1 port of + * the Radxa ROCK 5B+. + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include + +&{/} { + vcc_cam1: regulator-vcc-cam1 { + compatible =3D "regulator-fixed"; + enable-active-high; + gpio =3D <&gpio2 RK_PA6 GPIO_ACTIVE_HIGH>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&cam1_power0_en>; + regulator-name =3D "vcc_cam1"; + vin-supply =3D <&vcc_3v3_s3>; + }; +}; + +&i2c4 { + #address-cells =3D <1>; + #size-cells =3D <0>; + status =3D "okay"; + + cam1_imx415: camera-sensor@1a { + compatible =3D "sony,imx415"; + reg =3D <0x1a>; + assigned-clocks =3D <&cru CLK_MIPI_CAMARAOUT_M4>; + assigned-clock-rates =3D <37125000>; + avdd-supply =3D <&vcc_cam1>; + clocks =3D <&cru CLK_MIPI_CAMARAOUT_M4>; + dvdd-supply =3D <&vcc_cam1>; + orientation =3D <2>; /* External */ + ovdd-supply =3D <&vcc_cam1>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&cam1_rstn &mipim0_camera4_clk>; + reset-gpios =3D <&gpio2 RK_PB0 GPIO_ACTIVE_LOW>; + + port { + cam1_imx415_output: endpoint { + data-lanes =3D <1 2 3 4>; + link-frequencies =3D /bits/ 64 <445500000>; + remote-endpoint =3D <&csi4_input>; + }; + }; + }; +}; + +&pinctrl { + cam1 { + cam1_power0_en: cam1-power0-en-pinctrl { + rockchip,pins =3D <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + cam1_rstn: cam1-rstn-pinctrl { + rockchip,pins =3D <2 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&csi4 { + status =3D "okay"; +}; + +&csi4_in { + csi4_input: endpoint { + data-lanes =3D <1 2 3 4>; + link-frequencies =3D /bits/ 64 <445500000>; + remote-endpoint =3D <&cam1_imx415_output>; + }; +}; + +&csi_dphy1 { + status =3D "okay"; +}; + +&vicap { + status =3D "okay"; +}; + +&vicap_mmu { + status =3D "okay"; +}; --=20 2.39.5 From nobody Mon Apr 6 23:36:57 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C5DAF3750B2; Tue, 17 Mar 2026 09:32:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250430-rk3588-vicap-v2-9-77de5ee9048e@collabora.com> References: <20250430-rk3588-vicap-v2-0-77de5ee9048e@collabora.com> In-Reply-To: <20250430-rk3588-vicap-v2-0-77de5ee9048e@collabora.com> To: Mehdi Djait , Laurent Pinchart , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Kever Yang , Jagan Teki , =?utf-8?q?=D0=9A=D1=83=D0=B7=D0=BD=D0=B5=D1=86=D0=BE=D0=B2_=D0=9C=D0=B8=D1=85=D0=B0=D0=B8=D0=BB?= , Sebastian Reichel , Nicolas Dufresne , Collabora Kernel Team , Sakari Ailus Cc: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Michael Riesch X-Mailer: b4 0.12.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1773739942; l=937; i=michael.riesch@collabora.com; s=20250410; h=from:subject:message-id; bh=mcrIEvEtgTS/gcjDOYC5aehK60tx7gRZsU5sHfBlIbc=; b=A+dG1JrGPklOpVqi49SnGtHySOkEJ6dXRyta+U/NOVzew5dJYC9Ye71CQKLmcW9UbEbrUNtZC O/GQT0mD4xxDscHEKg2arA9q0U63v5adbUw2PDPtd/UDe11Ek3S3woD X-Developer-Key: i=michael.riesch@collabora.com; a=ed25519; pk=+MWX1fffLFZtTPG/I6XdYm/+OSvpRE8D9evQaWbiN04= X-Endpoint-Received: by B4 Relay for michael.riesch@collabora.com/20250410 with auth_id=371 X-Original-From: Michael Riesch Reply-To: michael.riesch@collabora.com From: Michael Riesch The Synopsys DesignWare MIPI CSI-2 Receiver is integrated into recent Rockchip SoCs, such as the RK3568 and the RK3588. As a consequence, they are used on a lot of Rockchip-based single board computers and/or corresponding camera modules, such as the Radxa Camera 4K. Enable the driver for it in the default configuration. Signed-off-by: Michael Riesch Reviewed-by: Mehdi Djait --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig index b67d5b1fc45b..a93ff73ae52c 100644 --- a/arch/arm64/configs/defconfig +++ b/arch/arm64/configs/defconfig @@ -907,6 +907,7 @@ CONFIG_SDR_PLATFORM_DRIVERS=3Dy CONFIG_V4L_MEM2MEM_DRIVERS=3Dy CONFIG_VIDEO_AMPHION_VPU=3Dm CONFIG_VIDEO_CADENCE_CSI2RX=3Dm +CONFIG_VIDEO_DW_MIPI_CSI2RX=3Dm CONFIG_VIDEO_MEDIATEK_JPEG=3Dm CONFIG_VIDEO_MEDIATEK_VCODEC=3Dm CONFIG_VIDEO_WAVE_VPU=3Dm --=20 2.39.5