From nobody Tue Apr 7 12:57:28 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B85783ACA59; Fri, 13 Mar 2026 15:20:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773415246; cv=none; b=QjPXBFpOCBrvf3GfiQ/fzVBaPmTcZFR7sZG8srOdwpBJbrkD9xo+9Bxny/ez+mpCDDTjcpkcSqd1TA3aCgvuZwT1+CRIPIVXzJDa5N7+PXNKj8Uzca5/w684jCeTYOHXY87/d+t6qaJAt13KZE/lrIwWqjZlveTD5zTZifdIbFw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773415246; c=relaxed/simple; bh=1Abada31Dqx6ZPLZWFztF30eFrU/d+kroe2/2a8Mhjw=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=EEcKvaDt4kgYUfSrQ1YWbXUCbp+w3rG90RhjntVyzusbPoxpMhgjDzwHJdJooh9SzpfUViybn+ZhqtckPdDmlk4A9YX/rMH9xVoz3aiJBAk/PFdZ7olhViZ/WppzMzMx4qpMKN35e76TRlm7MHWFQRL1Hz2elh+hfBbPRamh+BY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=kV+Y7+05; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="kV+Y7+05" Received: by smtp.kernel.org (Postfix) with ESMTPS id 7AF8AC2BCB4; Fri, 13 Mar 2026 15:20:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1773415246; bh=1Abada31Dqx6ZPLZWFztF30eFrU/d+kroe2/2a8Mhjw=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=kV+Y7+05DU9zkop3o+p4BzIhBjIuCyNRxGrDsvnp4Ki77/+H2l0SbNiFFBoYT5lLX WOXd6u8ffo7F5gcYlkYFB/o2IrQCKfUQlV8qrJuEXDfaKIp9X5UtXle8FnTKYl9OXP fo2u/Ca/zfYZ8W9Qlcm5GZ5uBph6j2foEz9aBPSF1r044oVXmz4R8IqAn68Aofyvti 1hnDH646xODf3v1Muxtg98dcnwtQSYwdhSuoGqCW7RnRmycd9yvYk034hQqr9rE2xx AFXEvB3DdTka0w23d43pNktXkGEC9euIn9Q5DDn5khBuf2X+Vrn8Ml4YK7Y78CtuQD 0iD2TZyovKiRg== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 736EB105F7B8; Fri, 13 Mar 2026 15:20:46 +0000 (UTC) From: Michael Riesch via B4 Relay Date: Fri, 13 Mar 2026 16:20:48 +0100 Subject: [PATCH 6/9] arm64: dts: rockchip: add vicap node to rk3588 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250430-rk3588-vicap-v1-6-b3bddf749914@collabora.com> References: <20250430-rk3588-vicap-v1-0-b3bddf749914@collabora.com> In-Reply-To: <20250430-rk3588-vicap-v1-0-b3bddf749914@collabora.com> To: Mehdi Djait , Laurent Pinchart , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Kever Yang , Jagan Teki , =?utf-8?q?=D0=9A=D1=83=D0=B7=D0=BD=D0=B5=D1=86=D0=BE=D0=B2_=D0=9C=D0=B8=D1=85=D0=B0=D0=B8=D0=BB?= , Sebastian Reichel , Nicolas Dufresne , Collabora Kernel Team , Sakari Ailus Cc: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Michael Riesch X-Mailer: b4 0.12.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1773415244; l=3136; i=michael.riesch@collabora.com; s=20250410; h=from:subject:message-id; bh=lhhtStvU9KJ5KtPRq641jsKNo7Ekcu2JQR1zIWTa/rU=; b=Dj/JnQqIZbphAyL0wxDZunBFM3jouZROffHfMzlmQ9+dHFgVuiCwctfttMPwS63mqr7cDUsSy t0UKjSU4Zw2A0G0PVH2xZr4uYnbDQJBEf5g0ZbXIswPhtFpWtKA94Av X-Developer-Key: i=michael.riesch@collabora.com; a=ed25519; pk=+MWX1fffLFZtTPG/I6XdYm/+OSvpRE8D9evQaWbiN04= X-Endpoint-Received: by B4 Relay for michael.riesch@collabora.com/20250410 with auth_id=371 X-Original-From: Michael Riesch Reply-To: michael.riesch@collabora.com From: Michael Riesch Add the device tree node for the RK3588 Video Capture (VICAP) unit. Signed-off-by: Michael Riesch --- arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 87 +++++++++++++++++++++++= ++++ 1 file changed, 87 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi b/arch/arm64/boo= t/dts/rockchip/rk3588-base.dtsi index 6c593b0255c3..9019ce0968da 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi @@ -1430,6 +1430,85 @@ av1d: video-codec@fdc70000 { resets =3D <&cru SRST_A_AV1>, <&cru SRST_P_AV1>, <&cru SRST_A_AV1_BIU>, = <&cru SRST_P_AV1_BIU>; }; =20 + vicap: video-capture@fdce0000 { + compatible =3D "rockchip,rk3588-vicap"; + reg =3D <0x0 0xfdce0000 0x0 0x800>; + interrupts =3D ; + clocks =3D <&cru ACLK_VICAP>, <&cru HCLK_VICAP>, + <&cru DCLK_VICAP>, <&cru ICLK_CSIHOST0>, + <&cru ICLK_CSIHOST1>; + clock-names =3D "aclk", "hclk", "dclk", "iclk_host0", "iclk_host1"; + iommus =3D <&vicap_mmu>; + power-domains =3D <&power RK3588_PD_VI>; + resets =3D <&cru SRST_A_VICAP>, <&cru SRST_H_VICAP>, + <&cru SRST_D_VICAP>, <&cru SRST_CSIHOST0_VICAP>, + <&cru SRST_CSIHOST1_VICAP>, <&cru SRST_CSIHOST2_VICAP>, + <&cru SRST_CSIHOST3_VICAP>, <&cru SRST_CSIHOST4_VICAP>, + <&cru SRST_CSIHOST5_VICAP>; + status =3D "disabled"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + vicap_dvp: port@0 { + reg =3D <0>; + }; + + vicap_mipi0: port@1 { + reg =3D <1>; + }; + + vicap_mipi1: port@2 { + reg =3D <2>; + }; + + vicap_mipi2: port@3 { + reg =3D <3>; + + vicap_mipi2_input: endpoint { + remote-endpoint =3D <&csi2_output>; + }; + }; + + vicap_mipi3: port@4 { + reg =3D <4>; + }; + + vicap_mipi4: port@5 { + reg =3D <5>; + + vicap_mipi4_input: endpoint { + remote-endpoint =3D <&csi4_output>; + }; + }; + + vicap_mipi5: port@6 { + reg =3D <6>; + }; + + vicap_toisp0: port@a { + reg =3D <10>; + }; + + vicap_toisp1: port@b { + reg =3D <11>; + }; + }; + }; + + vicap_mmu: iommu@fdce0800 { + compatible =3D "rockchip,rk3588-iommu", "rockchip,rk3568-iommu"; + reg =3D <0x0 0xfdce0800 0x0 0x40>, <0x0 0xfdce0900 0x0 0x40>; + interrupts =3D ; + clocks =3D <&cru ACLK_VICAP>, <&cru HCLK_VICAP>; + clock-names =3D "aclk", "iface"; + #iommu-cells =3D <0>; + power-domains =3D <&power RK3588_PD_VI>; + rockchip,disable-mmu-reset; + status =3D "disabled"; + }; + csi2: csi@fdd30000 { compatible =3D "rockchip,rk3588-mipi-csi2", "rockchip,rk3568-mipi-csi2"; reg =3D <0x0 0xfdd30000 0x0 0x10000>; @@ -1452,6 +1531,10 @@ csi2_in: port@0 { =20 csi2_out: port@1 { reg =3D <1>; + + csi2_output: endpoint { + remote-endpoint =3D <&vicap_mipi2_input>; + }; }; }; }; @@ -1478,6 +1561,10 @@ csi4_in: port@0 { =20 csi4_out: port@1 { reg =3D <1>; + + csi4_output: endpoint { + remote-endpoint =3D <&vicap_mipi4_input>; + }; }; }; }; --=20 2.39.5