From nobody Tue Apr 7 12:57:29 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8C4E53A6EF9; Fri, 13 Mar 2026 15:20:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773415246; cv=none; b=KdAJs14OWAatx2viPpTXiDC+gLMsJH0WMJUBYwZDxkOKWaHfeLrzKd/wvgpmB07abJrld/AK0CcjLN8JQM2SS4rW69l74YOLGqy/cJBl9PMwhRJEkPLYf+yMS1xJF5AokAZi4NccDOt0VRSI4/KoTHJrHZgTF+dqZTk+2oYm+64= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773415246; c=relaxed/simple; bh=JyhRghHnbx06awIzpWkO8caCz4INKebX8x7dUHrYTGw=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=j3EhZbbD20bTnwsAUbWXfDLPNaB4wFnn2o71taMqN/vVK8j13Ftn4t7rt1ko5IJaYlY7k72SuR7gXlf4Jj4cFS7KxgOdtT1sM5xHa5Hh4gF4MlQ1QwYUHCn99XU1LtdIkHT/JEIvLavflqOMU3D1fvtPKcGxg+83zmcM2Le+d0Q= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=TA52wHdf; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="TA52wHdf" Received: by smtp.kernel.org (Postfix) with ESMTPS id 53B67C2BCAF; Fri, 13 Mar 2026 15:20:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1773415246; bh=JyhRghHnbx06awIzpWkO8caCz4INKebX8x7dUHrYTGw=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=TA52wHdfZeJL2oktMXBld3nMYATWrpypLKFwZTYZxWeYEVMorHR6/72CEHYkUnESZ cwBX3IzbhyWV/ZKtc7jn1m88Q+Q9o4r5XpLAIM4YEKlA/ANfUKMgktW2Vp9I1lGtxR LCGVrIrpFjWQpREao+rDV+ncaO+IpjjzHazDYUoxRs4Zk6c555AtGQ3AD6TFsevyzr 9CZIxZqmGw5kMi7qr4BOZ3JH5YiEDDkhdkYWz14dI/AdGBUnPitkXMeXa1oQ5BoT6f LTOrdYwLuvkptnJYqR0uWtz7vOVlDXOqsqwt4WC3OOExErrV0qJ/tGDt42Mkh9IIy1 Aj9sKdMzQlNug== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4A1A1105F797; Fri, 13 Mar 2026 15:20:46 +0000 (UTC) From: Michael Riesch via B4 Relay Date: Fri, 13 Mar 2026 16:20:45 +0100 Subject: [PATCH 3/9] media: rockchip: rkcif: add support for rk3588 vicap mipi capture Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250430-rk3588-vicap-v1-3-b3bddf749914@collabora.com> References: <20250430-rk3588-vicap-v1-0-b3bddf749914@collabora.com> In-Reply-To: <20250430-rk3588-vicap-v1-0-b3bddf749914@collabora.com> To: Mehdi Djait , Laurent Pinchart , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Kever Yang , Jagan Teki , =?utf-8?q?=D0=9A=D1=83=D0=B7=D0=BD=D0=B5=D1=86=D0=BE=D0=B2_=D0=9C=D0=B8=D1=85=D0=B0=D0=B8=D0=BB?= , Sebastian Reichel , Nicolas Dufresne , Collabora Kernel Team , Sakari Ailus Cc: linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Michael Riesch X-Mailer: b4 0.12.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1773415244; l=8087; i=michael.riesch@collabora.com; s=20250410; h=from:subject:message-id; bh=ZnFSuwe3+J4IW95B5jAZScTRLpIw5ORoT/QEu4gY9tk=; b=+XDY6h3smlnWQNe35XMw67kAkhPiLtdVih+JMTT/dYaqkpoGpIhKD+aC2rnjyHdStvOS7a7fz FFC7WGK2BvLD6WWk3uL1tkYA1xEheXr8VEcNt2PiCRPSFnj3RltDqi0 X-Developer-Key: i=michael.riesch@collabora.com; a=ed25519; pk=+MWX1fffLFZtTPG/I6XdYm/+OSvpRE8D9evQaWbiN04= X-Endpoint-Received: by B4 Relay for michael.riesch@collabora.com/20250410 with auth_id=371 X-Original-From: Michael Riesch Reply-To: michael.riesch@collabora.com From: Michael Riesch The RK3588 Video Capture (VICAP) unit features a Digital Video Port (DVP) and six MIPI CSI-2 capture interfaces. Add initial support for this variant to the rkcif driver and enable the MIPI CSI-2 capture interfaces. Signed-off-by: Michael Riesch --- .../platform/rockchip/rkcif/rkcif-capture-mipi.c | 136 +++++++++++++++++= ++++ .../platform/rockchip/rkcif/rkcif-capture-mipi.h | 1 + .../media/platform/rockchip/rkcif/rkcif-common.h | 2 +- drivers/media/platform/rockchip/rkcif/rkcif-dev.c | 18 +++ 4 files changed, 156 insertions(+), 1 deletion(-) diff --git a/drivers/media/platform/rockchip/rkcif/rkcif-capture-mipi.c b/d= rivers/media/platform/rockchip/rkcif/rkcif-capture-mipi.c index 9e67160a16e4..aa70d3e9db04 100644 --- a/drivers/media/platform/rockchip/rkcif/rkcif-capture-mipi.c +++ b/drivers/media/platform/rockchip/rkcif/rkcif-capture-mipi.c @@ -30,10 +30,18 @@ #define RK3568_MIPI_CTRL0_CROP_EN BIT(5) #define RK3568_MIPI_CTRL0_WRDDR(type) ((type) << 1) =20 +#define RK3588_MIPI_CTRL0_DMA_EN BIT(28) +#define RK3588_MIPI_CTRL0_HIGH_ALIGN BIT(27) +#define RK3588_MIPI_CTRL0_WRDDR(type) ((type) << 5) +#define RK3588_MIPI_CTRL0_CROP_EN BIT(4) +#define RK3588_MIPI_CTRL0_PARSE(type) ((type) << 1) + #define RKCIF_MIPI_CTRL0_DT_ID(id) ((id) << 10) #define RKCIF_MIPI_CTRL0_VC_ID(id) ((id) << 8) #define RKCIF_MIPI_CTRL0_CAP_EN BIT(0) =20 +#define RKCIF_MIPI_CTRL_CAP_EN BIT(0) + #define RKCIF_MIPI_INT_FRAME0_END(id) BIT(8 + (id) * 2 + 0) #define RKCIF_MIPI_INT_FRAME1_END(id) BIT(8 + (id) * 2 + 1) =20 @@ -481,6 +489,132 @@ const struct rkcif_mipi_match_data rkcif_rk3568_vicap= _mipi_match_data =3D { }, }; =20 +static u32 +rkcif_rk3588_mipi_ctrl0(struct rkcif_stream *stream, + const struct rkcif_output_fmt *active_out_fmt) +{ + u32 ctrl0 =3D 0; + + ctrl0 |=3D RK3588_MIPI_CTRL0_DMA_EN; + ctrl0 |=3D RKCIF_MIPI_CTRL0_DT_ID(active_out_fmt->mipi.dt); + ctrl0 |=3D RK3588_MIPI_CTRL0_CROP_EN; + ctrl0 |=3D RKCIF_MIPI_CTRL0_CAP_EN; + + switch (active_out_fmt->mipi.type) { + case RKCIF_MIPI_TYPE_RAW8: + break; + case RKCIF_MIPI_TYPE_RAW10: + ctrl0 |=3D RK3588_MIPI_CTRL0_PARSE(0x1); + if (!active_out_fmt->mipi.compact) + ctrl0 |=3D RK3588_MIPI_CTRL0_WRDDR(0x1); + break; + case RKCIF_MIPI_TYPE_RAW12: + ctrl0 |=3D RK3588_MIPI_CTRL0_PARSE(0x2); + if (!active_out_fmt->mipi.compact) + ctrl0 |=3D RK3588_MIPI_CTRL0_WRDDR(0x1); + break; + case RKCIF_MIPI_TYPE_RGB888: + break; + case RKCIF_MIPI_TYPE_YUV422SP: + ctrl0 |=3D RK3588_MIPI_CTRL0_WRDDR(0x4); + break; + case RKCIF_MIPI_TYPE_YUV420SP: + ctrl0 |=3D RK3588_MIPI_CTRL0_WRDDR(0x5); + break; + case RKCIF_MIPI_TYPE_YUV400: + ctrl0 |=3D RK3588_MIPI_CTRL0_WRDDR(0x3); + break; + default: + break; + } + + return ctrl0; +} + +const struct rkcif_mipi_match_data rkcif_rk3588_vicap_mipi_match_data =3D { + .mipi_num =3D 6, + .mipi_ctrl0 =3D rkcif_rk3588_mipi_ctrl0, + .regs =3D { + [RKCIF_MIPI_CTRL] =3D 0x20, + [RKCIF_MIPI_INTEN] =3D 0x74, + [RKCIF_MIPI_INTSTAT] =3D 0x78, + }, + .regs_id =3D { + [RKCIF_ID0] =3D { + [RKCIF_MIPI_CTRL0] =3D 0x00, + [RKCIF_MIPI_CTRL1] =3D 0x04, + [RKCIF_MIPI_FRAME0_ADDR_Y] =3D 0x24, + [RKCIF_MIPI_FRAME0_ADDR_UV] =3D 0x2c, + [RKCIF_MIPI_FRAME0_VLW_Y] =3D 0x34, + [RKCIF_MIPI_FRAME0_VLW_UV] =3D RKCIF_REGISTER_NOTSUPPORTED, + [RKCIF_MIPI_FRAME1_ADDR_Y] =3D 0x28, + [RKCIF_MIPI_FRAME1_ADDR_UV] =3D 0x30, + [RKCIF_MIPI_FRAME1_VLW_Y] =3D RKCIF_REGISTER_NOTSUPPORTED, + [RKCIF_MIPI_FRAME1_VLW_UV] =3D RKCIF_REGISTER_NOTSUPPORTED, + [RKCIF_MIPI_CROP_START] =3D 0x8c, + }, + [RKCIF_ID1] =3D { + [RKCIF_MIPI_CTRL0] =3D 0x08, + [RKCIF_MIPI_CTRL1] =3D 0x0c, + [RKCIF_MIPI_FRAME0_ADDR_Y] =3D 0x38, + [RKCIF_MIPI_FRAME0_ADDR_UV] =3D 0x40, + [RKCIF_MIPI_FRAME0_VLW_Y] =3D 0x48, + [RKCIF_MIPI_FRAME0_VLW_UV] =3D RKCIF_REGISTER_NOTSUPPORTED, + [RKCIF_MIPI_FRAME1_ADDR_Y] =3D 0x3c, + [RKCIF_MIPI_FRAME1_ADDR_UV] =3D 0x44, + [RKCIF_MIPI_FRAME1_VLW_Y] =3D RKCIF_REGISTER_NOTSUPPORTED, + [RKCIF_MIPI_FRAME1_VLW_UV] =3D RKCIF_REGISTER_NOTSUPPORTED, + [RKCIF_MIPI_CROP_START] =3D 0x90, + }, + [RKCIF_ID2] =3D { + [RKCIF_MIPI_CTRL0] =3D 0x10, + [RKCIF_MIPI_CTRL1] =3D 0x14, + [RKCIF_MIPI_FRAME0_ADDR_Y] =3D 0x4c, + [RKCIF_MIPI_FRAME0_ADDR_UV] =3D 0x54, + [RKCIF_MIPI_FRAME0_VLW_Y] =3D 0x5c, + [RKCIF_MIPI_FRAME0_VLW_UV] =3D RKCIF_REGISTER_NOTSUPPORTED, + [RKCIF_MIPI_FRAME1_ADDR_Y] =3D 0x50, + [RKCIF_MIPI_FRAME1_ADDR_UV] =3D 0x58, + [RKCIF_MIPI_FRAME1_VLW_Y] =3D RKCIF_REGISTER_NOTSUPPORTED, + [RKCIF_MIPI_FRAME1_VLW_UV] =3D RKCIF_REGISTER_NOTSUPPORTED, + [RKCIF_MIPI_CROP_START] =3D 0x94, + }, + [RKCIF_ID3] =3D { + [RKCIF_MIPI_CTRL0] =3D 0x18, + [RKCIF_MIPI_CTRL1] =3D 0x1c, + [RKCIF_MIPI_FRAME0_ADDR_Y] =3D 0x60, + [RKCIF_MIPI_FRAME0_ADDR_UV] =3D 0x68, + [RKCIF_MIPI_FRAME0_VLW_Y] =3D 0x70, + [RKCIF_MIPI_FRAME0_VLW_UV] =3D RKCIF_REGISTER_NOTSUPPORTED, + [RKCIF_MIPI_FRAME1_ADDR_Y] =3D 0x64, + [RKCIF_MIPI_FRAME1_ADDR_UV] =3D 0x6c, + [RKCIF_MIPI_FRAME1_VLW_Y] =3D RKCIF_REGISTER_NOTSUPPORTED, + [RKCIF_MIPI_FRAME1_VLW_UV] =3D RKCIF_REGISTER_NOTSUPPORTED, + [RKCIF_MIPI_CROP_START] =3D 0x98, + }, + }, + .blocks =3D { + { + .offset =3D 0x100, + }, + { + .offset =3D 0x200, + }, + { + .offset =3D 0x300, + }, + { + .offset =3D 0x400, + }, + { + .offset =3D 0x500, + }, + { + .offset =3D 0x600, + }, + }, +}; + static inline unsigned int rkcif_mipi_get_reg(struct rkcif_interface *inte= rface, unsigned int index) { @@ -631,6 +765,8 @@ static int rkcif_mipi_start_streaming(struct rkcif_stre= am *stream) rkcif_mipi_stream_write(stream, RKCIF_MIPI_CTRL1, ctrl1); rkcif_mipi_stream_write(stream, RKCIF_MIPI_CTRL0, ctrl0); =20 + rkcif_mipi_write(interface, RKCIF_MIPI_CTRL, RKCIF_MIPI_CTRL_CAP_EN); + ret =3D 0; =20 out: diff --git a/drivers/media/platform/rockchip/rkcif/rkcif-capture-mipi.h b/d= rivers/media/platform/rockchip/rkcif/rkcif-capture-mipi.h index 7f16eadc474c..7edaca44f653 100644 --- a/drivers/media/platform/rockchip/rkcif/rkcif-capture-mipi.h +++ b/drivers/media/platform/rockchip/rkcif/rkcif-capture-mipi.h @@ -13,6 +13,7 @@ #include "rkcif-common.h" =20 extern const struct rkcif_mipi_match_data rkcif_rk3568_vicap_mipi_match_da= ta; +extern const struct rkcif_mipi_match_data rkcif_rk3588_vicap_mipi_match_da= ta; =20 int rkcif_mipi_register(struct rkcif_device *rkcif); =20 diff --git a/drivers/media/platform/rockchip/rkcif/rkcif-common.h b/drivers= /media/platform/rockchip/rkcif/rkcif-common.h index dd92cfbc879f..4d9211ba9bda 100644 --- a/drivers/media/platform/rockchip/rkcif/rkcif-common.h +++ b/drivers/media/platform/rockchip/rkcif/rkcif-common.h @@ -27,7 +27,7 @@ #include "rkcif-regs.h" =20 #define RKCIF_DRIVER_NAME "rockchip-cif" -#define RKCIF_CLK_MAX 4 +#define RKCIF_CLK_MAX 5 =20 enum rkcif_format_type { RKCIF_FMT_TYPE_INVALID, diff --git a/drivers/media/platform/rockchip/rkcif/rkcif-dev.c b/drivers/me= dia/platform/rockchip/rkcif/rkcif-dev.c index b4cf1146f131..86575d398f80 100644 --- a/drivers/media/platform/rockchip/rkcif/rkcif-dev.c +++ b/drivers/media/platform/rockchip/rkcif/rkcif-dev.c @@ -53,6 +53,20 @@ static const struct rkcif_match_data rk3568_vicap_match_= data =3D { .mipi =3D &rkcif_rk3568_vicap_mipi_match_data, }; =20 +static const char *const rk3588_vicap_clks[] =3D { + "aclk", + "hclk", + "dclk", + "iclk_host0", + "iclk_host1", +}; + +static const struct rkcif_match_data rk3588_vicap_match_data =3D { + .clks =3D rk3588_vicap_clks, + .clks_num =3D ARRAY_SIZE(rk3588_vicap_clks), + .mipi =3D &rkcif_rk3588_vicap_mipi_match_data, +}; + static const struct of_device_id rkcif_plat_of_match[] =3D { { .compatible =3D "rockchip,px30-vip", @@ -62,6 +76,10 @@ static const struct of_device_id rkcif_plat_of_match[] = =3D { .compatible =3D "rockchip,rk3568-vicap", .data =3D &rk3568_vicap_match_data, }, + { + .compatible =3D "rockchip,rk3588-vicap", + .data =3D &rk3588_vicap_match_data, + }, {} }; MODULE_DEVICE_TABLE(of, rkcif_plat_of_match); --=20 2.39.5