From nobody Mon Feb 9 06:00:01 2026 Received: from mail-ed1-f41.google.com (mail-ed1-f41.google.com [209.85.208.41]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D3D4E20E03C; Wed, 30 Apr 2025 07:07:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.41 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1745996854; cv=none; b=feHpG4w8J+RExYSin/Zb7hhTLniK9ahqsE7rVrluGXsu3p7029UvRKsuHipezdA8t6siGLYgTqSlohQxGBpdQZZUCwjwPZaznsiPF3SNgpz7DKjtL9mvXZo1MtjJAhoukGL2eLQSwS2XXEKqp9dJpN2x13GFttSYjd39VHL8aZs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1745996854; c=relaxed/simple; bh=agKJKSQoy/h65HXXyPmdEN8H3Bu0XKA/Ew8f7G8wWts=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=BusWqnKdcw6aIFgKOIsUU5SWtnMuPqfaq1utley/SglHTVVN5hpK7OkXaX70Jp3Y43zAZM1CeMe5JaJ4mTSx9jGnwFBVXmK3KfTvdXUSsopfJM+zD5DQvRDNtU4jrs4/50O/qQD7QAYA+YIn9AHmP3drUHoxDmF6Ts5NTL0aoKQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=EG0BVgKd; arc=none smtp.client-ip=209.85.208.41 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="EG0BVgKd" Received: by mail-ed1-f41.google.com with SMTP id 4fb4d7f45d1cf-5f63ac6ef0fso1320566a12.1; Wed, 30 Apr 2025 00:07:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1745996850; x=1746601650; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=DjhsWWBzjDFTHJTQxgnpEOa0O96IiC/jWcMtoEb6m6k=; b=EG0BVgKdWnWnlu4qIOnOBrPH1QogrRIbTOklxT9QnsiAa5sLDZZD8psoOH+vNUNq39 aspl6yVVvRm9VqLri7lx8I9jPFbCxzPmOGhclqkcVfil2kLZCHu62dp3TQrQH/kNe7lG beSgEcdKx77b1+h2+RhLNoBGpnJCzFN6aBY9pCzJJNTKbVAiJStHANIbL5Yok44J5rSZ 0quJyp42Qz89xRE7sUPWlFthQh26l2+nu4u8UGEOnxCw+Xe9u8cX1hLDyXs3/OwyjFhy wZD7qcO5p/cgmLa0TfjUmvX29bT0YIZb0XSQHjthofmYMhIpzcRY5LjGKFZVq3DjK03c 6RIA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1745996850; x=1746601650; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=DjhsWWBzjDFTHJTQxgnpEOa0O96IiC/jWcMtoEb6m6k=; b=rPIUNdZbEA5v+rpcy6vlJPZKMoL3N5Wks6pTo0wl7h+72DgoWi16058FL25QuAXFwY GRU44q2rk77l99ccu0N5xGhiH8fHmWn31dWNibguWrA9p2gpJ9g/Jb62248djMdiM4Vb NlXhepyrkxEoduCvvOgipSwARVQg1Qexuo2/R8iVHNdo07/s3mr6o08HPRWdTlnSpZ1r feeiWnH2zgK1AG0YIGNe14hRtwskX6EiRmB+z9b/6qnotA6FxCfxF0qU5RDtg+2PdVIV 1YXccsLAniHJmVPC6EiH0ZZ2NEAd7CgYlaigV5CCAVdDG4yl1bhbUc4TzEgj7UMDPHgl HC6g== X-Forwarded-Encrypted: i=1; AJvYcCUmLei/1zBaz8pJjcBJfEnH/Eg+MWWUS2+aBj2wl8WOimVNIzODIcU4rK0CqNsRpx5tfgKzybD8pjOM@vger.kernel.org, AJvYcCUp9FFj3yKGbrWa5JZrGv9zAQB1cQJfvNVkptYM8E58pppFaqNdfYMDW+F53FSYUDUg5bEKSwdHPYVUif4e@vger.kernel.org X-Gm-Message-State: AOJu0YzjHTri0/A0ulUgh/FInbK+9GABlCY5UJf7CLFPi9vp5FKE6K2d kwCwKeu5KcVcdFNyrnlo4NrbWxfJFZLZAYwp0OeOZK1yq3+dL649ZsofOw== X-Gm-Gg: ASbGncu8cBlQasme6xVlTvScVNrciNYnFO+tTCcAA4XpXs2TGB+P1s5+tEbNpOOEMeW R1D4l0/JQ7jBkNp+rGMwatjwwAzpKRotJw/szEo3faogAv7PZHYHLm8l4SHu/JTM5x7VRNo0kGe GMtxDR32LbPmyBxylwr1+HmmgC/2PKd0HGlM926+VCIK9nQCNwU3oD0WhvH67X49CrcoGvYS73u Pq8YN2PCT/3rJ6wcVdLt2a9dpP1MQdg7kPdlwb3uDK8r5gIKlF5LYQQjkkOmSPt1iYbrCVFOiEG tF+4v5Bq3qwFmr+L88/kUTcFNn5sPttwZvL2SBYuS/ggIyF3+msXtg52WwpjU8ZJa5qHyDtXcTU XzPGSP2txGgk= X-Google-Smtp-Source: AGHT+IHaMM72TBz5nQQLKxE8Gf46uuaVCzdj7MoPRYBFiQA6cMmTkmaQPdHPe71ZbY8YmqvnAqDrWg== X-Received: by 2002:a05:6402:2345:b0:5f4:35c7:ff37 with SMTP id 4fb4d7f45d1cf-5f89efa5b9cmr1757236a12.1.1745996849839; Wed, 30 Apr 2025 00:07:29 -0700 (PDT) Received: from hex.my.domain (83.8.121.197.ipv4.supernova.orange.pl. [83.8.121.197]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-5f7013fec3csm8334314a12.19.2025.04.30.00.07.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Apr 2025 00:07:29 -0700 (PDT) From: Artur Weber Date: Wed, 30 Apr 2025 09:07:13 +0200 Subject: [PATCH v8 9/9] regulator: bcm590xx: Add support for BCM59054 regulators Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250430-bcm59054-v8-9-e4cf638169a4@gmail.com> References: <20250430-bcm59054-v8-0-e4cf638169a4@gmail.com> In-Reply-To: <20250430-bcm59054-v8-0-e4cf638169a4@gmail.com> To: Lee Jones , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Liam Girdwood , Mark Brown , Florian Fainelli , Ray Jui , Scott Branden , Broadcom internal kernel review list Cc: Stanislav Jakubek , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, ~postmarketos/upstreaming@lists.sr.ht, Artur Weber X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1745996831; l=17812; i=aweber.kernel@gmail.com; s=20231030; h=from:subject:message-id; bh=agKJKSQoy/h65HXXyPmdEN8H3Bu0XKA/Ew8f7G8wWts=; b=/IvtFPqlt4YkzvrYtavDqe4aO0d1b4CWC+Asd3lOiDUm32RQ4bfhqwMBF5MZXcdW0EI4l1fvm Gw3PRdu5NhOAu4B8YT0viNB6B/fz4C49LmVFFwIBUESW+hWhvtElFna X-Developer-Key: i=aweber.kernel@gmail.com; a=ed25519; pk=RhDBfWbJEHqDibXbhNEBAnc9FMkyznGxX/hwfhL8bv8= The BCM59056 and BCM59054 are very similar in terms of regulators. Add the register definitions for the BCM59054 and enable support for it in the driver. Signed-off-by: Artur Weber --- Changes in v6: - dev_type -> pmu_id conversion, rev_ana -> rev_analog rename Changes in v5: - Adapt to regmap type enum being moved/value names being renamed - Adapt to rename of bcm590xx_reg_info to bcm590xx_reg_data Changes in v4: - Lock MICLDO at 1.8v to match vendor kernel behavior - Set different voltage table for VSR based on PMU revision - Fix incorrect table being used for LVLDO1 - Add missing newline to "unknown device type" error message Changes in v3: - Adapt to regulator info being moved to tables --- drivers/regulator/bcm590xx-regulator.c | 649 +++++++++++++++++++++++++++++= +++- 1 file changed, 647 insertions(+), 2 deletions(-) diff --git a/drivers/regulator/bcm590xx-regulator.c b/drivers/regulator/bcm= 590xx-regulator.c index f35b2b72e46f70496e16be5244529a5d95d0546d..50414f4cb10958bb33a9fcfa5ed= 5aaecde9d0715 100644 --- a/drivers/regulator/bcm590xx-regulator.c +++ b/drivers/regulator/bcm590xx-regulator.c @@ -52,6 +52,17 @@ static const struct regulator_ops bcm590xx_ops_ldo =3D { .map_voltage =3D regulator_map_voltage_iterate, }; =20 +/* + * LDO ops without voltage selection, used for MICLDO on BCM59054. + * (These are currently the same as VBUS ops, but will be different + * in the future once full PMMODE support is implemented.) + */ +static const struct regulator_ops bcm590xx_ops_ldo_novolt =3D { + .is_enabled =3D regulator_is_enabled_regmap, + .enable =3D regulator_enable_regmap, + .disable =3D regulator_disable_regmap, +}; + static const struct regulator_ops bcm590xx_ops_dcdc =3D { .is_enabled =3D regulator_is_enabled_regmap, .enable =3D regulator_enable_regmap, @@ -106,6 +117,13 @@ static const struct regulator_ops bcm590xx_ops_vbus = =3D { #define BCM59056_SR_DESC(_name, _name_lower, _ranges) \ BCM590XX_SR_DESC(BCM59056, bcm59056, _name, _name_lower, _ranges) =20 +#define BCM59054_REG_DESC(_name, _name_lower) \ + BCM590XX_REG_DESC(BCM59054, _name, _name_lower) +#define BCM59054_LDO_DESC(_name, _name_lower, _table) \ + BCM590XX_LDO_DESC(BCM59054, bcm59054, _name, _name_lower, _table) +#define BCM59054_SR_DESC(_name, _name_lower, _ranges) \ + BCM590XX_SR_DESC(BCM59054, bcm59054, _name, _name_lower, _ranges) + /* BCM59056 data */ =20 /* I2C slave 0 registers */ @@ -466,6 +484,617 @@ static const struct bcm590xx_reg_data bcm59056_regs[B= CM59056_NUM_REGS] =3D { }, }; =20 +/* BCM59054 data */ + +/* I2C slave 0 registers */ +#define BCM59054_RFLDOPMCTRL1 0x60 +#define BCM59054_CAMLDO1PMCTRL1 0x62 +#define BCM59054_CAMLDO2PMCTRL1 0x64 +#define BCM59054_SIMLDO1PMCTRL1 0x66 +#define BCM59054_SIMLDO2PMCTRL1 0x68 +#define BCM59054_SDLDOPMCTRL1 0x6a +#define BCM59054_SDXLDOPMCTRL1 0x6c +#define BCM59054_MMCLDO1PMCTRL1 0x6e +#define BCM59054_MMCLDO2PMCTRL1 0x70 +#define BCM59054_AUDLDOPMCTRL1 0x72 +#define BCM59054_MICLDOPMCTRL1 0x74 +#define BCM59054_USBLDOPMCTRL1 0x76 +#define BCM59054_VIBLDOPMCTRL1 0x78 +#define BCM59054_IOSR1PMCTRL1 0x7a +#define BCM59054_IOSR2PMCTRL1 0x7c +#define BCM59054_CSRPMCTRL1 0x7e +#define BCM59054_SDSR1PMCTRL1 0x82 +#define BCM59054_SDSR2PMCTRL1 0x86 +#define BCM59054_MMSRPMCTRL1 0x8a +#define BCM59054_VSRPMCTRL1 0x8e +#define BCM59054_RFLDOCTRL 0x96 +#define BCM59054_CAMLDO1CTRL 0x97 +#define BCM59054_CAMLDO2CTRL 0x98 +#define BCM59054_SIMLDO1CTRL 0x99 +#define BCM59054_SIMLDO2CTRL 0x9a +#define BCM59054_SDLDOCTRL 0x9b +#define BCM59054_SDXLDOCTRL 0x9c +#define BCM59054_MMCLDO1CTRL 0x9d +#define BCM59054_MMCLDO2CTRL 0x9e +#define BCM59054_AUDLDOCTRL 0x9f +#define BCM59054_MICLDOCTRL 0xa0 +#define BCM59054_USBLDOCTRL 0xa1 +#define BCM59054_VIBLDOCTRL 0xa2 +#define BCM59054_CSRVOUT1 0xc0 +#define BCM59054_IOSR1VOUT1 0xc3 +#define BCM59054_IOSR2VOUT1 0xc6 +#define BCM59054_MMSRVOUT1 0xc9 +#define BCM59054_SDSR1VOUT1 0xcc +#define BCM59054_SDSR2VOUT1 0xcf +#define BCM59054_VSRVOUT1 0xd2 + +/* I2C slave 1 registers */ +#define BCM59054_LVLDO1PMCTRL1 0x16 +#define BCM59054_LVLDO2PMCTRL1 0x18 +#define BCM59054_GPLDO1CTRL 0x1a +#define BCM59054_GPLDO2CTRL 0x1b +#define BCM59054_GPLDO3CTRL 0x1c +#define BCM59054_TCXLDOCTRL 0x1d +#define BCM59054_LVLDO1CTRL 0x1e +#define BCM59054_LVLDO2CTRL 0x1f +#define BCM59054_OTG_CTRL 0x40 +#define BCM59054_GPLDO1PMCTRL1 0x57 +#define BCM59054_GPLDO2PMCTRL1 0x59 +#define BCM59054_GPLDO3PMCTRL1 0x5b +#define BCM59054_TCXLDOPMCTRL1 0x5d + +/* + * RFLDO to VSR regulators are + * accessed via I2C slave 0 + */ + +/* LDO regulator IDs */ +#define BCM59054_REG_RFLDO 0 +#define BCM59054_REG_CAMLDO1 1 +#define BCM59054_REG_CAMLDO2 2 +#define BCM59054_REG_SIMLDO1 3 +#define BCM59054_REG_SIMLDO2 4 +#define BCM59054_REG_SDLDO 5 +#define BCM59054_REG_SDXLDO 6 +#define BCM59054_REG_MMCLDO1 7 +#define BCM59054_REG_MMCLDO2 8 +#define BCM59054_REG_AUDLDO 9 +#define BCM59054_REG_MICLDO 10 +#define BCM59054_REG_USBLDO 11 +#define BCM59054_REG_VIBLDO 12 + +/* DCDC regulator IDs */ +#define BCM59054_REG_CSR 13 +#define BCM59054_REG_IOSR1 14 +#define BCM59054_REG_IOSR2 15 +#define BCM59054_REG_MMSR 16 +#define BCM59054_REG_SDSR1 17 +#define BCM59054_REG_SDSR2 18 +#define BCM59054_REG_VSR 19 + +/* + * GPLDO1 to VBUS regulators are + * accessed via I2C slave 1 + */ + +#define BCM59054_REG_GPLDO1 20 +#define BCM59054_REG_GPLDO2 21 +#define BCM59054_REG_GPLDO3 22 +#define BCM59054_REG_TCXLDO 23 +#define BCM59054_REG_LVLDO1 24 +#define BCM59054_REG_LVLDO2 25 +#define BCM59054_REG_VBUS 26 + +#define BCM59054_NUM_REGS 27 + +/* LDO group 1: supported voltages in microvolts */ +static const unsigned int bcm59054_ldo_1_table[] =3D { + 1200000, 1800000, 2500000, 2700000, 2800000, + 2900000, 3000000, 3300000, +}; + +/* LDO group 2: supported voltages in microvolts */ +static const unsigned int bcm59054_ldo_2_table[] =3D { + 3100000, 1800000, 2500000, 2700000, 2800000, + 2900000, 3000000, 3300000, +}; + +/* LDO group 3: supported voltages in microvolts */ +static const unsigned int bcm59054_ldo_3_table[] =3D { + 1000000, 1107000, 1143000, 1214000, 1250000, + 1464000, 1500000, 1786000, +}; + +/* DCDC group SR: supported voltages in microvolts */ +static const struct linear_range bcm59054_dcdc_sr_ranges[] =3D { + REGULATOR_LINEAR_RANGE(0, 0, 1, 0), + REGULATOR_LINEAR_RANGE(860000, 2, 60, 10000), + REGULATOR_LINEAR_RANGE(1500000, 61, 61, 0), + REGULATOR_LINEAR_RANGE(1800000, 62, 62, 0), + REGULATOR_LINEAR_RANGE(900000, 63, 63, 0), +}; + +/* DCDC group VSR (BCM59054A1): supported voltages in microvolts */ +static const struct linear_range bcm59054_dcdc_vsr_a1_ranges[] =3D { + REGULATOR_LINEAR_RANGE(0, 0, 1, 0), + REGULATOR_LINEAR_RANGE(860000, 2, 59, 10000), + REGULATOR_LINEAR_RANGE(1700000, 60, 60, 0), + REGULATOR_LINEAR_RANGE(1500000, 61, 61, 0), + REGULATOR_LINEAR_RANGE(1800000, 62, 62, 0), + REGULATOR_LINEAR_RANGE(1600000, 63, 63, 0), +}; + +/* DCDC group CSR: supported voltages in microvolts */ +static const struct linear_range bcm59054_dcdc_csr_ranges[] =3D { + REGULATOR_LINEAR_RANGE(700000, 0, 1, 100000), + REGULATOR_LINEAR_RANGE(860000, 2, 60, 10000), + REGULATOR_LINEAR_RANGE(900000, 61, 63, 0), +}; + +static const struct bcm590xx_reg_data bcm59054_regs[BCM59054_NUM_REGS] =3D= { + { + .type =3D BCM590XX_REG_TYPE_LDO, + .regmap =3D BCM590XX_REGMAP_PRI, + .desc =3D { + BCM59054_LDO_DESC(RFLDO, rfldo, ldo_1_table), + }, + }, + + { + .type =3D BCM590XX_REG_TYPE_LDO, + .regmap =3D BCM590XX_REGMAP_PRI, + .desc =3D { + BCM59054_LDO_DESC(CAMLDO1, camldo1, ldo_2_table), + }, + }, + + { + .type =3D BCM590XX_REG_TYPE_LDO, + .regmap =3D BCM590XX_REGMAP_PRI, + .desc =3D { + BCM59054_LDO_DESC(CAMLDO2, camldo2, ldo_2_table), + }, + }, + + { + .type =3D BCM590XX_REG_TYPE_LDO, + .regmap =3D BCM590XX_REGMAP_PRI, + .desc =3D { + BCM59054_LDO_DESC(SIMLDO1, simldo1, ldo_1_table), + }, + }, + + { + .type =3D BCM590XX_REG_TYPE_LDO, + .regmap =3D BCM590XX_REGMAP_PRI, + .desc =3D { + BCM59054_LDO_DESC(SIMLDO2, simldo2, ldo_1_table), + }, + }, + + { + .type =3D BCM590XX_REG_TYPE_LDO, + .regmap =3D BCM590XX_REGMAP_PRI, + .desc =3D { + BCM59054_LDO_DESC(SDLDO, sdldo, ldo_2_table), + }, + }, + + { + .type =3D BCM590XX_REG_TYPE_LDO, + .regmap =3D BCM590XX_REGMAP_PRI, + .desc =3D { + BCM59054_LDO_DESC(SDXLDO, sdxldo, ldo_1_table), + }, + }, + + { + .type =3D BCM590XX_REG_TYPE_LDO, + .regmap =3D BCM590XX_REGMAP_PRI, + .desc =3D { + BCM59054_LDO_DESC(MMCLDO1, mmcldo1, ldo_1_table), + }, + }, + + { + .type =3D BCM590XX_REG_TYPE_LDO, + .regmap =3D BCM590XX_REGMAP_PRI, + .desc =3D { + BCM59054_LDO_DESC(MMCLDO2, mmcldo2, ldo_1_table), + }, + }, + + { + .type =3D BCM590XX_REG_TYPE_LDO, + .regmap =3D BCM590XX_REGMAP_PRI, + .desc =3D { + BCM59054_LDO_DESC(AUDLDO, audldo, ldo_1_table), + }, + }, + + { + .type =3D BCM590XX_REG_TYPE_LDO, + .regmap =3D BCM590XX_REGMAP_PRI, + .desc =3D { + BCM59054_REG_DESC(MICLDO, micldo), + .ops =3D &bcm590xx_ops_ldo_novolt, + /* MICLDO is locked at 1.8V */ + .n_voltages =3D 1, + .fixed_uV =3D 1800000, + .enable_reg =3D BCM59054_MICLDOPMCTRL1, + .enable_mask =3D BCM590XX_REG_ENABLE, + .enable_is_inverted =3D true, + }, + }, + + { + .type =3D BCM590XX_REG_TYPE_LDO, + .regmap =3D BCM590XX_REGMAP_PRI, + .desc =3D { + BCM59054_LDO_DESC(USBLDO, usbldo, ldo_1_table), + }, + }, + + { + .type =3D BCM590XX_REG_TYPE_LDO, + .regmap =3D BCM590XX_REGMAP_PRI, + .desc =3D { + BCM59054_LDO_DESC(VIBLDO, vibldo, ldo_2_table), + }, + }, + + { + .type =3D BCM590XX_REG_TYPE_SR, + .regmap =3D BCM590XX_REGMAP_PRI, + .desc =3D { + BCM59054_SR_DESC(CSR, csr, dcdc_csr_ranges), + }, + }, + + { + .type =3D BCM590XX_REG_TYPE_SR, + .regmap =3D BCM590XX_REGMAP_PRI, + .desc =3D { + BCM59054_SR_DESC(IOSR1, iosr1, dcdc_sr_ranges), + }, + }, + + { + .type =3D BCM590XX_REG_TYPE_SR, + .regmap =3D BCM590XX_REGMAP_PRI, + .desc =3D { + BCM59054_SR_DESC(IOSR2, iosr2, dcdc_sr_ranges), + }, + }, + + { + .type =3D BCM590XX_REG_TYPE_SR, + .regmap =3D BCM590XX_REGMAP_PRI, + .desc =3D { + BCM59054_SR_DESC(MMSR, mmsr, dcdc_sr_ranges), + }, + }, + + { + .type =3D BCM590XX_REG_TYPE_SR, + .regmap =3D BCM590XX_REGMAP_PRI, + .desc =3D { + BCM59054_SR_DESC(SDSR1, sdsr1, dcdc_sr_ranges), + }, + }, + + { + .type =3D BCM590XX_REG_TYPE_SR, + .regmap =3D BCM590XX_REGMAP_PRI, + .desc =3D { + BCM59054_SR_DESC(SDSR2, sdsr2, dcdc_sr_ranges), + }, + }, + + { + .type =3D BCM590XX_REG_TYPE_SR, + .regmap =3D BCM590XX_REGMAP_PRI, + .desc =3D { + BCM59054_SR_DESC(VSR, vsr, dcdc_sr_ranges), + }, + }, + + { + .type =3D BCM590XX_REG_TYPE_GPLDO, + .regmap =3D BCM590XX_REGMAP_SEC, + .desc =3D { + BCM59054_LDO_DESC(GPLDO1, gpldo1, ldo_1_table), + }, + }, + + { + .type =3D BCM590XX_REG_TYPE_GPLDO, + .regmap =3D BCM590XX_REGMAP_SEC, + .desc =3D { + BCM59054_LDO_DESC(GPLDO2, gpldo2, ldo_1_table), + }, + }, + + { + .type =3D BCM590XX_REG_TYPE_GPLDO, + .regmap =3D BCM590XX_REGMAP_SEC, + .desc =3D { + BCM59054_LDO_DESC(GPLDO3, gpldo3, ldo_1_table), + }, + }, + + { + .type =3D BCM590XX_REG_TYPE_GPLDO, + .regmap =3D BCM590XX_REGMAP_SEC, + .desc =3D { + BCM59054_LDO_DESC(TCXLDO, tcxldo, ldo_1_table), + }, + }, + + { + .type =3D BCM590XX_REG_TYPE_GPLDO, + .regmap =3D BCM590XX_REGMAP_SEC, + .desc =3D { + BCM59054_LDO_DESC(LVLDO1, lvldo1, ldo_3_table), + }, + }, + + { + .type =3D BCM590XX_REG_TYPE_GPLDO, + .regmap =3D BCM590XX_REGMAP_SEC, + .desc =3D { + BCM59054_LDO_DESC(LVLDO2, lvldo2, ldo_3_table), + }, + }, + + { + .type =3D BCM590XX_REG_TYPE_VBUS, + .regmap =3D BCM590XX_REGMAP_SEC, + .desc =3D { + BCM59054_REG_DESC(VBUS, vbus), + .ops =3D &bcm590xx_ops_vbus, + .n_voltages =3D 1, + .fixed_uV =3D 5000000, + .enable_reg =3D BCM59054_OTG_CTRL, + .enable_mask =3D BCM590XX_VBUS_ENABLE, + }, + }, +}; + +/* + * BCM59054A1 regulators; same as previous revision, but with different + * VSR voltage table. + */ +static const struct bcm590xx_reg_data bcm59054_a1_regs[BCM59054_NUM_REGS] = =3D { + { + .type =3D BCM590XX_REG_TYPE_LDO, + .regmap =3D BCM590XX_REGMAP_PRI, + .desc =3D { + BCM59054_LDO_DESC(RFLDO, rfldo, ldo_1_table), + }, + }, + + { + .type =3D BCM590XX_REG_TYPE_LDO, + .regmap =3D BCM590XX_REGMAP_PRI, + .desc =3D { + BCM59054_LDO_DESC(CAMLDO1, camldo1, ldo_2_table), + }, + }, + + { + .type =3D BCM590XX_REG_TYPE_LDO, + .regmap =3D BCM590XX_REGMAP_PRI, + .desc =3D { + BCM59054_LDO_DESC(CAMLDO2, camldo2, ldo_2_table), + }, + }, + + { + .type =3D BCM590XX_REG_TYPE_LDO, + .regmap =3D BCM590XX_REGMAP_PRI, + .desc =3D { + BCM59054_LDO_DESC(SIMLDO1, simldo1, ldo_1_table), + }, + }, + + { + .type =3D BCM590XX_REG_TYPE_LDO, + .regmap =3D BCM590XX_REGMAP_PRI, + .desc =3D { + BCM59054_LDO_DESC(SIMLDO2, simldo2, ldo_1_table), + }, + }, + + { + .type =3D BCM590XX_REG_TYPE_LDO, + .regmap =3D BCM590XX_REGMAP_PRI, + .desc =3D { + BCM59054_LDO_DESC(SDLDO, sdldo, ldo_2_table), + }, + }, + + { + .type =3D BCM590XX_REG_TYPE_LDO, + .regmap =3D BCM590XX_REGMAP_PRI, + .desc =3D { + BCM59054_LDO_DESC(SDXLDO, sdxldo, ldo_1_table), + }, + }, + + { + .type =3D BCM590XX_REG_TYPE_LDO, + .regmap =3D BCM590XX_REGMAP_PRI, + .desc =3D { + BCM59054_LDO_DESC(MMCLDO1, mmcldo1, ldo_1_table), + }, + }, + + { + .type =3D BCM590XX_REG_TYPE_LDO, + .regmap =3D BCM590XX_REGMAP_PRI, + .desc =3D { + BCM59054_LDO_DESC(MMCLDO2, mmcldo2, ldo_1_table), + }, + }, + + { + .type =3D BCM590XX_REG_TYPE_LDO, + .regmap =3D BCM590XX_REGMAP_PRI, + .desc =3D { + BCM59054_LDO_DESC(AUDLDO, audldo, ldo_1_table), + }, + }, + + { + .type =3D BCM590XX_REG_TYPE_LDO, + .regmap =3D BCM590XX_REGMAP_PRI, + .desc =3D { + BCM59054_REG_DESC(MICLDO, micldo), + .ops =3D &bcm590xx_ops_ldo_novolt, + /* MICLDO is locked at 1.8V */ + .n_voltages =3D 1, + .fixed_uV =3D 1800000, + .enable_reg =3D BCM59054_MICLDOPMCTRL1, + .enable_mask =3D BCM590XX_REG_ENABLE, + .enable_is_inverted =3D true, + }, + }, + + { + .type =3D BCM590XX_REG_TYPE_LDO, + .regmap =3D BCM590XX_REGMAP_PRI, + .desc =3D { + BCM59054_LDO_DESC(USBLDO, usbldo, ldo_1_table), + }, + }, + + { + .type =3D BCM590XX_REG_TYPE_LDO, + .regmap =3D BCM590XX_REGMAP_PRI, + .desc =3D { + BCM59054_LDO_DESC(VIBLDO, vibldo, ldo_2_table), + }, + }, + + { + .type =3D BCM590XX_REG_TYPE_SR, + .regmap =3D BCM590XX_REGMAP_PRI, + .desc =3D { + BCM59054_SR_DESC(CSR, csr, dcdc_csr_ranges), + }, + }, + + { + .type =3D BCM590XX_REG_TYPE_SR, + .regmap =3D BCM590XX_REGMAP_PRI, + .desc =3D { + BCM59054_SR_DESC(IOSR1, iosr1, dcdc_sr_ranges), + }, + }, + + { + .type =3D BCM590XX_REG_TYPE_SR, + .regmap =3D BCM590XX_REGMAP_PRI, + .desc =3D { + BCM59054_SR_DESC(IOSR2, iosr2, dcdc_sr_ranges), + }, + }, + + { + .type =3D BCM590XX_REG_TYPE_SR, + .regmap =3D BCM590XX_REGMAP_PRI, + .desc =3D { + BCM59054_SR_DESC(MMSR, mmsr, dcdc_sr_ranges), + }, + }, + + { + .type =3D BCM590XX_REG_TYPE_SR, + .regmap =3D BCM590XX_REGMAP_PRI, + .desc =3D { + BCM59054_SR_DESC(SDSR1, sdsr1, dcdc_sr_ranges), + }, + }, + + { + .type =3D BCM590XX_REG_TYPE_SR, + .regmap =3D BCM590XX_REGMAP_PRI, + .desc =3D { + BCM59054_SR_DESC(SDSR2, sdsr2, dcdc_sr_ranges), + }, + }, + + { + .type =3D BCM590XX_REG_TYPE_SR, + .regmap =3D BCM590XX_REGMAP_PRI, + .desc =3D { + BCM59054_SR_DESC(VSR, vsr, dcdc_vsr_a1_ranges), + }, + }, + + { + .type =3D BCM590XX_REG_TYPE_GPLDO, + .regmap =3D BCM590XX_REGMAP_SEC, + .desc =3D { + BCM59054_LDO_DESC(GPLDO1, gpldo1, ldo_1_table), + }, + }, + + { + .type =3D BCM590XX_REG_TYPE_GPLDO, + .regmap =3D BCM590XX_REGMAP_SEC, + .desc =3D { + BCM59054_LDO_DESC(GPLDO2, gpldo2, ldo_1_table), + }, + }, + + { + .type =3D BCM590XX_REG_TYPE_GPLDO, + .regmap =3D BCM590XX_REGMAP_SEC, + .desc =3D { + BCM59054_LDO_DESC(GPLDO3, gpldo3, ldo_1_table), + }, + }, + + { + .type =3D BCM590XX_REG_TYPE_GPLDO, + .regmap =3D BCM590XX_REGMAP_SEC, + .desc =3D { + BCM59054_LDO_DESC(TCXLDO, tcxldo, ldo_1_table), + }, + }, + + { + .type =3D BCM590XX_REG_TYPE_GPLDO, + .regmap =3D BCM590XX_REGMAP_SEC, + .desc =3D { + BCM59054_LDO_DESC(LVLDO1, lvldo1, ldo_3_table), + }, + }, + + { + .type =3D BCM590XX_REG_TYPE_GPLDO, + .regmap =3D BCM590XX_REGMAP_SEC, + .desc =3D { + BCM59054_LDO_DESC(LVLDO2, lvldo2, ldo_3_table), + }, + }, + + { + .type =3D BCM590XX_REG_TYPE_VBUS, + .regmap =3D BCM590XX_REGMAP_SEC, + .desc =3D { + BCM59054_REG_DESC(VBUS, vbus), + .ops =3D &bcm590xx_ops_vbus, + .n_voltages =3D 1, + .fixed_uV =3D 5000000, + .enable_reg =3D BCM59054_OTG_CTRL, + .enable_mask =3D BCM590XX_VBUS_ENABLE, + }, + }, +}; + static int bcm590xx_probe(struct platform_device *pdev) { struct bcm590xx *bcm590xx =3D dev_get_drvdata(pdev->dev.parent); @@ -480,8 +1109,24 @@ static int bcm590xx_probe(struct platform_device *pde= v) return -ENOMEM; =20 pmu->mfd =3D bcm590xx; - pmu->n_regulators =3D BCM59056_NUM_REGS; - pmu->regs =3D bcm59056_regs; + + switch (pmu->mfd->pmu_id) { + case BCM590XX_PMUID_BCM59054: + pmu->n_regulators =3D BCM59054_NUM_REGS; + if (pmu->mfd->rev_analog =3D=3D BCM59054_REV_ANALOG_A1) + pmu->regs =3D bcm59054_a1_regs; + else + pmu->regs =3D bcm59054_regs; + break; + case BCM590XX_PMUID_BCM59056: + pmu->n_regulators =3D BCM59056_NUM_REGS; + pmu->regs =3D bcm59056_regs; + break; + default: + dev_err(bcm590xx->dev, + "unknown device type, could not initialize\n"); + return -EINVAL; + } =20 platform_set_drvdata(pdev, pmu); =20 --=20 2.49.0