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Wed, 30 Apr 2025 06:01:21 -0700 (PDT) From: Krzysztof Kozlowski Date: Wed, 30 Apr 2025 15:00:37 +0200 Subject: [PATCH v5 07/24] drm/msm/dpu: Add missing "fetch" name to set_active_pipes() Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250430-b4-sm8750-display-v5-7-8cab30c3e4df@linaro.org> References: <20250430-b4-sm8750-display-v5-0-8cab30c3e4df@linaro.org> In-Reply-To: <20250430-b4-sm8750-display-v5-0-8cab30c3e4df@linaro.org> To: Abhinav Kumar , Sean Paul , Marijn Suijten , David Airlie , Simona Vetter , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Krishna Manikandan , Jonathan Marek , Kuogee Hsieh , Neil Armstrong , Dmitry Baryshkov , Rob Clark , Bjorn Andersson , Michael Turquette , Stephen Boyd Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Krzysztof Kozlowski , Rob Clark , linux-clk@vger.kernel.org, Srinivas Kandagatla , Jessica Zhang , Dmitry Baryshkov X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; 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a=openpgp; fpr=9BD07E0E0C51F8D59677B7541B93437D3B41629B The set_active_pipes() callback configures CTL_FETCH_PIPE_ACTIVE and newer DPU v12.0 comes with CTL_PIPE_ACTIVE, thus rename it to set_active_fetch_pipes() to better match the purpose. Reviewed-by: Dmitry Baryshkov Reviewed-by: Jessica Zhang Signed-off-by: Krzysztof Kozlowski --- Changes in v2: 1. New patch --- drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 12 ++++++------ drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 6 +++--- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h | 2 +- 3 files changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c b/drivers/gpu/drm/msm= /disp/dpu1/dpu_crtc.c index 0714936d883523e5c53bfb42f932234db76c58db..2d7af6fff2708c12520a78cc6c9= 79b9930dffc95 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c @@ -445,9 +445,9 @@ static void _dpu_crtc_blend_setup_mixer(struct drm_crtc= *crtc, =20 uint32_t lm_idx; bool bg_alpha_enable =3D false; - DECLARE_BITMAP(fetch_active, SSPP_MAX); + DECLARE_BITMAP(active_fetch, SSPP_MAX); =20 - memset(fetch_active, 0, sizeof(fetch_active)); + memset(active_fetch, 0, sizeof(active_fetch)); drm_atomic_crtc_for_each_plane(plane, crtc) { state =3D plane->state; if (!state) @@ -464,7 +464,7 @@ static void _dpu_crtc_blend_setup_mixer(struct drm_crtc= *crtc, if (pstate->stage =3D=3D DPU_STAGE_BASE && format->alpha_enable) bg_alpha_enable =3D true; =20 - set_bit(pstate->pipe.sspp->idx, fetch_active); + set_bit(pstate->pipe.sspp->idx, active_fetch); _dpu_crtc_blend_setup_pipe(crtc, plane, mixer, cstate->num_mixers, pstate->stage, @@ -472,7 +472,7 @@ static void _dpu_crtc_blend_setup_mixer(struct drm_crtc= *crtc, &pstate->pipe, 0, stage_cfg); =20 if (pstate->r_pipe.sspp) { - set_bit(pstate->r_pipe.sspp->idx, fetch_active); + set_bit(pstate->r_pipe.sspp->idx, active_fetch); _dpu_crtc_blend_setup_pipe(crtc, plane, mixer, cstate->num_mixers, pstate->stage, @@ -492,8 +492,8 @@ static void _dpu_crtc_blend_setup_mixer(struct drm_crtc= *crtc, } } =20 - if (ctl->ops.set_active_pipes) - ctl->ops.set_active_pipes(ctl, fetch_active); + if (ctl->ops.set_active_fetch_pipes) + ctl->ops.set_active_fetch_pipes(ctl, active_fetch); =20 _dpu_crtc_program_lm_output_roi(crtc); } diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c b/drivers/gpu/drm/m= sm/disp/dpu1/dpu_hw_ctl.c index 216dfcabcb92d410ce185c0d34db69c99930d2b8..951d5dccab6faf34a519d066835= 14aea1ee6ef60 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c @@ -698,8 +698,8 @@ static void dpu_hw_ctl_reset_intf_cfg_v1(struct dpu_hw_= ctl *ctx, } } =20 -static void dpu_hw_ctl_set_fetch_pipe_active(struct dpu_hw_ctl *ctx, - unsigned long *fetch_active) +static void dpu_hw_ctl_set_active_fetch_pipes(struct dpu_hw_ctl *ctx, + unsigned long *fetch_active) { int i; u32 val =3D 0; @@ -787,7 +787,7 @@ struct dpu_hw_ctl *dpu_hw_ctl_init(struct drm_device *d= ev, c->ops.update_pending_flush_dspp =3D dpu_hw_ctl_update_pending_flush_dsp= p; =20 if (mdss_ver->core_major_ver >=3D 7) - c->ops.set_active_pipes =3D dpu_hw_ctl_set_fetch_pipe_active; + c->ops.set_active_fetch_pipes =3D dpu_hw_ctl_set_active_fetch_pipes; =20 c->idx =3D cfg->id; c->mixer_count =3D mixer_count; diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h b/drivers/gpu/drm/m= sm/disp/dpu1/dpu_hw_ctl.h index aa560df698ed4e57a25e4a893d7333e19b065fe8..1b40d8cc92865e31e5ac4a8c3ee= 8fac8c5499bbd 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h @@ -254,7 +254,7 @@ struct dpu_hw_ctl_ops { void (*setup_blendstage)(struct dpu_hw_ctl *ctx, enum dpu_lm lm, struct dpu_hw_stage_cfg *cfg); =20 - void (*set_active_pipes)(struct dpu_hw_ctl *ctx, + void (*set_active_fetch_pipes)(struct dpu_hw_ctl *ctx, unsigned long *fetch_active); }; =20 --=20 2.45.2