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Mon, 28 Apr 2025 15:23:24 GMT Received: from smtpav05.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 40BF120040; Mon, 28 Apr 2025 15:23:24 +0000 (GMT) Received: from smtpav05.fra02v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 1DDDE20043; Mon, 28 Apr 2025 15:23:18 +0000 (GMT) Received: from li-e1dea04c-3555-11b2-a85c-f57333552245.ibm.com.com (unknown [9.39.30.54]) by smtpav05.fra02v.mail.ibm.com (Postfix) with ESMTP; Mon, 28 Apr 2025 15:23:17 +0000 (GMT) From: Mukesh Kumar Chaurasiya To: linux-kernel@vger.kernel.org Cc: maddy@linux.ibm.com, mpe@ellerman.id.au, npiggin@gmail.com, christophe.leroy@csgroup.eu, naveen@kernel.org, neeraj.upadhyay@kernel.org, vschneid@redhat.com, tglx@linutronix.de, frederic@kernel.org, ankur.a.arora@oracle.com, sshegde@linux.ibm.com, bigeasy@linutronix.de, kees@kernel.org, oleg@redhat.com, peterz@infradead.org, tzimmermann@suse.de, namcao@linutronix.de, kan.liang@linux.intel.com, mcgrof@kernel.org, rppt@kernel.org, atrajeev@linux.vnet.ibm.com, anjalik@linux.ibm.com, coltonlewis@google.com, linuxppc-dev@lists.ozlabs.org, Mukesh Kumar Chaurasiya Subject: [RFC V1 1/6] powerpc: rename arch_irq_disabled_regs Date: Mon, 28 Apr 2025 20:52:22 +0530 Message-ID: <20250428152225.66044-4-mchauras@linux.ibm.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250428152225.66044-2-mchauras@linux.ibm.com> References: <20250428152225.66044-2-mchauras@linux.ibm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 X-Authority-Analysis: v=2.4 cv=OYSYDgTY c=1 sm=1 tr=0 ts=680f9d71 cx=c_pps a=bLidbwmWQ0KltjZqbj+ezA==:117 a=bLidbwmWQ0KltjZqbj+ezA==:17 a=XR8D0OoHHMoA:10 a=VnNF1IyMAAAA:8 a=8txWmKPpaVdEF_iBmVcA:9 X-Proofpoint-GUID: fFNvrLAMIA9clWYErvlELafj9baN9_zQ X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwNDI4MDEyMCBTYWx0ZWRfX/LnGwDW7MwQM 2+pjMSwkH58FHmyXhbaw34lkJgH3KxTPmNB+sa/2gUG6wMQGEnCe8tpwIhNii63kC3uLV10C8GT ApfTbJIAiVXTyWO22TjmcYYM9/pW9/gbYg6nMOkFdb++Rzfv6ah4lAIpn1cpymE9H2bol/8jVoC nnjwhvbY3k66XhtQUPWlO1enouNVpDO0LqLpZUESWnA5Pyb21BvMeShZ1cMVKIUC4QjvRRijD1J fn9QsHcAvscmoGssVzndwDTgI8jIoD0d+92kojiDp9uWt1cB3N/0ZUBWm1nD2ld9vQizl7wzgBT LJENAZgTgjc4wGHqIR/ZSgrg7jeSzh2UnFsvRH4HJ3zuwfYAQnRPbiUH2BFfSxnSBJbEpHxGnfl 3q/4I2nEkJsBT71tmvnLppfBxfFmORIBcYX2mtuzgGzRGxYBzaH2ltBsrctbuJm0YaN+Yl0u X-Proofpoint-ORIG-GUID: xp_5H1xEGIPYkJb2xlacreUJttKpUIDg X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1099,Hydra:6.0.736,FMLib:17.12.80.40 definitions=2025-04-28_05,2025-04-24_02,2025-02-21_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 lowpriorityscore=0 suspectscore=0 mlxlogscore=859 phishscore=0 mlxscore=0 impostorscore=0 adultscore=0 priorityscore=1501 spamscore=0 malwarescore=0 clxscore=1015 classifier=spam authscore=0 authtc=n/a authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2504070000 definitions=main-2504280120 Content-Type: text/plain; charset="utf-8" Renaming arch_irq_disabled_regs to regs_irqs_disabled to be used commonly in generic entry exit framework and ppc arch code. Signed-off-by: Mukesh Kumar Chaurasiya --- arch/powerpc/include/asm/hw_irq.h | 4 ++-- arch/powerpc/include/asm/interrupt.h | 12 ++++++------ arch/powerpc/kernel/interrupt.c | 4 ++-- arch/powerpc/kernel/syscall.c | 2 +- arch/powerpc/kernel/traps.c | 2 +- arch/powerpc/kernel/watchdog.c | 2 +- arch/powerpc/perf/core-book3s.c | 2 +- 7 files changed, 14 insertions(+), 14 deletions(-) diff --git a/arch/powerpc/include/asm/hw_irq.h b/arch/powerpc/include/asm/h= w_irq.h index 569ac1165b069..2b9cf0380e0e9 100644 --- a/arch/powerpc/include/asm/hw_irq.h +++ b/arch/powerpc/include/asm/hw_irq.h @@ -393,7 +393,7 @@ static inline void do_hard_irq_enable(void) __hard_irq_enable(); } =20 -static inline bool arch_irq_disabled_regs(struct pt_regs *regs) +static inline bool regs_irqs_disabled(struct pt_regs *regs) { return (regs->softe & IRQS_DISABLED); } @@ -466,7 +466,7 @@ static inline bool arch_irqs_disabled(void) =20 #define hard_irq_disable() arch_local_irq_disable() =20 -static inline bool arch_irq_disabled_regs(struct pt_regs *regs) +static inline bool regs_irqs_disabled(struct pt_regs *regs) { return !(regs->msr & MSR_EE); } diff --git a/arch/powerpc/include/asm/interrupt.h b/arch/powerpc/include/as= m/interrupt.h index 23638d4e73ac0..56bc8113b8cde 100644 --- a/arch/powerpc/include/asm/interrupt.h +++ b/arch/powerpc/include/asm/interrupt.h @@ -172,7 +172,7 @@ static inline void interrupt_enter_prepare(struct pt_re= gs *regs) /* Enable MSR[RI] early, to support kernel SLB and hash faults */ #endif =20 - if (!arch_irq_disabled_regs(regs)) + if (!regs_irqs_disabled(regs)) trace_hardirqs_off(); =20 if (user_mode(regs)) { @@ -192,10 +192,10 @@ static inline void interrupt_enter_prepare(struct pt_= regs *regs) CT_WARN_ON(ct_state() !=3D CT_STATE_KERNEL && ct_state() !=3D CT_STATE_IDLE); INT_SOFT_MASK_BUG_ON(regs, is_implicit_soft_masked(regs)); - INT_SOFT_MASK_BUG_ON(regs, arch_irq_disabled_regs(regs) && + INT_SOFT_MASK_BUG_ON(regs, regs_irqs_disabled(regs) && search_kernel_restart_table(regs->nip)); } - INT_SOFT_MASK_BUG_ON(regs, !arch_irq_disabled_regs(regs) && + INT_SOFT_MASK_BUG_ON(regs, !regs_irqs_disabled(regs) && !(regs->msr & MSR_EE)); =20 booke_restore_dbcr0(); @@ -298,7 +298,7 @@ static inline void interrupt_nmi_enter_prepare(struct p= t_regs *regs, struct inte * Adjust regs->softe to be soft-masked if it had not been * reconcied (e.g., interrupt entry with MSR[EE]=3D0 but softe * not yet set disabled), or if it was in an implicit soft - * masked state. This makes arch_irq_disabled_regs(regs) + * masked state. This makes regs_irqs_disabled(regs) * behave as expected. */ regs->softe =3D IRQS_ALL_DISABLED; @@ -372,7 +372,7 @@ static inline void interrupt_nmi_exit_prepare(struct pt= _regs *regs, struct inter =20 #ifdef CONFIG_PPC64 #ifdef CONFIG_PPC_BOOK3S - if (arch_irq_disabled_regs(regs)) { + if (regs_irqs_disabled(regs)) { unsigned long rst =3D search_kernel_restart_table(regs->nip); if (rst) regs_set_return_ip(regs, rst); @@ -661,7 +661,7 @@ void replay_soft_interrupts(void); =20 static inline void interrupt_cond_local_irq_enable(struct pt_regs *regs) { - if (!arch_irq_disabled_regs(regs)) + if (!regs_irqs_disabled(regs)) local_irq_enable(); } =20 diff --git a/arch/powerpc/kernel/interrupt.c b/arch/powerpc/kernel/interrup= t.c index 8f4acc55407b0..f656192f075fb 100644 --- a/arch/powerpc/kernel/interrupt.c +++ b/arch/powerpc/kernel/interrupt.c @@ -343,7 +343,7 @@ notrace unsigned long interrupt_exit_user_prepare(struc= t pt_regs *regs) unsigned long ret; =20 BUG_ON(regs_is_unrecoverable(regs)); - BUG_ON(arch_irq_disabled_regs(regs)); + BUG_ON(regs_irqs_disabled(regs)); CT_WARN_ON(ct_state() =3D=3D CT_STATE_USER); =20 /* @@ -392,7 +392,7 @@ notrace unsigned long interrupt_exit_kernel_prepare(str= uct pt_regs *regs) =20 local_irq_disable(); =20 - if (!arch_irq_disabled_regs(regs)) { + if (!regs_irqs_disabled(regs)) { /* Returning to a kernel context with local irqs enabled. */ WARN_ON_ONCE(!(regs->msr & MSR_EE)); again: diff --git a/arch/powerpc/kernel/syscall.c b/arch/powerpc/kernel/syscall.c index be159ad4b77bd..9f03a6263fb41 100644 --- a/arch/powerpc/kernel/syscall.c +++ b/arch/powerpc/kernel/syscall.c @@ -32,7 +32,7 @@ notrace long system_call_exception(struct pt_regs *regs, = unsigned long r0) =20 BUG_ON(regs_is_unrecoverable(regs)); BUG_ON(!user_mode(regs)); - BUG_ON(arch_irq_disabled_regs(regs)); + BUG_ON(regs_irqs_disabled(regs)); =20 #ifdef CONFIG_PPC_PKEY if (mmu_has_feature(MMU_FTR_PKEY)) { diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c index cb8e9357383e9..629f2a2d4780e 100644 --- a/arch/powerpc/kernel/traps.c +++ b/arch/powerpc/kernel/traps.c @@ -1956,7 +1956,7 @@ DEFINE_INTERRUPT_HANDLER_RAW(performance_monitor_exce= ption) * prevent hash faults on user addresses when reading callchains (and * looks better from an irq tracing perspective). */ - if (IS_ENABLED(CONFIG_PPC64) && unlikely(arch_irq_disabled_regs(regs))) + if (IS_ENABLED(CONFIG_PPC64) && unlikely(regs_irqs_disabled(regs))) performance_monitor_exception_nmi(regs); else performance_monitor_exception_async(regs); diff --git a/arch/powerpc/kernel/watchdog.c b/arch/powerpc/kernel/watchdog.c index 2429cb1c7baa7..6111cbbde069d 100644 --- a/arch/powerpc/kernel/watchdog.c +++ b/arch/powerpc/kernel/watchdog.c @@ -373,7 +373,7 @@ DEFINE_INTERRUPT_HANDLER_NMI(soft_nmi_interrupt) u64 tb; =20 /* should only arrive from kernel, with irqs disabled */ - WARN_ON_ONCE(!arch_irq_disabled_regs(regs)); + WARN_ON_ONCE(!regs_irqs_disabled(regs)); =20 if (!cpumask_test_cpu(cpu, &wd_cpus_enabled)) return 0; diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3= s.c index b906d28f74fd4..35f5f33f5777e 100644 --- a/arch/powerpc/perf/core-book3s.c +++ b/arch/powerpc/perf/core-book3s.c @@ -2483,7 +2483,7 @@ static void __perf_event_interrupt(struct pt_regs *re= gs) * will trigger a PMI after waking up from idle. Since counter values are= _not_ * saved/restored in idle path, can lead to below "Can't find PMC" messag= e. */ - if (unlikely(!found) && !arch_irq_disabled_regs(regs)) + if (unlikely(!found) && !regs_irqs_disabled(regs)) printk_ratelimited(KERN_WARNING "Can't find PMC that caused IRQ\n"); =20 /* --=20 2.49.0