From nobody Fri Dec 19 04:06:48 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B5E5C23E34C; Sun, 27 Apr 2025 06:25:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1745735118; cv=none; b=nPKwIZuJov/8dK48WiXCptQbBg8I/cn8kBsK9Ta3DlgVRytwmavoFb181/OkaDQPkkI+XTGasJZ784PbnR+pIRjDU1HGzDPlQZdgtURVnY2O/nRdKGi5xR6bj2HlI4WPCE8Bd0vZgmzttjeEGzzwqaz4kXokvE86qaMnEx+0FAQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1745735118; c=relaxed/simple; bh=dLzh5gkStK5tiW1DDixOn6lzXp+3vPrEOPm2Q8VZyIs=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=UTVu7npMbxZBUDcd9k64Bg15BWcBLAjwGPzqh1oETuYDBjKHRehyR3U8oZuL2z+6+1cPC9E8ZaG4z26SeV4T83M06hqLqgjlPBiFPstGwiP5NWSepFxvtuz2CK0o1APokmqadFCQHf3RWN1jK7ISX3S0DhXU+guyn/rqqBR2ktg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=ZAbYVFYD; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="ZAbYVFYD" Received: by smtp.kernel.org (Postfix) with ESMTPS id 330BBC4CEED; Sun, 27 Apr 2025 06:25:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1745735118; bh=dLzh5gkStK5tiW1DDixOn6lzXp+3vPrEOPm2Q8VZyIs=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=ZAbYVFYD4dbYJoXyrlONQzCGxlaqO27VCOQY78h1SP6GZGUoKjzDJK2+0/56OJuiv 2uWrV6YEOKqjIn8BUT4OfjjiQRqw7fJ0sli8BIyO8nHadQYJyuDObR8/znS14+GBu0 1vUgL5idnmCHrVAvg0PKd4AZNVp42aX0XOgAzS2M+CsIeWzMc6NpnXceNXOJUFm6j6 feqKfIdklbjcAsvLdoaBz3N+aDcWWHIlNbpJ69quE76xnICE5BPg5EOjbGWgvf4K2X GvAipGDJgIVuBfwTnNqe0IFRI7GqrPudC21CjIis/9mUptB2twpjoj3pIGS1RMXFab HTxGEpm84PBGw== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 23330C369D9; Sun, 27 Apr 2025 06:25:18 +0000 (UTC) From: Kurt Borja via B4 Relay Date: Sun, 27 Apr 2025 03:24:48 -0300 Subject: [PATCH v2 1/2] platform/x86: alienware-wmi-wmax: Expose GPIO debug methods Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250427-awcc-gpio-v2-1-c731373b5d02@gmail.com> References: <20250427-awcc-gpio-v2-0-c731373b5d02@gmail.com> In-Reply-To: <20250427-awcc-gpio-v2-0-c731373b5d02@gmail.com> To: Hans de Goede , =?utf-8?q?Ilpo_J=C3=A4rvinen?= , Armin Wolf Cc: Gabriel Marcano , platform-driver-x86@vger.kernel.org, Dell.Client.Kernel@dell.com, linux-kernel@vger.kernel.org, Kurt Borja X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=6152; i=kuurtb@gmail.com; h=from:subject:message-id; bh=PjTxT/MddMmROi/3VFQbwJotJF1sMRpyb3LM+xRIsXY=; b=owGbwMvMwCUmluBs8WX+lTTG02pJDBm8Z8+Uilf3HGba8DLzOf/b6WtL1/+9cOxv6l2ON4W71 zwtuhV9qqOUhUGMi0FWTJGlPWHRt0dReW/9DoTeh5nDygQyhIGLUwAmcsGKkeFekiJDo6Hu9R1F 0983r/p+aLPr9adSmUZ/WPdPfj/j6dJmRobFosrHzkxM77J40pqWab6qZY3R1qS3h0X6xW7eS3t Y+YUXAA== X-Developer-Key: i=kuurtb@gmail.com; a=openpgp; fpr=54D3BE170AEF777983C3C63B57E3B6585920A69A X-Endpoint-Received: by B4 Relay for kuurtb@gmail.com/default with auth_id=387 X-Original-From: Kurt Borja Reply-To: kuurtb@gmail.com From: Kurt Borja Devices with the AWCC interface come with a USB RGB-lighting STM32 MCU, which has two GPIO pins with debug capabilities: - Device Firmware Update mode (DFU) - Negative Reset (NRST) The WMAX device has methods to toggle or read the state of these GPIO pins. Expose these methods through DebugFS, hidden behind an unsafe module parameter to avoid common users from toying with these without consideration. Suggested-by: Gabriel Marcano Reviewed-by: Armin Wolf Signed-off-by: Kurt Borja --- Documentation/ABI/testing/debugfs-alienware-wmi | 20 +++++ drivers/platform/x86/dell/alienware-wmi-wmax.c | 108 ++++++++++++++++++++= +++- 2 files changed, 127 insertions(+), 1 deletion(-) diff --git a/Documentation/ABI/testing/debugfs-alienware-wmi b/Documentatio= n/ABI/testing/debugfs-alienware-wmi index 48cfd4d0b002efd7b68d9c1d3aa91a3a05f49db5..d20b8627ac5f1528396549a8148= 1e26889bc410e 100644 --- a/Documentation/ABI/testing/debugfs-alienware-wmi +++ b/Documentation/ABI/testing/debugfs-alienware-wmi @@ -42,3 +42,23 @@ Description: details. =20 RO + +What: /sys/kernel/debug/alienware-wmi-/gpio_ctl/total_gp= ios +Date: May 2025 +KernelVersion: 6.16 +Contact: Kurt Borja +Description: + Total number of GPIO pins reported by the device. + + RO + +What: /sys/kernel/debug/alienware-wmi-/gpio_ctl/_pin +Date: May 2025 +KernelVersion: 6.16 +Contact: Kurt Borja +Description: + This file controls status. + + See Documentation/wmi/devices/alienware-wmi.rst for details. + + RW diff --git a/drivers/platform/x86/dell/alienware-wmi-wmax.c b/drivers/platf= orm/x86/dell/alienware-wmi-wmax.c index faeddfe3b79e0aa51e7c8c6b23aa4ac5c7218706..8e682427580a629f48530d7c926= db4587352c04c 100644 --- a/drivers/platform/x86/dell/alienware-wmi-wmax.c +++ b/drivers/platform/x86/dell/alienware-wmi-wmax.c @@ -38,6 +38,9 @@ #define AWCC_METHOD_GET_FAN_SENSORS 0x13 #define AWCC_METHOD_THERMAL_INFORMATION 0x14 #define AWCC_METHOD_THERMAL_CONTROL 0x15 +#define AWCC_METHOD_FWUP_GPIO_CONTROL 0x20 +#define AWCC_METHOD_READ_TOTAL_GPIOS 0x21 +#define AWCC_METHOD_READ_GPIO_STATUS 0x22 #define AWCC_METHOD_GAME_SHIFT_STATUS 0x25 =20 #define AWCC_FAILURE_CODE 0xFFFFFFFF @@ -217,6 +220,11 @@ enum AWCC_TEMP_SENSOR_TYPES { AWCC_TEMP_SENSOR_GPU =3D 0x06, }; =20 +enum AWCC_GPIO_PINS { + AWCC_GPIO_PIN_DFU =3D 0x00, + AWCC_GPIO_PIN_NRST =3D 0x01, +}; + enum awcc_thermal_profile { AWCC_PROFILE_USTT_BALANCED, AWCC_PROFILE_USTT_BALANCED_PERFORMANCE, @@ -571,6 +579,38 @@ static int awcc_thermal_information(struct wmi_device = *wdev, u8 operation, u8 ar return awcc_wmi_command(wdev, AWCC_METHOD_THERMAL_INFORMATION, &args, out= ); } =20 +static int awcc_fwup_gpio_control(struct wmi_device *wdev, u8 pin, u8 stat= us) +{ + struct wmax_u32_args args =3D { + .operation =3D pin, + .arg1 =3D status, + .arg2 =3D 0, + .arg3 =3D 0, + }; + u32 out; + + return awcc_wmi_command(wdev, AWCC_METHOD_FWUP_GPIO_CONTROL, &args, &out); +} + +static int awcc_read_total_gpios(struct wmi_device *wdev, u32 *count) +{ + struct wmax_u32_args args =3D {}; + + return awcc_wmi_command(wdev, AWCC_METHOD_READ_TOTAL_GPIOS, &args, count); +} + +static int awcc_read_gpio_status(struct wmi_device *wdev, u8 pin, u32 *sta= tus) +{ + struct wmax_u32_args args =3D { + .operation =3D pin, + .arg1 =3D 0, + .arg2 =3D 0, + .arg3 =3D 0, + }; + + return awcc_wmi_command(wdev, AWCC_METHOD_READ_GPIO_STATUS, &args, status= ); +} + static int awcc_game_shift_status(struct wmi_device *wdev, u8 operation, u32 *out) { @@ -1318,6 +1358,63 @@ static int awcc_debugfs_pprof_data_read(struct seq_f= ile *seq, void *data) return 0; } =20 +static int awcc_debugfs_total_gpios_read(struct seq_file *seq, void *data) +{ + struct device *dev =3D seq->private; + struct wmi_device *wdev =3D to_wmi_device(dev); + u32 count; + int ret; + + ret =3D awcc_read_total_gpios(wdev, &count); + if (ret) + return ret; + + seq_printf(seq, "%u\n", count); + + return 0; +} + +static int awcc_gpio_pin_show(struct seq_file *seq, void *data) +{ + unsigned long pin =3D debugfs_get_aux_num(seq->file); + struct wmi_device *wdev =3D seq->private; + u32 status; + int ret; + + ret =3D awcc_read_gpio_status(wdev, pin, &status); + if (ret) + return ret; + + seq_printf(seq, "%u\n", status); + + return 0; +} + +static ssize_t awcc_gpio_pin_write(struct file *file, const char __user *b= uf, + size_t count, loff_t *ppos) +{ + unsigned long pin =3D debugfs_get_aux_num(file); + struct seq_file *seq =3D file->private_data; + struct wmi_device *wdev =3D seq->private; + bool status; + int ret; + + if (!ppos || *ppos) + return -EINVAL; + + ret =3D kstrtobool_from_user(buf, count, &status); + if (ret) + return ret; + + ret =3D awcc_fwup_gpio_control(wdev, pin, status); + if (ret) + return ret; + + return count; +} + +DEFINE_SHOW_STORE_ATTRIBUTE(awcc_gpio_pin); + static void awcc_debugfs_remove(void *data) { struct dentry *root =3D data; @@ -1327,7 +1424,7 @@ static void awcc_debugfs_remove(void *data) =20 static void awcc_debugfs_init(struct wmi_device *wdev) { - struct dentry *root; + struct dentry *root, *gpio_ctl; char name[64]; =20 scnprintf(name, sizeof(name), "%s-%s", "alienware-wmi", dev_name(&wdev->d= ev)); @@ -1344,6 +1441,15 @@ static void awcc_debugfs_init(struct wmi_device *wde= v) debugfs_create_devm_seqfile(&wdev->dev, "pprof_data", root, awcc_debugfs_pprof_data_read); =20 + gpio_ctl =3D debugfs_create_dir("gpio_ctl", root); + + debugfs_create_devm_seqfile(&wdev->dev, "total_gpios", gpio_ctl, + awcc_debugfs_total_gpios_read); + debugfs_create_file_aux_num("dfu_pin", 0644, gpio_ctl, wdev, + AWCC_GPIO_PIN_DFU, &awcc_gpio_pin_fops); + debugfs_create_file_aux_num("nrst_pin", 0644, gpio_ctl, wdev, + AWCC_GPIO_PIN_NRST, &awcc_gpio_pin_fops); + devm_add_action_or_reset(&wdev->dev, awcc_debugfs_remove, root); } =20 --=20 2.49.0 From nobody Fri Dec 19 04:06:48 2025 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C7DA923FC4C; Sun, 27 Apr 2025 06:25:18 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1745735120; cv=none; b=fPBW0eMhNZF1JGeu1xnD086hpar3p2sjFcieQBroN+nAkHr7IdO1BbConbyHsj51C6/0ISZZF05VUiXYWkPwXFstw/ww0+Z8y8fe0SX1pAz0QQaUACA9MmpoWlPGw+Varz0Qiv54FcUUaeO5ThHiOCKPxJPFzKi0n2OgsrQGJW4= ARC-Message-Signature: i=1; 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a=openpgp-sha256; l=5285; i=kuurtb@gmail.com; h=from:subject:message-id; bh=zC8+gJDq11VBsTxTMVnO6aUkwcVu2ZYewNrS8rkQd+k=; b=owGbwMvMwCUmluBs8WX+lTTG02pJDBm8Z8+4+7vMOnyoK9+6QtPZIvq0nU+WWtNaRYmdT+u3Z 3LZ9p7rKGVhEONikBVTZGlPWPTtUVTeW78Dofdh5rAygQxh4OIUgIkcuMPwT99iWi4b75XcjcLi AS+1fjak/A5cZZO9JphHRrjR8LjzRkaGv2fu50VNfPWs4b3Y7zdLZAOSEi/efqaew37ni7aVaZQ qHwA= X-Developer-Key: i=kuurtb@gmail.com; a=openpgp; fpr=54D3BE170AEF777983C3C63B57E3B6585920A69A X-Endpoint-Received: by B4 Relay for kuurtb@gmail.com/default with auth_id=387 X-Original-From: Kurt Borja Reply-To: kuurtb@gmail.com From: Kurt Borja Add documentation for the GPIO control methods. Signed-off-by: Kurt Borja Reviewed-by: Armin Wolf --- Documentation/wmi/devices/alienware-wmi.rst | 78 +++++++++++++++++++++++++= ++-- 1 file changed, 74 insertions(+), 4 deletions(-) diff --git a/Documentation/wmi/devices/alienware-wmi.rst b/Documentation/wm= i/devices/alienware-wmi.rst index 79238051b18bc5de9b502325017cd5c5fcf41748..2a6052efb9ae0e3fe0a5d9d5775= 073234dfc96fb 100644 --- a/Documentation/wmi/devices/alienware-wmi.rst +++ b/Documentation/wmi/devices/alienware-wmi.rst @@ -231,6 +231,70 @@ WMI method MemoryOCControl([in] uint32 arg2, [out] uin= t32 argr) AWCC supports memory overclocking, but this method is very intricate and h= as not been deciphered yet. =20 +GPIO control Methods +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D + +Alienware and Dell G Series devices with the AWCC interface usually have an +embedded STM32 RGB lighting controller with USB/HID capabilities. It's ven= dor ID +is ``187c`` while it's product ID may vary from model to model. + +The control of two GPIO pins of this MCU is exposed as WMI methods for deb= ugging +purposes. + ++--------------+----------------------------------------------------------= ----+ +| Pin | Description = | ++=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D+=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D+=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D+ +| 0 | Device Firmware Update (DFU) | **HIGH**: Enables DFU mod= e | +| | mode pin. | on next MCU boot. = | +| | +--------------------------= ----+ +| | | **LOW**: Disables DFU mod= e | +| | | on next MCU boot. = | ++--------------+-------------------------------+--------------------------= ----+ +| 1 | Negative Reset (NRST) pin. | **HIGH**: MCU is ON. = | +| | | = | +| | +--------------------------= ----+ +| | | **LOW**: MCU is OFF. = | +| | | = | ++--------------+-------------------------------+--------------------------= ----+ + +See :ref:`acknowledgements` for more information on this MCU. + +.. note:: + Some GPIO control methods break the usual argument structure and take a + **Pin number** instead of an operation on the first byte. + +WMI method FWUpdateGPIOtoggle([in] uint32 arg2, [out] uint32 argr) +------------------------------------------------------------------ + ++--------------------+------------------------------------+---------------= -----+ +| Operation (Byte 0) | Description | Arguments = | ++=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D+=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D+=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D+ +| Pin number | Set the pin status | - Byte 1: Pin = | +| | | status = | ++--------------------+------------------------------------+---------------= -----+ + +WMI method ReadTotalofGPIOs([out] uint32 argr) +---------------------------------------------- + ++--------------------+------------------------------------+---------------= -----+ +| Operation (Byte 0) | Description | Arguments = | ++=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D+=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D+=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D+ +| 0x00 | Get the total number of GPIOs | - None = | ++--------------------+------------------------------------+---------------= -----+ + +WMI method ReadGPIOpPinStatus([in] uint32 arg2, [out] uint32 argr) +------------------------------------------------------------------ + ++--------------------+------------------------------------+---------------= -----+ +| Operation (Byte 0) | Description | Arguments = | ++=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D+=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D+=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D+ +| Pin number | Get the pin status | - None = | ++--------------------+------------------------------------+---------------= -----+ + +.. note:: + There known firmware bug in some laptops where reading the status of a = pin + also flips it. + Other information Methods =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D =20 @@ -239,10 +303,16 @@ WMI method ReadChassisColor([out] uint32 argr) =20 Returns the chassis color internal ID. =20 +.. _acknowledgements: + Acknowledgements =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D =20 -Kudos to `AlexIII `_ and -`T-Troll `_ for documenting and -testing some of this device's functionality, making it possible to general= ize -this driver. +Kudos to + +* `AlexIII `_ +* `T-Troll `_ +* `Gabriel Marcano `_ + +for documenting and testing some of this device's functionality, making it +possible to generalize this driver. --=20 2.49.0