From nobody Mon Feb 9 01:21:20 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4D9FF256C71; Thu, 24 Apr 2025 10:27:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1745490437; cv=none; b=MSLH22CYsegyc2kkMg/4nI9nRE6O1+FkYvJkcN2CQDztJJm0dhML0uLYdP7dDMKMVdm6CJ5uBQnRgrfIV6wqXFBf9YOQYcczDIP98iejraLgUNX1PVfeUmhtexjFqEY7WBHKc7LjZpi8w4ZMDT4dFC/yWMalx0x6lxoJ2clIEBM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1745490437; c=relaxed/simple; bh=dDrbPic70xFVMnGI2U6eslEy81yc+v4juJuGar89STY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Sa2zD/5mR7TyG/Cp5c1R+7HU/r1Z53LNmL1e5FgIBSBt1hXJfMk1AdAwXm4TgcYOgFKzN1JdSAPQA/iuiiAWLyexhLn3yZpz7hxFpyhcqPZN+JFUsayIV1EiSBwfQesA+9W07/5zqOi7oNyG8gi2SHrGfQYains7IBXOAjxmpqQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=D0pECic4; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="D0pECic4" Received: by smtp.kernel.org (Postfix) with ESMTPSA id E2020C4CEEB; Thu, 24 Apr 2025 10:27:11 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1745490437; bh=dDrbPic70xFVMnGI2U6eslEy81yc+v4juJuGar89STY=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=D0pECic4PC1ECNiE9KxvONqdcV7iY4sJIJDtHj4rLRslWAbzxGFs1oSYxsOKXkGms gnUL05IYWX76PpfA5m7tbErBTnee48PVME5h2C96Hv5w8XM7orAu5i06X5DCV42pdA 7Ar+43dQ7dwnqFEZfFlrm/0aterhtNk29pEOpy0dq5H4beeh2XwllciYhTvZhqccyh yWP9AHiJdCzt5mKle4W45rOs7rndYEAsLuImHz3XErx6sY8Mm5+pqiHIQ9EIq5OGID u4vDHKRRHcUN72uzu+QVJP3qZkkqMmlhWUGoDstbyXwId/MiPNGOgtomsyJ8RGCAgO jXhRJoznbcp6A== From: Lorenzo Pieralisi Date: Thu, 24 Apr 2025 12:25:28 +0200 Subject: [PATCH v2 17/22] arm64: cpucaps: Add GICv5 CPU interface (GCIE) capability Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250424-gicv5-host-v2-17-545edcaf012b@kernel.org> References: <20250424-gicv5-host-v2-0-545edcaf012b@kernel.org> In-Reply-To: <20250424-gicv5-host-v2-0-545edcaf012b@kernel.org> To: Marc Zyngier , Thomas Gleixner , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Catalin Marinas , Will Deacon Cc: Arnd Bergmann , Sascha Bischoff , Timothy Hayes , "Liam R. Howlett" , Mark Rutland , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Lorenzo Pieralisi X-Mailer: b4 0.14.2 Implement the GCIE capability as a strict boot cpu capability to detect whether architectural GICv5 support is available in HW. Plug it in with a naming consistent with the existing GICv3 CPU interface capability. Signed-off-by: Lorenzo Pieralisi Cc: Will Deacon Cc: Catalin Marinas Cc: Marc Zyngier --- arch/arm64/kernel/cpufeature.c | 7 +++++++ arch/arm64/tools/cpucaps | 1 + 2 files changed, 8 insertions(+) diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index cbb49de451f45fbee3100ea01e77b06352bd55ac..4d5163a20ee0fb09380ea5f1f2d= 37afb7257edfb 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -3041,6 +3041,13 @@ static const struct arm64_cpu_capabilities arm64_fea= tures[] =3D { .matches =3D has_pmuv3, }, #endif + { + .desc =3D "GICv5 CPU interface", + .type =3D ARM64_CPUCAP_STRICT_BOOT_CPU_FEATURE, + .capability =3D ARM64_HAS_GICV5_CPUIF, + .matches =3D has_cpuid_feature, + ARM64_CPUID_FIELDS(ID_AA64PFR2_EL1, GCIE, IMP) + }, {}, }; =20 diff --git a/arch/arm64/tools/cpucaps b/arch/arm64/tools/cpucaps index 860ec49cc0530885c138b7dc7f67d58cd69b2593..c36f4165e2bb460abde81baf453= 199f62dd265b0 100644 --- a/arch/arm64/tools/cpucaps +++ b/arch/arm64/tools/cpucaps @@ -35,6 +35,7 @@ HAS_GENERIC_AUTH_ARCH_QARMA3 HAS_GENERIC_AUTH_ARCH_QARMA5 HAS_GENERIC_AUTH_IMP_DEF HAS_GICV3_CPUIF +HAS_GICV5_CPUIF HAS_GIC_PRIO_MASKING HAS_GIC_PRIO_RELAXED_SYNC HAS_HCR_NV1 --=20 2.48.0