From nobody Fri Dec 19 21:50:41 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id DDEDE2951D1 for ; Wed, 23 Apr 2025 15:17:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1745421469; cv=none; b=PPCPjVcsn18tqelEVPNm4ge6/OTDGrJ+eNjKRf7iF5jlhEEITY5bBkkLn5FQD20gVhz0wGclfaI5XWSZlWzErs/kRn3UIsuDViIgviWLLFyA6HidDZ02BAfEVPR69pa6ELn9MmqJEqo2L1GDFtQLltQT+E5jWiGAkhLu8NViE1g= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1745421469; c=relaxed/simple; bh=zfJkNMlnACAFobpHWY++GU847XClNIJaVCDV++npNks=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; b=H/UBB13W1qhauebGrny3CpGkEtR51P/Y6lrQ8y92idGHWhX+gHas7y5lsJzjIXxmez6PFmB3u1ioQnMmmyfQ/x0gkJ+yS1cV/vphiPzG/kEStE4FQyGmMM6KuSrafEBzVicC08c5rjanQ4sAJYfsEy+zOBTLscEZ/sPB6LxjklQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E6242106F; Wed, 23 Apr 2025 08:17:40 -0700 (PDT) Received: from e132581.cambridge.arm.com (e132581.arm.com [10.1.196.87]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id B7A863F66E; Wed, 23 Apr 2025 08:17:43 -0700 (PDT) From: Leo Yan To: Suzuki K Poulose , Mike Leach , James Clark , Anshuman Khandual , Alexander Shishkin , Maxime Coquelin , Alexandre Torgue , Greg Kroah-Hartman , coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Cc: Leo Yan Subject: [PATCH v2 1/9] coresight: tmc: Support atclk Date: Wed, 23 Apr 2025 16:17:18 +0100 Message-Id: <20250423151726.372561-2-leo.yan@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250423151726.372561-1-leo.yan@arm.com> References: <20250423151726.372561-1-leo.yan@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The atclk is an optional clock for the CoreSight TMC, but the driver misses to initialize it. In most cases, TMC shares the atclk clock with other CoreSight components. Since these components enable the clock before the TMC device is initialized, the TMC continues properly, which is why we don=E2=80=99t observe any lockup issues. This change enables atclk in probe of the TMC driver. Given the clock is optional, it is possible to return NULL if the clock does not exist. IS_ERR() is tolerant for this case. Dynamically disable and enable atclk during suspend and resume. The clock pointers will never be error values if the driver has successfully probed, and the case of a NULL pointer case will be handled by the clock core layer. The driver data is always valid after probe. Therefore, remove the related checks. Also in the resume flow adds error handling. Fixes: bc4bf7fe98da ("coresight-tmc: add CoreSight TMC driver") Signed-off-by: Leo Yan Reviewed-by: Anshuman Khandual --- drivers/hwtracing/coresight/coresight-tmc-core.c | 22 +++++++++++++++++---= -- drivers/hwtracing/coresight/coresight-tmc.h | 2 ++ 2 files changed, 19 insertions(+), 5 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-tmc-core.c b/drivers/hwt= racing/coresight/coresight-tmc-core.c index a7814e8e657b..ddca5ddf4ed2 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-core.c +++ b/drivers/hwtracing/coresight/coresight-tmc-core.c @@ -789,6 +789,10 @@ static int __tmc_probe(struct device *dev, struct reso= urce *res) struct coresight_desc desc =3D { 0 }; struct coresight_dev_list *dev_list =3D NULL; =20 + drvdata->atclk =3D devm_clk_get_optional_enabled(dev, "atclk"); + if (IS_ERR(drvdata->atclk)) + return PTR_ERR(drvdata->atclk); + ret =3D -ENOMEM; =20 /* Validity for the resource is already checked by the AMBA core */ @@ -1019,18 +1023,26 @@ static int tmc_runtime_suspend(struct device *dev) { struct tmc_drvdata *drvdata =3D dev_get_drvdata(dev); =20 - if (drvdata && !IS_ERR_OR_NULL(drvdata->pclk)) - clk_disable_unprepare(drvdata->pclk); + clk_disable_unprepare(drvdata->atclk); + clk_disable_unprepare(drvdata->pclk); + return 0; } =20 static int tmc_runtime_resume(struct device *dev) { struct tmc_drvdata *drvdata =3D dev_get_drvdata(dev); + int ret; =20 - if (drvdata && !IS_ERR_OR_NULL(drvdata->pclk)) - clk_prepare_enable(drvdata->pclk); - return 0; + ret =3D clk_prepare_enable(drvdata->pclk); + if (ret) + return ret; + + ret =3D clk_prepare_enable(drvdata->atclk); + if (ret) + clk_disable_unprepare(drvdata->pclk); + + return ret; } #endif =20 diff --git a/drivers/hwtracing/coresight/coresight-tmc.h b/drivers/hwtracin= g/coresight/coresight-tmc.h index 6541a27a018e..cbb4ba439158 100644 --- a/drivers/hwtracing/coresight/coresight-tmc.h +++ b/drivers/hwtracing/coresight/coresight-tmc.h @@ -210,6 +210,7 @@ struct tmc_resrv_buf { =20 /** * struct tmc_drvdata - specifics associated to an TMC component + * @atclk: optional clock for the core parts of the TMC. * @pclk: APB clock if present, otherwise NULL * @base: memory mapped base address for this component. * @csdev: component vitals needed by the framework. @@ -244,6 +245,7 @@ struct tmc_resrv_buf { * Used by ETR/ETF. */ struct tmc_drvdata { + struct clk *atclk; struct clk *pclk; void __iomem *base; struct coresight_device *csdev; --=20 2.34.1 From nobody Fri Dec 19 21:50:41 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id A46C82957DA for ; Wed, 23 Apr 2025 15:17:48 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1745421470; cv=none; b=B4nbYPE4V4ugWt+6ACfcyu6PYtxZWi1a0ACqqwXF9SYEJgMA+6byFS14ea0INl/lqhtg3WsXB7LghkYq6zutw2pQIVv0nggfd+QYC85UTwqCdRn/Z91t+JmpyDYbIULZef9A3keQqsH6nZ9y7/ZnJWtskGITH+A+bkIEIqhwfZE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1745421470; c=relaxed/simple; bh=AenYQeeyVEf3lB52nFT4K7s6IhUIJSmg4uaC1vswXxI=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=Ds/jvVWX496KWYyIw7I1VPzyulJjBzeTt+4ng8bF82bPvLqYHcU4tZVLv5Cti+rh7aniy1Dxldb2cx7mUQtEF0QXUN/eHW6l6SGqXe5Mo1eh9WKGek8RxVq2kJe3GBwREWwp/tUV8+OvPsmvYWhi+ON0KxzulobSmHFGsjfC1Bw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 193C41063; Wed, 23 Apr 2025 08:17:43 -0700 (PDT) Received: from e132581.cambridge.arm.com (e132581.arm.com [10.1.196.87]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id DF6BA3F66E; Wed, 23 Apr 2025 08:17:45 -0700 (PDT) From: Leo Yan To: Suzuki K Poulose , Mike Leach , James Clark , Anshuman Khandual , Alexander Shishkin , Maxime Coquelin , Alexandre Torgue , Greg Kroah-Hartman , coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Cc: Leo Yan Subject: [PATCH v2 2/9] coresight: catu: Support atclk Date: Wed, 23 Apr 2025 16:17:19 +0100 Message-Id: <20250423151726.372561-3-leo.yan@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250423151726.372561-1-leo.yan@arm.com> References: <20250423151726.372561-1-leo.yan@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The atclk is an optional clock for the CoreSight CATU, but the driver misses to initialize it. This change enables atclk in probe of the CATU driver, and dynamically control the clock during suspend and resume. The checks for driver data and clocks in suspend and resume are not needed, remove them. Add error handling in the resume function. Fixes: fcacb5c154ba ("coresight: Introduce support for Coresight Address Tr= anslation Unit") Signed-off-by: Leo Yan Reviewed-by: Anshuman Khandual --- drivers/hwtracing/coresight/coresight-catu.c | 22 +++++++++++++++++----- drivers/hwtracing/coresight/coresight-catu.h | 1 + 2 files changed, 18 insertions(+), 5 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-catu.c b/drivers/hwtraci= ng/coresight/coresight-catu.c index fa170c966bc3..9fcda5e49253 100644 --- a/drivers/hwtracing/coresight/coresight-catu.c +++ b/drivers/hwtracing/coresight/coresight-catu.c @@ -513,6 +513,10 @@ static int __catu_probe(struct device *dev, struct res= ource *res) struct coresight_platform_data *pdata =3D NULL; void __iomem *base; =20 + drvdata->atclk =3D devm_clk_get_optional_enabled(dev, "atclk"); + if (IS_ERR(drvdata->atclk)) + return PTR_ERR(drvdata->atclk); + catu_desc.name =3D coresight_alloc_device_name(&catu_devs, dev); if (!catu_desc.name) return -ENOMEM; @@ -659,18 +663,26 @@ static int catu_runtime_suspend(struct device *dev) { struct catu_drvdata *drvdata =3D dev_get_drvdata(dev); =20 - if (drvdata && !IS_ERR_OR_NULL(drvdata->pclk)) - clk_disable_unprepare(drvdata->pclk); + clk_disable_unprepare(drvdata->atclk); + clk_disable_unprepare(drvdata->pclk); + return 0; } =20 static int catu_runtime_resume(struct device *dev) { struct catu_drvdata *drvdata =3D dev_get_drvdata(dev); + int ret; =20 - if (drvdata && !IS_ERR_OR_NULL(drvdata->pclk)) - clk_prepare_enable(drvdata->pclk); - return 0; + ret =3D clk_prepare_enable(drvdata->pclk); + if (ret) + return ret; + + ret =3D clk_prepare_enable(drvdata->atclk); + if (ret) + clk_disable_unprepare(drvdata->pclk); + + return ret; } #endif =20 diff --git a/drivers/hwtracing/coresight/coresight-catu.h b/drivers/hwtraci= ng/coresight/coresight-catu.h index 141feac1c14b..2fe31fed6cf1 100644 --- a/drivers/hwtracing/coresight/coresight-catu.h +++ b/drivers/hwtracing/coresight/coresight-catu.h @@ -62,6 +62,7 @@ =20 struct catu_drvdata { struct clk *pclk; + struct clk *atclk; void __iomem *base; struct coresight_device *csdev; int irq; --=20 2.34.1 From nobody Fri Dec 19 21:50:41 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id A65CE28D85C for ; Wed, 23 Apr 2025 15:17:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1745421472; cv=none; b=kS5CxWT4mC379a0cLwTaKv32aUQC6xVFD2Z0+jDvZQ3zOnX4FcpiKbCE+DFDz0vuIXzlF5NQeFrUtLw9rkz994PNTJkRSQYyC1HPPq/Mpa68kS7ALf4BWzFU3SAEM6toiAAOgLb15G2t52rznqSA/yPwhCYZm0jhw6cao3RwEvA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1745421472; c=relaxed/simple; bh=xHgmsI7+yZUDuvEvTwwdOr4m1lB8sBflAmr06Pxl+/4=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=I/RuVwIn5ni6al4BFjGMxXDG5pnQlUxhWbmVgJIXeCsKdPYQiQbzDcIAoaXuJc+CAtOp9uNQ0ketBBklYkjeywg9JbytwiOOSInXB1dTp15Gk3omiIoCjzQJuDY/0g/SbPkmiLS555OFTqcBVbQBh8Hmx0UR5dAtCKtfHlnOKKY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 4046E106F; Wed, 23 Apr 2025 08:17:45 -0700 (PDT) Received: from e132581.cambridge.arm.com (e132581.arm.com [10.1.196.87]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 134F93F66E; Wed, 23 Apr 2025 08:17:47 -0700 (PDT) From: Leo Yan To: Suzuki K Poulose , Mike Leach , James Clark , Anshuman Khandual , Alexander Shishkin , Maxime Coquelin , Alexandre Torgue , Greg Kroah-Hartman , coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Cc: Leo Yan Subject: [PATCH v2 3/9] coresight: etm4x: Support atclk Date: Wed, 23 Apr 2025 16:17:20 +0100 Message-Id: <20250423151726.372561-4-leo.yan@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250423151726.372561-1-leo.yan@arm.com> References: <20250423151726.372561-1-leo.yan@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The atclk is an optional clock for the CoreSight ETMv4, but the driver misses to initialize it. This change enables atclk in probe of the ETMv4 driver, and dynamically control the clock during suspend and resume. No need to check the driver data and clock pointer in the runtime suspend and resume, so remove checks. And add error handling in the resume function. Add a minor fix to the comment format when adding the atclk field. Fixes: 2e1cdfe184b5 ("coresight-etm4x: Adding CoreSight ETM4x driver") Signed-off-by: Leo Yan Reviewed-by: Anshuman Khandual --- drivers/hwtracing/coresight/coresight-etm4x-core.c | 20 +++++++++++++++---= -- drivers/hwtracing/coresight/coresight-etm4x.h | 4 +++- 2 files changed, 18 insertions(+), 6 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/h= wtracing/coresight/coresight-etm4x-core.c index e5972f16abff..537d57006a25 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c @@ -2149,6 +2149,10 @@ static int etm4_probe(struct device *dev) if (WARN_ON(!drvdata)) return -ENOMEM; =20 + drvdata->atclk =3D devm_clk_get_optional_enabled(dev, "atclk"); + if (IS_ERR(drvdata->atclk)) + return PTR_ERR(drvdata->atclk); + if (pm_save_enable =3D=3D PARAM_PM_SAVE_FIRMWARE) pm_save_enable =3D coresight_loses_context_with_cpu(dev) ? PARAM_PM_SAVE_SELF_HOSTED : PARAM_PM_SAVE_NEVER; @@ -2397,8 +2401,8 @@ static int etm4_runtime_suspend(struct device *dev) { struct etmv4_drvdata *drvdata =3D dev_get_drvdata(dev); =20 - if (drvdata->pclk && !IS_ERR(drvdata->pclk)) - clk_disable_unprepare(drvdata->pclk); + clk_disable_unprepare(drvdata->atclk); + clk_disable_unprepare(drvdata->pclk); =20 return 0; } @@ -2406,11 +2410,17 @@ static int etm4_runtime_suspend(struct device *dev) static int etm4_runtime_resume(struct device *dev) { struct etmv4_drvdata *drvdata =3D dev_get_drvdata(dev); + int ret; + + ret =3D clk_prepare_enable(drvdata->pclk); + if (ret) + return ret; =20 - if (drvdata->pclk && !IS_ERR(drvdata->pclk)) - clk_prepare_enable(drvdata->pclk); + ret =3D clk_prepare_enable(drvdata->atclk); + if (ret) + clk_disable_unprepare(drvdata->pclk); =20 - return 0; + return ret; } #endif =20 diff --git a/drivers/hwtracing/coresight/coresight-etm4x.h b/drivers/hwtrac= ing/coresight/coresight-etm4x.h index bd7db36ba197..0c21832b5d69 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x.h +++ b/drivers/hwtracing/coresight/coresight-etm4x.h @@ -919,7 +919,8 @@ struct etmv4_save_state { =20 /** * struct etm4_drvdata - specifics associated to an ETM component - * @pclk APB clock if present, otherwise NULL + * @pclk: APB clock if present, otherwise NULL + * @atclk: Optional clock for the core parts of the ETMv4. * @base: Memory mapped base address for this component. * @csdev: Component vitals needed by the framework. * @spinlock: Only one at a time pls. @@ -987,6 +988,7 @@ struct etmv4_save_state { */ struct etmv4_drvdata { struct clk *pclk; + struct clk *atclk; void __iomem *base; struct coresight_device *csdev; raw_spinlock_t spinlock; --=20 2.34.1 From nobody Fri Dec 19 21:50:41 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id CFF3729614B for ; Wed, 23 Apr 2025 15:17:52 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1745421475; cv=none; b=G2YYlHlTdWaT/xTpI0egjxFx4Bhh+ah0q+vMLAOCq4AfkKCBmbW+3FINIK27NPv0sOpEdzP3xa5wr1zWokiw5K2LBLw5riixW8PRzKQk5+kIRQ16cE+GrxR9ExJfsv4s6d64mdVfOQB+Wc3C4WlcQYyNczspC3NT9m6QSiwZT/U= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1745421475; c=relaxed/simple; bh=EtH4of9U8j7MSf74G1BzdW5Bhjix1cEvMZOHA1BEpQ4=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=fmLDwrtqFYnZPCTZCgK1WvulWX4JesFBxmlRHz+Jj/8iwua5A3Ad7x6zZjN2U09tVw9D9ydu0SCZ0GcS64viIDfC+fI8A0US0sjhDMJltBUHQBQ4zCj+Mf1l3g8W2JuUddJ7JW4OOCUfo9Eaib2uFC/gmBgUmigr5Q3132RVgUw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 6896C1063; Wed, 23 Apr 2025 08:17:47 -0700 (PDT) Received: from e132581.cambridge.arm.com (e132581.arm.com [10.1.196.87]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 3B4E93F66E; Wed, 23 Apr 2025 08:17:50 -0700 (PDT) From: Leo Yan To: Suzuki K Poulose , Mike Leach , James Clark , Anshuman Khandual , Alexander Shishkin , Maxime Coquelin , Alexandre Torgue , Greg Kroah-Hartman , coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Cc: Leo Yan Subject: [PATCH v2 4/9] coresight: Disable programming clock properly Date: Wed, 23 Apr 2025 16:17:21 +0100 Message-Id: <20250423151726.372561-5-leo.yan@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250423151726.372561-1-leo.yan@arm.com> References: <20250423151726.372561-1-leo.yan@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Some CoreSight components have programming clocks (pclk) and are enabled using clk_get() and clk_prepare_enable(). However, in many cases, these clocks are not disabled when modules exit and only released by clk_put(). To fix the issue, this commit refactors coresight_get_enable_apb_pclk() by replacing clk_get() and clk_prepare_enable() with devm_clk_get_enabled() for enabling APB clock. Callers are updated to reuse the returned error value. With the change, programming clocks are managed as resources in driver model layer, allowing clock cleanup to be handled automatically. As a result, manual cleanup operations are no longer needed and are removed from the Coresight drivers. Fixes: 73d779a03a76 ("coresight: etm4x: Change etm4_platform_driver driver = for MMIO devices") Signed-off-by: Leo Yan --- drivers/hwtracing/coresight/coresight-catu.c | 9 ++------- drivers/hwtracing/coresight/coresight-cpu-debug.c | 6 +----- drivers/hwtracing/coresight/coresight-ctcu-core.c | 10 ++-------- drivers/hwtracing/coresight/coresight-etm4x-core.c | 9 ++------- drivers/hwtracing/coresight/coresight-funnel.c | 6 +----- drivers/hwtracing/coresight/coresight-replicator.c | 6 +----- drivers/hwtracing/coresight/coresight-stm.c | 4 +--- drivers/hwtracing/coresight/coresight-tmc-core.c | 4 +--- drivers/hwtracing/coresight/coresight-tpiu.c | 4 +--- include/linux/coresight.h | 16 +++------------- 10 files changed, 15 insertions(+), 59 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-catu.c b/drivers/hwtraci= ng/coresight/coresight-catu.c index 9fcda5e49253..c0a51ab0312c 100644 --- a/drivers/hwtracing/coresight/coresight-catu.c +++ b/drivers/hwtracing/coresight/coresight-catu.c @@ -627,7 +627,7 @@ static int catu_platform_probe(struct platform_device *= pdev) =20 drvdata->pclk =3D coresight_get_enable_apb_pclk(&pdev->dev); if (IS_ERR(drvdata->pclk)) - return -ENODEV; + return PTR_ERR(drvdata->pclk); =20 pm_runtime_get_noresume(&pdev->dev); pm_runtime_set_active(&pdev->dev); @@ -636,11 +636,8 @@ static int catu_platform_probe(struct platform_device = *pdev) dev_set_drvdata(&pdev->dev, drvdata); ret =3D __catu_probe(&pdev->dev, res); pm_runtime_put(&pdev->dev); - if (ret) { + if (ret) pm_runtime_disable(&pdev->dev); - if (!IS_ERR_OR_NULL(drvdata->pclk)) - clk_put(drvdata->pclk); - } =20 return ret; } @@ -654,8 +651,6 @@ static void catu_platform_remove(struct platform_device= *pdev) =20 __catu_remove(&pdev->dev); pm_runtime_disable(&pdev->dev); - if (!IS_ERR_OR_NULL(drvdata->pclk)) - clk_put(drvdata->pclk); } =20 #ifdef CONFIG_PM diff --git a/drivers/hwtracing/coresight/coresight-cpu-debug.c b/drivers/hw= tracing/coresight/coresight-cpu-debug.c index 342c3aaf414d..744b6f9b065e 100644 --- a/drivers/hwtracing/coresight/coresight-cpu-debug.c +++ b/drivers/hwtracing/coresight/coresight-cpu-debug.c @@ -699,7 +699,7 @@ static int debug_platform_probe(struct platform_device = *pdev) =20 drvdata->pclk =3D coresight_get_enable_apb_pclk(&pdev->dev); if (IS_ERR(drvdata->pclk)) - return -ENODEV; + return PTR_ERR(drvdata->pclk); =20 dev_set_drvdata(&pdev->dev, drvdata); pm_runtime_get_noresume(&pdev->dev); @@ -710,8 +710,6 @@ static int debug_platform_probe(struct platform_device = *pdev) if (ret) { pm_runtime_put_noidle(&pdev->dev); pm_runtime_disable(&pdev->dev); - if (!IS_ERR_OR_NULL(drvdata->pclk)) - clk_put(drvdata->pclk); } return ret; } @@ -725,8 +723,6 @@ static void debug_platform_remove(struct platform_devic= e *pdev) =20 __debug_remove(&pdev->dev); pm_runtime_disable(&pdev->dev); - if (!IS_ERR_OR_NULL(drvdata->pclk)) - clk_put(drvdata->pclk); } =20 #ifdef CONFIG_ACPI diff --git a/drivers/hwtracing/coresight/coresight-ctcu-core.c b/drivers/hw= tracing/coresight/coresight-ctcu-core.c index c6bafc96db96..de279efe3405 100644 --- a/drivers/hwtracing/coresight/coresight-ctcu-core.c +++ b/drivers/hwtracing/coresight/coresight-ctcu-core.c @@ -209,7 +209,7 @@ static int ctcu_probe(struct platform_device *pdev) =20 drvdata->apb_clk =3D coresight_get_enable_apb_pclk(dev); if (IS_ERR(drvdata->apb_clk)) - return -ENODEV; + return PTR_ERR(drvdata->apb_clk); =20 cfgs =3D of_device_get_match_data(dev); if (cfgs) { @@ -233,12 +233,8 @@ static int ctcu_probe(struct platform_device *pdev) desc.access =3D CSDEV_ACCESS_IOMEM(base); =20 drvdata->csdev =3D coresight_register(&desc); - if (IS_ERR(drvdata->csdev)) { - if (!IS_ERR_OR_NULL(drvdata->apb_clk)) - clk_put(drvdata->apb_clk); - + if (IS_ERR(drvdata->csdev)) return PTR_ERR(drvdata->csdev); - } =20 return 0; } @@ -275,8 +271,6 @@ static void ctcu_platform_remove(struct platform_device= *pdev) =20 ctcu_remove(pdev); pm_runtime_disable(&pdev->dev); - if (!IS_ERR_OR_NULL(drvdata->apb_clk)) - clk_put(drvdata->apb_clk); } =20 #ifdef CONFIG_PM diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/h= wtracing/coresight/coresight-etm4x-core.c index 537d57006a25..ff4ac4b686c4 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c @@ -2237,14 +2237,12 @@ static int etm4_probe_platform_dev(struct platform_= device *pdev) =20 drvdata->pclk =3D coresight_get_enable_apb_pclk(&pdev->dev); if (IS_ERR(drvdata->pclk)) - return -ENODEV; + return PTR_ERR(drvdata->pclk); =20 if (res) { drvdata->base =3D devm_ioremap_resource(&pdev->dev, res); - if (IS_ERR(drvdata->base)) { - clk_put(drvdata->pclk); + if (IS_ERR(drvdata->base)) return PTR_ERR(drvdata->base); - } } =20 dev_set_drvdata(&pdev->dev, drvdata); @@ -2351,9 +2349,6 @@ static void etm4_remove_platform_dev(struct platform_= device *pdev) if (drvdata) etm4_remove_dev(drvdata); pm_runtime_disable(&pdev->dev); - - if (drvdata && !IS_ERR_OR_NULL(drvdata->pclk)) - clk_put(drvdata->pclk); } =20 static const struct amba_id etm4_ids[] =3D { diff --git a/drivers/hwtracing/coresight/coresight-funnel.c b/drivers/hwtra= cing/coresight/coresight-funnel.c index 0541712b2bcb..3fb9d0a37d55 100644 --- a/drivers/hwtracing/coresight/coresight-funnel.c +++ b/drivers/hwtracing/coresight/coresight-funnel.c @@ -240,7 +240,7 @@ static int funnel_probe(struct device *dev, struct reso= urce *res) =20 drvdata->pclk =3D coresight_get_enable_apb_pclk(dev); if (IS_ERR(drvdata->pclk)) - return -ENODEV; + return PTR_ERR(drvdata->pclk); =20 /* * Map the device base for dynamic-funnel, which has been @@ -283,8 +283,6 @@ static int funnel_probe(struct device *dev, struct reso= urce *res) out_disable_clk: if (ret && !IS_ERR_OR_NULL(drvdata->atclk)) clk_disable_unprepare(drvdata->atclk); - if (ret && !IS_ERR_OR_NULL(drvdata->pclk)) - clk_disable_unprepare(drvdata->pclk); return ret; } =20 @@ -354,8 +352,6 @@ static void funnel_platform_remove(struct platform_devi= ce *pdev) =20 funnel_remove(&pdev->dev); pm_runtime_disable(&pdev->dev); - if (!IS_ERR_OR_NULL(drvdata->pclk)) - clk_put(drvdata->pclk); } =20 static const struct of_device_id funnel_match[] =3D { diff --git a/drivers/hwtracing/coresight/coresight-replicator.c b/drivers/h= wtracing/coresight/coresight-replicator.c index ee7ee79f6cf7..87346617b852 100644 --- a/drivers/hwtracing/coresight/coresight-replicator.c +++ b/drivers/hwtracing/coresight/coresight-replicator.c @@ -247,7 +247,7 @@ static int replicator_probe(struct device *dev, struct = resource *res) =20 drvdata->pclk =3D coresight_get_enable_apb_pclk(dev); if (IS_ERR(drvdata->pclk)) - return -ENODEV; + return PTR_ERR(drvdata->pclk); =20 /* * Map the device base for dynamic-replicator, which has been @@ -295,8 +295,6 @@ static int replicator_probe(struct device *dev, struct = resource *res) out_disable_clk: if (ret && !IS_ERR_OR_NULL(drvdata->atclk)) clk_disable_unprepare(drvdata->atclk); - if (ret && !IS_ERR_OR_NULL(drvdata->pclk)) - clk_disable_unprepare(drvdata->pclk); return ret; } =20 @@ -334,8 +332,6 @@ static void replicator_platform_remove(struct platform_= device *pdev) =20 replicator_remove(&pdev->dev); pm_runtime_disable(&pdev->dev); - if (!IS_ERR_OR_NULL(drvdata->pclk)) - clk_put(drvdata->pclk); } =20 #ifdef CONFIG_PM diff --git a/drivers/hwtracing/coresight/coresight-stm.c b/drivers/hwtracin= g/coresight/coresight-stm.c index 26f9339f38b9..c32d0bd92f30 100644 --- a/drivers/hwtracing/coresight/coresight-stm.c +++ b/drivers/hwtracing/coresight/coresight-stm.c @@ -851,7 +851,7 @@ static int __stm_probe(struct device *dev, struct resou= rce *res) =20 drvdata->pclk =3D coresight_get_enable_apb_pclk(dev); if (IS_ERR(drvdata->pclk)) - return -ENODEV; + return PTR_ERR(drvdata->pclk); dev_set_drvdata(dev, drvdata); =20 base =3D devm_ioremap_resource(dev, res); @@ -1033,8 +1033,6 @@ static void stm_platform_remove(struct platform_devic= e *pdev) =20 __stm_remove(&pdev->dev); pm_runtime_disable(&pdev->dev); - if (!IS_ERR_OR_NULL(drvdata->pclk)) - clk_put(drvdata->pclk); } =20 #ifdef CONFIG_ACPI diff --git a/drivers/hwtracing/coresight/coresight-tmc-core.c b/drivers/hwt= racing/coresight/coresight-tmc-core.c index ddca5ddf4ed2..517850d39a0e 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-core.c +++ b/drivers/hwtracing/coresight/coresight-tmc-core.c @@ -990,7 +990,7 @@ static int tmc_platform_probe(struct platform_device *p= dev) =20 drvdata->pclk =3D coresight_get_enable_apb_pclk(&pdev->dev); if (IS_ERR(drvdata->pclk)) - return -ENODEV; + return PTR_ERR(drvdata->pclk); =20 dev_set_drvdata(&pdev->dev, drvdata); pm_runtime_get_noresume(&pdev->dev); @@ -1014,8 +1014,6 @@ static void tmc_platform_remove(struct platform_devic= e *pdev) =20 __tmc_remove(&pdev->dev); pm_runtime_disable(&pdev->dev); - if (!IS_ERR_OR_NULL(drvdata->pclk)) - clk_put(drvdata->pclk); } =20 #ifdef CONFIG_PM diff --git a/drivers/hwtracing/coresight/coresight-tpiu.c b/drivers/hwtraci= ng/coresight/coresight-tpiu.c index 97ef36f03ec2..4b9634941752 100644 --- a/drivers/hwtracing/coresight/coresight-tpiu.c +++ b/drivers/hwtracing/coresight/coresight-tpiu.c @@ -153,7 +153,7 @@ static int __tpiu_probe(struct device *dev, struct reso= urce *res) =20 drvdata->pclk =3D coresight_get_enable_apb_pclk(dev); if (IS_ERR(drvdata->pclk)) - return -ENODEV; + return PTR_ERR(drvdata->pclk); dev_set_drvdata(dev, drvdata); =20 /* Validity for the resource is already checked by the AMBA core */ @@ -293,8 +293,6 @@ static void tpiu_platform_remove(struct platform_device= *pdev) =20 __tpiu_remove(&pdev->dev); pm_runtime_disable(&pdev->dev); - if (!IS_ERR_OR_NULL(drvdata->pclk)) - clk_put(drvdata->pclk); } =20 #ifdef CONFIG_ACPI diff --git a/include/linux/coresight.h b/include/linux/coresight.h index d79a242b271d..b888f6ed59b2 100644 --- a/include/linux/coresight.h +++ b/include/linux/coresight.h @@ -476,26 +476,16 @@ static inline bool is_coresight_device(void __iomem *= base) * Returns: * * clk - Clock is found and enabled - * NULL - clock is not found * ERROR - Clock is found but failed to enable */ static inline struct clk *coresight_get_enable_apb_pclk(struct device *dev) { struct clk *pclk; - int ret; =20 - pclk =3D clk_get(dev, "apb_pclk"); - if (IS_ERR(pclk)) { - pclk =3D clk_get(dev, "apb"); - if (IS_ERR(pclk)) - return NULL; - } + pclk =3D devm_clk_get_enabled(dev, "apb_pclk"); + if (IS_ERR(pclk)) + pclk =3D devm_clk_get_enabled(dev, "apb"); =20 - ret =3D clk_prepare_enable(pclk); - if (ret) { - clk_put(pclk); - return ERR_PTR(ret); - } return pclk; } =20 --=20 2.34.1 From nobody Fri Dec 19 21:50:41 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 70C9428D85C for ; Wed, 23 Apr 2025 15:17:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1745421476; cv=none; b=lgRFckBY7MCy7m0b6C+e9sWJ9PaEyL4Fkc90qyG/0GfVDP4FiFdBjeW9LgolvT11H2HHXD1uFCnt/37teMrATdwvx+4Vc3qJY14txnGRrN95Z6ayY0LihRFqajlTxlyunm8TeBFxCQ6IutNA2WgpJYoY1MYJk/mXkGroz4VePGE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; 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Wed, 23 Apr 2025 08:17:52 -0700 (PDT) From: Leo Yan To: Suzuki K Poulose , Mike Leach , James Clark , Anshuman Khandual , Alexander Shishkin , Maxime Coquelin , Alexandre Torgue , Greg Kroah-Hartman , coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Cc: Leo Yan Subject: [PATCH v2 5/9] coresight: Disable trace bus clock properly Date: Wed, 23 Apr 2025 16:17:22 +0100 Message-Id: <20250423151726.372561-6-leo.yan@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250423151726.372561-1-leo.yan@arm.com> References: <20250423151726.372561-1-leo.yan@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Some CoreSight components have trace bus clocks 'atclk' and are enabled using clk_prepare_enable(). These clocks are not disabled when modules exit. As atclk is optional, use devm_clk_get_optional_enabled() to manage it. The benefit is the driver model layer can automatically disable and release clocks. Check the returned value with IS_ERR() to detect errors but leave the NULL pointer case if the clock is not found. And remove the error handling codes which are no longer needed. Fixes: d1839e687773 ("coresight: etm: retrieve and handle atclk") Signed-off-by: Leo Yan Reviewed-by: Anshuman Khandual --- drivers/hwtracing/coresight/coresight-etb10.c | 10 ++++------ drivers/hwtracing/coresight/coresight-etm3x-core.c | 9 +++------ drivers/hwtracing/coresight/coresight-funnel.c | 36 +++++++++++-------= ------------------ drivers/hwtracing/coresight/coresight-replicator.c | 34 ++++++++++--------= ---------------- drivers/hwtracing/coresight/coresight-stm.c | 9 +++------ drivers/hwtracing/coresight/coresight-tpiu.c | 10 +++------- 6 files changed, 34 insertions(+), 74 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-etb10.c b/drivers/hwtrac= ing/coresight/coresight-etb10.c index 7948597d483d..45c2f8f50a3f 100644 --- a/drivers/hwtracing/coresight/coresight-etb10.c +++ b/drivers/hwtracing/coresight/coresight-etb10.c @@ -730,12 +730,10 @@ static int etb_probe(struct amba_device *adev, const = struct amba_id *id) if (!drvdata) return -ENOMEM; =20 - drvdata->atclk =3D devm_clk_get(&adev->dev, "atclk"); /* optional */ - if (!IS_ERR(drvdata->atclk)) { - ret =3D clk_prepare_enable(drvdata->atclk); - if (ret) - return ret; - } + drvdata->atclk =3D devm_clk_get_optional_enabled(dev, "atclk"); + if (IS_ERR(drvdata->atclk)) + return PTR_ERR(drvdata->atclk); + dev_set_drvdata(dev, drvdata); =20 /* validity for the resource is already checked by the AMBA core */ diff --git a/drivers/hwtracing/coresight/coresight-etm3x-core.c b/drivers/h= wtracing/coresight/coresight-etm3x-core.c index 8927bfaf3af2..adbb134f80e6 100644 --- a/drivers/hwtracing/coresight/coresight-etm3x-core.c +++ b/drivers/hwtracing/coresight/coresight-etm3x-core.c @@ -832,12 +832,9 @@ static int etm_probe(struct amba_device *adev, const s= truct amba_id *id) =20 spin_lock_init(&drvdata->spinlock); =20 - drvdata->atclk =3D devm_clk_get(&adev->dev, "atclk"); /* optional */ - if (!IS_ERR(drvdata->atclk)) { - ret =3D clk_prepare_enable(drvdata->atclk); - if (ret) - return ret; - } + drvdata->atclk =3D devm_clk_get_optional_enabled(dev, "atclk"); + if (IS_ERR(drvdata->atclk)) + return PTR_ERR(drvdata->atclk); =20 drvdata->cpu =3D coresight_get_cpu(dev); if (drvdata->cpu < 0) diff --git a/drivers/hwtracing/coresight/coresight-funnel.c b/drivers/hwtra= cing/coresight/coresight-funnel.c index 3fb9d0a37d55..ec6d3e656548 100644 --- a/drivers/hwtracing/coresight/coresight-funnel.c +++ b/drivers/hwtracing/coresight/coresight-funnel.c @@ -213,7 +213,6 @@ ATTRIBUTE_GROUPS(coresight_funnel); =20 static int funnel_probe(struct device *dev, struct resource *res) { - int ret; void __iomem *base; struct coresight_platform_data *pdata =3D NULL; struct funnel_drvdata *drvdata; @@ -231,12 +230,9 @@ static int funnel_probe(struct device *dev, struct res= ource *res) if (!drvdata) return -ENOMEM; =20 - drvdata->atclk =3D devm_clk_get(dev, "atclk"); /* optional */ - if (!IS_ERR(drvdata->atclk)) { - ret =3D clk_prepare_enable(drvdata->atclk); - if (ret) - return ret; - } + drvdata->atclk =3D devm_clk_get_optional_enabled(dev, "atclk"); + if (IS_ERR(drvdata->atclk)) + return PTR_ERR(drvdata->atclk); =20 drvdata->pclk =3D coresight_get_enable_apb_pclk(dev); if (IS_ERR(drvdata->pclk)) @@ -248,10 +244,8 @@ static int funnel_probe(struct device *dev, struct res= ource *res) */ if (res) { base =3D devm_ioremap_resource(dev, res); - if (IS_ERR(base)) { - ret =3D PTR_ERR(base); - goto out_disable_clk; - } + if (IS_ERR(base)) + return PTR_ERR(base); drvdata->base =3D base; desc.groups =3D coresight_funnel_groups; desc.access =3D CSDEV_ACCESS_IOMEM(base); @@ -260,10 +254,9 @@ static int funnel_probe(struct device *dev, struct res= ource *res) dev_set_drvdata(dev, drvdata); =20 pdata =3D coresight_get_platform_data(dev); - if (IS_ERR(pdata)) { - ret =3D PTR_ERR(pdata); - goto out_disable_clk; - } + if (IS_ERR(pdata)) + return PTR_ERR(pdata); + dev->platform_data =3D pdata; =20 raw_spin_lock_init(&drvdata->spinlock); @@ -273,17 +266,10 @@ static int funnel_probe(struct device *dev, struct re= source *res) desc.pdata =3D pdata; desc.dev =3D dev; drvdata->csdev =3D coresight_register(&desc); - if (IS_ERR(drvdata->csdev)) { - ret =3D PTR_ERR(drvdata->csdev); - goto out_disable_clk; - } + if (IS_ERR(drvdata->csdev)) + return PTR_ERR(drvdata->csdev); =20 - ret =3D 0; - -out_disable_clk: - if (ret && !IS_ERR_OR_NULL(drvdata->atclk)) - clk_disable_unprepare(drvdata->atclk); - return ret; + return 0; } =20 static int funnel_remove(struct device *dev) diff --git a/drivers/hwtracing/coresight/coresight-replicator.c b/drivers/h= wtracing/coresight/coresight-replicator.c index 87346617b852..460af0f7b537 100644 --- a/drivers/hwtracing/coresight/coresight-replicator.c +++ b/drivers/hwtracing/coresight/coresight-replicator.c @@ -219,7 +219,6 @@ static const struct attribute_group *replicator_groups[= ] =3D { =20 static int replicator_probe(struct device *dev, struct resource *res) { - int ret =3D 0; struct coresight_platform_data *pdata =3D NULL; struct replicator_drvdata *drvdata; struct coresight_desc desc =3D { 0 }; @@ -238,12 +237,9 @@ static int replicator_probe(struct device *dev, struct= resource *res) if (!drvdata) return -ENOMEM; =20 - drvdata->atclk =3D devm_clk_get(dev, "atclk"); /* optional */ - if (!IS_ERR(drvdata->atclk)) { - ret =3D clk_prepare_enable(drvdata->atclk); - if (ret) - return ret; - } + drvdata->atclk =3D devm_clk_get_optional_enabled(dev, "atclk"); + if (IS_ERR(drvdata->atclk)) + return PTR_ERR(drvdata->atclk); =20 drvdata->pclk =3D coresight_get_enable_apb_pclk(dev); if (IS_ERR(drvdata->pclk)) @@ -255,10 +251,8 @@ static int replicator_probe(struct device *dev, struct= resource *res) */ if (res) { base =3D devm_ioremap_resource(dev, res); - if (IS_ERR(base)) { - ret =3D PTR_ERR(base); - goto out_disable_clk; - } + if (IS_ERR(base)) + return PTR_ERR(base); drvdata->base =3D base; desc.groups =3D replicator_groups; desc.access =3D CSDEV_ACCESS_IOMEM(base); @@ -271,10 +265,8 @@ static int replicator_probe(struct device *dev, struct= resource *res) dev_set_drvdata(dev, drvdata); =20 pdata =3D coresight_get_platform_data(dev); - if (IS_ERR(pdata)) { - ret =3D PTR_ERR(pdata); - goto out_disable_clk; - } + if (IS_ERR(pdata)) + return PTR_ERR(pdata); dev->platform_data =3D pdata; =20 raw_spin_lock_init(&drvdata->spinlock); @@ -285,17 +277,11 @@ static int replicator_probe(struct device *dev, struc= t resource *res) desc.dev =3D dev; =20 drvdata->csdev =3D coresight_register(&desc); - if (IS_ERR(drvdata->csdev)) { - ret =3D PTR_ERR(drvdata->csdev); - goto out_disable_clk; - } + if (IS_ERR(drvdata->csdev)) + return PTR_ERR(drvdata->csdev); =20 replicator_reset(drvdata); - -out_disable_clk: - if (ret && !IS_ERR_OR_NULL(drvdata->atclk)) - clk_disable_unprepare(drvdata->atclk); - return ret; + return 0; } =20 static int replicator_remove(struct device *dev) diff --git a/drivers/hwtracing/coresight/coresight-stm.c b/drivers/hwtracin= g/coresight/coresight-stm.c index c32d0bd92f30..f13fbab4d7a2 100644 --- a/drivers/hwtracing/coresight/coresight-stm.c +++ b/drivers/hwtracing/coresight/coresight-stm.c @@ -842,12 +842,9 @@ static int __stm_probe(struct device *dev, struct reso= urce *res) if (!drvdata) return -ENOMEM; =20 - drvdata->atclk =3D devm_clk_get(dev, "atclk"); /* optional */ - if (!IS_ERR(drvdata->atclk)) { - ret =3D clk_prepare_enable(drvdata->atclk); - if (ret) - return ret; - } + drvdata->atclk =3D devm_clk_get_optional_enabled(dev, "atclk"); + if (IS_ERR(drvdata->atclk)) + return PTR_ERR(drvdata->atclk); =20 drvdata->pclk =3D coresight_get_enable_apb_pclk(dev); if (IS_ERR(drvdata->pclk)) diff --git a/drivers/hwtracing/coresight/coresight-tpiu.c b/drivers/hwtraci= ng/coresight/coresight-tpiu.c index 4b9634941752..cac1b5bba086 100644 --- a/drivers/hwtracing/coresight/coresight-tpiu.c +++ b/drivers/hwtracing/coresight/coresight-tpiu.c @@ -128,7 +128,6 @@ static const struct coresight_ops tpiu_cs_ops =3D { =20 static int __tpiu_probe(struct device *dev, struct resource *res) { - int ret; void __iomem *base; struct coresight_platform_data *pdata =3D NULL; struct tpiu_drvdata *drvdata; @@ -144,12 +143,9 @@ static int __tpiu_probe(struct device *dev, struct res= ource *res) =20 spin_lock_init(&drvdata->spinlock); =20 - drvdata->atclk =3D devm_clk_get(dev, "atclk"); /* optional */ - if (!IS_ERR(drvdata->atclk)) { - ret =3D clk_prepare_enable(drvdata->atclk); - if (ret) - return ret; - } + drvdata->atclk =3D devm_clk_get_optional_enabled(dev, "atclk"); + if (IS_ERR(drvdata->atclk)) + return PTR_ERR(drvdata->atclk); =20 drvdata->pclk =3D coresight_get_enable_apb_pclk(dev); if (IS_ERR(drvdata->pclk)) --=20 2.34.1 From nobody Fri Dec 19 21:50:41 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 62A3629CB5D for ; Wed, 23 Apr 2025 15:17:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1745421479; cv=none; b=oRDl8JR96Nak8eFO80UQAGeFquF+BnlhR9A5dC0zOFPU2iFMnjOfl3FoqP5cR+oUm4SG3w9z39hOYFugKROtDQRc3qa/himgAn4m7QorQXzRPYRue/8/7xteHzaDacATshzs5BqheM875Hqu6Etow9pxdn/jCJQqSa7x3OvDYdw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1745421479; 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Wed, 23 Apr 2025 08:17:54 -0700 (PDT) From: Leo Yan To: Suzuki K Poulose , Mike Leach , James Clark , Anshuman Khandual , Alexander Shishkin , Maxime Coquelin , Alexandre Torgue , Greg Kroah-Hartman , coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Cc: Leo Yan Subject: [PATCH v2 6/9] coresight: Avoid enable programming clock duplicately Date: Wed, 23 Apr 2025 16:17:23 +0100 Message-Id: <20250423151726.372561-7-leo.yan@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250423151726.372561-1-leo.yan@arm.com> References: <20250423151726.372561-1-leo.yan@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The programming clock is enabled by AMBA bus driver before a dynamic probe. As a result, a CoreSight driver may redundantly enable the same clock. To avoid this, add a check for device type and skip enabling the programming clock for AMBA devices. The returned NULL pointer will be tolerated by the drivers. Fixes: 73d779a03a76 ("coresight: etm4x: Change etm4_platform_driver driver = for MMIO devices") Signed-off-by: Leo Yan --- include/linux/coresight.h | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/include/linux/coresight.h b/include/linux/coresight.h index b888f6ed59b2..26eb4a61b992 100644 --- a/include/linux/coresight.h +++ b/include/linux/coresight.h @@ -476,15 +476,18 @@ static inline bool is_coresight_device(void __iomem *= base) * Returns: * * clk - Clock is found and enabled + * NULL - Clock is not needed as it is managed by the AMBA bus driver * ERROR - Clock is found but failed to enable */ static inline struct clk *coresight_get_enable_apb_pclk(struct device *dev) { - struct clk *pclk; + struct clk *pclk =3D NULL; =20 - pclk =3D devm_clk_get_enabled(dev, "apb_pclk"); - if (IS_ERR(pclk)) - pclk =3D devm_clk_get_enabled(dev, "apb"); + if (!dev_is_amba(dev)) { + pclk =3D devm_clk_get_enabled(dev, "apb_pclk"); + if (IS_ERR(pclk)) + pclk =3D devm_clk_get_enabled(dev, "apb"); + } =20 return pclk; } --=20 2.34.1 From nobody Fri Dec 19 21:50:41 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 7F41229DB84 for ; Wed, 23 Apr 2025 15:17:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1745421481; cv=none; b=boV28daM3SmWHSuBKVLXPVNMrhlfB4rwhT2m0f/q8NGJ2BjeydF38GMCYze9ro4HFnLHUNT7TwOTqIRlMjtJXKpEfUsZeo0rJEof8cAbXI+Ejicw4s/Y+gAN5c9UqTrVTpDd53sHn6kiEEGGG7fF4jQ1VNYMwmvWhEOokMd2xs0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1745421481; c=relaxed/simple; bh=nssg2ypVlCTRXaoi5RxI//ct/rSpwoZWuSdg2RQG0d0=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=YrLrkYCEJ6Y2tZPn6PkMFqUXyvC69r19kwNVwJ6NAVzn6XG9AamShy/LHre3XkEASCrcoFBaRREGJBY/eWBAd2TpWVsGk3B28WpgOKokpkpbvPumAa3VHN1b/RL5xrNKY3b8KvIEAiMWAysV5oETrBzpP0Nigw+WF+b8trOJPP0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 0A9B61063; Wed, 23 Apr 2025 08:17:54 -0700 (PDT) Received: from e132581.cambridge.arm.com (e132581.arm.com [10.1.196.87]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id B2DEA3F66E; Wed, 23 Apr 2025 08:17:56 -0700 (PDT) From: Leo Yan To: Suzuki K Poulose , Mike Leach , James Clark , Anshuman Khandual , Alexander Shishkin , Maxime Coquelin , Alexandre Torgue , Greg Kroah-Hartman , coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Cc: Leo Yan Subject: [PATCH v2 7/9] coresight: Consolidate clock enabling Date: Wed, 23 Apr 2025 16:17:24 +0100 Message-Id: <20250423151726.372561-8-leo.yan@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250423151726.372561-1-leo.yan@arm.com> References: <20250423151726.372561-1-leo.yan@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" CoreSight drivers enable pclk and atclk conditionally. For example, pclk is only enabled in the static probe, while atclk is an optional clock that it is enabled for both dynamic and static probes, if it is present. In the current CoreSight drivers, these two clocks are initialized separately. This causes complex and duplicate codes. This patch consolidates clock enabling into a central place. It renames coresight_get_enable_apb_pclk() to coresight_get_enable_clocks() and encapsulates clock initialization logic: - If a clock is initialized successfully, its clock pointer is assigned to the double pointer passed as an argument. - If pclk is skipped for an AMBA device, or if atclk is not found, the corresponding double pointer is set to NULL. The function returns Success (0) to guide callers can proceed with no error. - Otherwise, an error number is returned for failures. The function became complex, move it from the header to the CoreSight core layer and the symbol is exported. Added comments for recording details. CoreSight drivers are refined so that clocks are initialized in one go. As a result, driver data no longer needs to be allocated separately in the static and dynamic probes. Moved the allocation into a low-level function to avoid code duplication. Suggested-by: Suzuki K Poulose Signed-off-by: Leo Yan --- drivers/hwtracing/coresight/coresight-catu.c | 30 ++++++++++--------= ---------- drivers/hwtracing/coresight/coresight-core.c | 45 ++++++++++++++++++= ++++++++++++++++++++++++ drivers/hwtracing/coresight/coresight-cpu-debug.c | 29 +++++++++++-------= --------- drivers/hwtracing/coresight/coresight-ctcu-core.c | 8 ++++---- drivers/hwtracing/coresight/coresight-etm4x-core.c | 11 ++++------- drivers/hwtracing/coresight/coresight-funnel.c | 11 ++++------- drivers/hwtracing/coresight/coresight-replicator.c | 11 ++++------- drivers/hwtracing/coresight/coresight-stm.c | 9 +++------ drivers/hwtracing/coresight/coresight-tmc-core.c | 30 ++++++++++--------= ---------- drivers/hwtracing/coresight/coresight-tpiu.c | 10 ++++------ include/linux/coresight.h | 23 ++----------------= --- 11 files changed, 101 insertions(+), 116 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-catu.c b/drivers/hwtraci= ng/coresight/coresight-catu.c index c0a51ab0312c..c63dee1ac997 100644 --- a/drivers/hwtracing/coresight/coresight-catu.c +++ b/drivers/hwtracing/coresight/coresight-catu.c @@ -508,14 +508,20 @@ static int __catu_probe(struct device *dev, struct re= source *res) { int ret =3D 0; u32 dma_mask; - struct catu_drvdata *drvdata =3D dev_get_drvdata(dev); + struct catu_drvdata *drvdata; struct coresight_desc catu_desc; struct coresight_platform_data *pdata =3D NULL; void __iomem *base; =20 - drvdata->atclk =3D devm_clk_get_optional_enabled(dev, "atclk"); - if (IS_ERR(drvdata->atclk)) - return PTR_ERR(drvdata->atclk); + drvdata =3D devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); + if (!drvdata) + return -ENOMEM; + + dev_set_drvdata(dev, drvdata); + + ret =3D coresight_get_enable_clocks(dev, &drvdata->pclk, &drvdata->atclk); + if (ret) + return ret; =20 catu_desc.name =3D coresight_alloc_device_name(&catu_devs, dev); if (!catu_desc.name) @@ -571,14 +577,8 @@ static int __catu_probe(struct device *dev, struct res= ource *res) =20 static int catu_probe(struct amba_device *adev, const struct amba_id *id) { - struct catu_drvdata *drvdata; int ret; =20 - drvdata =3D devm_kzalloc(&adev->dev, sizeof(*drvdata), GFP_KERNEL); - if (!drvdata) - return -ENOMEM; - - amba_set_drvdata(adev, drvdata); ret =3D __catu_probe(&adev->dev, &adev->res); if (!ret) pm_runtime_put(&adev->dev); @@ -618,22 +618,12 @@ static struct amba_driver catu_driver =3D { static int catu_platform_probe(struct platform_device *pdev) { struct resource *res =3D platform_get_resource(pdev, IORESOURCE_MEM, 0); - struct catu_drvdata *drvdata; int ret =3D 0; =20 - drvdata =3D devm_kzalloc(&pdev->dev, sizeof(*drvdata), GFP_KERNEL); - if (!drvdata) - return -ENOMEM; - - drvdata->pclk =3D coresight_get_enable_apb_pclk(&pdev->dev); - if (IS_ERR(drvdata->pclk)) - return PTR_ERR(drvdata->pclk); - pm_runtime_get_noresume(&pdev->dev); pm_runtime_set_active(&pdev->dev); pm_runtime_enable(&pdev->dev); =20 - dev_set_drvdata(&pdev->dev, drvdata); ret =3D __catu_probe(&pdev->dev, res); pm_runtime_put(&pdev->dev); if (ret) diff --git a/drivers/hwtracing/coresight/coresight-core.c b/drivers/hwtraci= ng/coresight/coresight-core.c index fb43ef6a3b1f..57ecf635fd54 100644 --- a/drivers/hwtracing/coresight/coresight-core.c +++ b/drivers/hwtracing/coresight/coresight-core.c @@ -1645,6 +1645,51 @@ int coresight_etm_get_trace_id(struct coresight_devi= ce *csdev, enum cs_mode mode } EXPORT_SYMBOL_GPL(coresight_etm_get_trace_id); =20 +/* + * Attempt to find and enable programming clock (pclk) and trace clock (at= clk) + * for the given device. + * + * The AMBA bus driver will cover the pclk, to avoid duplicate operations, + * skip to get and enable the pclk for an AMBA device. + * + * atclk is an optional clock, it will be only enabled when it is existed. + * Otherwise, a NULL pointer will be returned to caller. + * + * Returns: '0' on Success; Error code otherwise. + */ +int coresight_get_enable_clocks(struct device *dev, struct clk **pclk, + struct clk **atclk) +{ + WARN_ON(!pclk); + + if (!dev_is_amba(dev)) { + /* + * "apb_pclk" is the default clock name for an Arm Primecell + * peripheral, while "apb" is used only by the CTCU driver. + * + * For easier maintenance, CoreSight drivers should use + * "apb_pclk" as the programming clock name. + */ + *pclk =3D devm_clk_get_enabled(dev, "apb_pclk"); + if (IS_ERR(*pclk)) + *pclk =3D devm_clk_get_enabled(dev, "apb"); + if (IS_ERR(*pclk)) + return PTR_ERR(*pclk); + } else { + /* Don't enable pclk for an AMBA device */ + *pclk =3D NULL; + } + + if (atclk) { + *atclk =3D devm_clk_get_optional_enabled(dev, "atclk"); + if (IS_ERR(*atclk)) + return PTR_ERR(*atclk); + } + + return 0; +} +EXPORT_SYMBOL_GPL(coresight_get_enable_clocks); + MODULE_LICENSE("GPL v2"); MODULE_AUTHOR("Pratik Patel "); MODULE_AUTHOR("Mathieu Poirier "); diff --git a/drivers/hwtracing/coresight/coresight-cpu-debug.c b/drivers/hw= tracing/coresight/coresight-cpu-debug.c index 744b6f9b065e..481ffcbed534 100644 --- a/drivers/hwtracing/coresight/coresight-cpu-debug.c +++ b/drivers/hwtracing/coresight/coresight-cpu-debug.c @@ -562,10 +562,20 @@ static void debug_func_exit(void) =20 static int __debug_probe(struct device *dev, struct resource *res) { - struct debug_drvdata *drvdata =3D dev_get_drvdata(dev); + struct debug_drvdata *drvdata; void __iomem *base; int ret; =20 + drvdata =3D devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); + if (!drvdata) + return -ENOMEM; + + dev_set_drvdata(dev, drvdata); + + ret =3D coresight_get_enable_clocks(dev, &drvdata->pclk, NULL); + if (ret) + return ret; + drvdata->cpu =3D coresight_get_cpu(dev); if (drvdata->cpu < 0) return drvdata->cpu; @@ -625,13 +635,6 @@ static int __debug_probe(struct device *dev, struct re= source *res) =20 static int debug_probe(struct amba_device *adev, const struct amba_id *id) { - struct debug_drvdata *drvdata; - - drvdata =3D devm_kzalloc(&adev->dev, sizeof(*drvdata), GFP_KERNEL); - if (!drvdata) - return -ENOMEM; - - amba_set_drvdata(adev, drvdata); return __debug_probe(&adev->dev, &adev->res); } =20 @@ -690,18 +693,8 @@ static struct amba_driver debug_driver =3D { static int debug_platform_probe(struct platform_device *pdev) { struct resource *res =3D platform_get_resource(pdev, IORESOURCE_MEM, 0); - struct debug_drvdata *drvdata; int ret =3D 0; =20 - drvdata =3D devm_kzalloc(&pdev->dev, sizeof(*drvdata), GFP_KERNEL); - if (!drvdata) - return -ENOMEM; - - drvdata->pclk =3D coresight_get_enable_apb_pclk(&pdev->dev); - if (IS_ERR(drvdata->pclk)) - return PTR_ERR(drvdata->pclk); - - dev_set_drvdata(&pdev->dev, drvdata); pm_runtime_get_noresume(&pdev->dev); pm_runtime_set_active(&pdev->dev); pm_runtime_enable(&pdev->dev); diff --git a/drivers/hwtracing/coresight/coresight-ctcu-core.c b/drivers/hw= tracing/coresight/coresight-ctcu-core.c index de279efe3405..75b5114ef652 100644 --- a/drivers/hwtracing/coresight/coresight-ctcu-core.c +++ b/drivers/hwtracing/coresight/coresight-ctcu-core.c @@ -188,7 +188,7 @@ static int ctcu_probe(struct platform_device *pdev) const struct ctcu_config *cfgs; struct ctcu_drvdata *drvdata; void __iomem *base; - int i; + int i, ret; =20 desc.name =3D coresight_alloc_device_name(&ctcu_devs, dev); if (!desc.name) @@ -207,9 +207,9 @@ static int ctcu_probe(struct platform_device *pdev) if (IS_ERR(base)) return PTR_ERR(base); =20 - drvdata->apb_clk =3D coresight_get_enable_apb_pclk(dev); - if (IS_ERR(drvdata->apb_clk)) - return PTR_ERR(drvdata->apb_clk); + ret =3D coresight_get_enable_clocks(dev, &drvdata->apb_clk, NULL); + if (ret) + return ret; =20 cfgs =3D of_device_get_match_data(dev); if (cfgs) { diff --git a/drivers/hwtracing/coresight/coresight-etm4x-core.c b/drivers/h= wtracing/coresight/coresight-etm4x-core.c index ff4ac4b686c4..ba5d1a015140 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x-core.c +++ b/drivers/hwtracing/coresight/coresight-etm4x-core.c @@ -2145,13 +2145,14 @@ static int etm4_probe(struct device *dev) struct csdev_access access =3D { 0 }; struct etm4_init_arg init_arg =3D { 0 }; struct etm4_init_arg *delayed; + int ret; =20 if (WARN_ON(!drvdata)) return -ENOMEM; =20 - drvdata->atclk =3D devm_clk_get_optional_enabled(dev, "atclk"); - if (IS_ERR(drvdata->atclk)) - return PTR_ERR(drvdata->atclk); + ret =3D coresight_get_enable_clocks(dev, &drvdata->pclk, &drvdata->atclk); + if (ret) + return ret; =20 if (pm_save_enable =3D=3D PARAM_PM_SAVE_FIRMWARE) pm_save_enable =3D coresight_loses_context_with_cpu(dev) ? @@ -2235,10 +2236,6 @@ static int etm4_probe_platform_dev(struct platform_d= evice *pdev) if (!drvdata) return -ENOMEM; =20 - drvdata->pclk =3D coresight_get_enable_apb_pclk(&pdev->dev); - if (IS_ERR(drvdata->pclk)) - return PTR_ERR(drvdata->pclk); - if (res) { drvdata->base =3D devm_ioremap_resource(&pdev->dev, res); if (IS_ERR(drvdata->base)) diff --git a/drivers/hwtracing/coresight/coresight-funnel.c b/drivers/hwtra= cing/coresight/coresight-funnel.c index ec6d3e656548..173fee3aaa6e 100644 --- a/drivers/hwtracing/coresight/coresight-funnel.c +++ b/drivers/hwtracing/coresight/coresight-funnel.c @@ -217,6 +217,7 @@ static int funnel_probe(struct device *dev, struct reso= urce *res) struct coresight_platform_data *pdata =3D NULL; struct funnel_drvdata *drvdata; struct coresight_desc desc =3D { 0 }; + int ret; =20 if (is_of_node(dev_fwnode(dev)) && of_device_is_compatible(dev->of_node, "arm,coresight-funnel")) @@ -230,13 +231,9 @@ static int funnel_probe(struct device *dev, struct res= ource *res) if (!drvdata) return -ENOMEM; =20 - drvdata->atclk =3D devm_clk_get_optional_enabled(dev, "atclk"); - if (IS_ERR(drvdata->atclk)) - return PTR_ERR(drvdata->atclk); - - drvdata->pclk =3D coresight_get_enable_apb_pclk(dev); - if (IS_ERR(drvdata->pclk)) - return PTR_ERR(drvdata->pclk); + ret =3D coresight_get_enable_clocks(dev, &drvdata->pclk, &drvdata->atclk); + if (ret) + return ret; =20 /* * Map the device base for dynamic-funnel, which has been diff --git a/drivers/hwtracing/coresight/coresight-replicator.c b/drivers/h= wtracing/coresight/coresight-replicator.c index 460af0f7b537..7250a2174145 100644 --- a/drivers/hwtracing/coresight/coresight-replicator.c +++ b/drivers/hwtracing/coresight/coresight-replicator.c @@ -223,6 +223,7 @@ static int replicator_probe(struct device *dev, struct = resource *res) struct replicator_drvdata *drvdata; struct coresight_desc desc =3D { 0 }; void __iomem *base; + int ret; =20 if (is_of_node(dev_fwnode(dev)) && of_device_is_compatible(dev->of_node, "arm,coresight-replicator")) @@ -237,13 +238,9 @@ static int replicator_probe(struct device *dev, struct= resource *res) if (!drvdata) return -ENOMEM; =20 - drvdata->atclk =3D devm_clk_get_optional_enabled(dev, "atclk"); - if (IS_ERR(drvdata->atclk)) - return PTR_ERR(drvdata->atclk); - - drvdata->pclk =3D coresight_get_enable_apb_pclk(dev); - if (IS_ERR(drvdata->pclk)) - return PTR_ERR(drvdata->pclk); + ret =3D coresight_get_enable_clocks(dev, &drvdata->pclk, &drvdata->atclk); + if (ret) + return ret; =20 /* * Map the device base for dynamic-replicator, which has been diff --git a/drivers/hwtracing/coresight/coresight-stm.c b/drivers/hwtracin= g/coresight/coresight-stm.c index f13fbab4d7a2..89e90e7f54de 100644 --- a/drivers/hwtracing/coresight/coresight-stm.c +++ b/drivers/hwtracing/coresight/coresight-stm.c @@ -842,13 +842,10 @@ static int __stm_probe(struct device *dev, struct res= ource *res) if (!drvdata) return -ENOMEM; =20 - drvdata->atclk =3D devm_clk_get_optional_enabled(dev, "atclk"); - if (IS_ERR(drvdata->atclk)) - return PTR_ERR(drvdata->atclk); + ret =3D coresight_get_enable_clocks(dev, &drvdata->pclk, &drvdata->atclk); + if (ret) + return ret; =20 - drvdata->pclk =3D coresight_get_enable_apb_pclk(dev); - if (IS_ERR(drvdata->pclk)) - return PTR_ERR(drvdata->pclk); dev_set_drvdata(dev, drvdata); =20 base =3D devm_ioremap_resource(dev, res); diff --git a/drivers/hwtracing/coresight/coresight-tmc-core.c b/drivers/hwt= racing/coresight/coresight-tmc-core.c index 517850d39a0e..abb6294712f1 100644 --- a/drivers/hwtracing/coresight/coresight-tmc-core.c +++ b/drivers/hwtracing/coresight/coresight-tmc-core.c @@ -785,13 +785,19 @@ static int __tmc_probe(struct device *dev, struct res= ource *res) u32 devid; void __iomem *base; struct coresight_platform_data *pdata =3D NULL; - struct tmc_drvdata *drvdata =3D dev_get_drvdata(dev); + struct tmc_drvdata *drvdata; struct coresight_desc desc =3D { 0 }; struct coresight_dev_list *dev_list =3D NULL; =20 - drvdata->atclk =3D devm_clk_get_optional_enabled(dev, "atclk"); - if (IS_ERR(drvdata->atclk)) - return PTR_ERR(drvdata->atclk); + drvdata =3D devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL); + if (!drvdata) + return -ENOMEM; + + dev_set_drvdata(dev, drvdata); + + ret =3D coresight_get_enable_clocks(dev, &drvdata->pclk, &drvdata->atclk); + if (ret) + return ret; =20 ret =3D -ENOMEM; =20 @@ -897,14 +903,8 @@ static int __tmc_probe(struct device *dev, struct reso= urce *res) =20 static int tmc_probe(struct amba_device *adev, const struct amba_id *id) { - struct tmc_drvdata *drvdata; int ret; =20 - drvdata =3D devm_kzalloc(&adev->dev, sizeof(*drvdata), GFP_KERNEL); - if (!drvdata) - return -ENOMEM; - - amba_set_drvdata(adev, drvdata); ret =3D __tmc_probe(&adev->dev, &adev->res); if (!ret) pm_runtime_put(&adev->dev); @@ -981,18 +981,8 @@ static struct amba_driver tmc_driver =3D { static int tmc_platform_probe(struct platform_device *pdev) { struct resource *res =3D platform_get_resource(pdev, IORESOURCE_MEM, 0); - struct tmc_drvdata *drvdata; int ret =3D 0; =20 - drvdata =3D devm_kzalloc(&pdev->dev, sizeof(*drvdata), GFP_KERNEL); - if (!drvdata) - return -ENOMEM; - - drvdata->pclk =3D coresight_get_enable_apb_pclk(&pdev->dev); - if (IS_ERR(drvdata->pclk)) - return PTR_ERR(drvdata->pclk); - - dev_set_drvdata(&pdev->dev, drvdata); pm_runtime_get_noresume(&pdev->dev); pm_runtime_set_active(&pdev->dev); pm_runtime_enable(&pdev->dev); diff --git a/drivers/hwtracing/coresight/coresight-tpiu.c b/drivers/hwtraci= ng/coresight/coresight-tpiu.c index cac1b5bba086..b3d0db0e53b9 100644 --- a/drivers/hwtracing/coresight/coresight-tpiu.c +++ b/drivers/hwtracing/coresight/coresight-tpiu.c @@ -132,6 +132,7 @@ static int __tpiu_probe(struct device *dev, struct reso= urce *res) struct coresight_platform_data *pdata =3D NULL; struct tpiu_drvdata *drvdata; struct coresight_desc desc =3D { 0 }; + int ret; =20 desc.name =3D coresight_alloc_device_name(&tpiu_devs, dev); if (!desc.name) @@ -143,13 +144,10 @@ static int __tpiu_probe(struct device *dev, struct re= source *res) =20 spin_lock_init(&drvdata->spinlock); =20 - drvdata->atclk =3D devm_clk_get_optional_enabled(dev, "atclk"); - if (IS_ERR(drvdata->atclk)) - return PTR_ERR(drvdata->atclk); + ret =3D coresight_get_enable_clocks(dev, &drvdata->pclk, &drvdata->atclk); + if (ret) + return ret; =20 - drvdata->pclk =3D coresight_get_enable_apb_pclk(dev); - if (IS_ERR(drvdata->pclk)) - return PTR_ERR(drvdata->pclk); dev_set_drvdata(dev, drvdata); =20 /* Validity for the resource is already checked by the AMBA core */ diff --git a/include/linux/coresight.h b/include/linux/coresight.h index 26eb4a61b992..2b5f5ba6fe49 100644 --- a/include/linux/coresight.h +++ b/include/linux/coresight.h @@ -470,27 +470,6 @@ static inline bool is_coresight_device(void __iomem *b= ase) return cid =3D=3D CORESIGHT_CID; } =20 -/* - * Attempt to find and enable "APB clock" for the given device - * - * Returns: - * - * clk - Clock is found and enabled - * NULL - Clock is not needed as it is managed by the AMBA bus driver - * ERROR - Clock is found but failed to enable - */ -static inline struct clk *coresight_get_enable_apb_pclk(struct device *dev) -{ - struct clk *pclk =3D NULL; - - if (!dev_is_amba(dev)) { - pclk =3D devm_clk_get_enabled(dev, "apb_pclk"); - if (IS_ERR(pclk)) - pclk =3D devm_clk_get_enabled(dev, "apb"); - } - - return pclk; -} =20 #define CORESIGHT_PIDRn(i) (0xFE0 + ((i) * 4)) =20 @@ -722,4 +701,6 @@ void coresight_remove_driver(struct amba_driver *amba_d= rv, struct platform_driver *pdev_drv); int coresight_etm_get_trace_id(struct coresight_device *csdev, enum cs_mod= e mode, struct coresight_device *sink); +int coresight_get_enable_clocks(struct device *dev, struct clk **pclk, + struct clk **atclk); #endif /* _LINUX_COREISGHT_H */ --=20 2.34.1 From nobody Fri Dec 19 21:50:41 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 751B32918C1 for ; Wed, 23 Apr 2025 15:18:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1745421485; cv=none; b=KGC71iKNsIxpZaA+sGSdhpH+OplJz6O9qqCymMMK8NTKQBy6TNPH0dfSA969wfJAm+vmUW01Frh7mIhrlT2Tfh3c9TK+lTeh8dtL8/jBvTaxujf2izCTFhAORQrHSET9do4P65w6uSJzcMJC+8TlegvaQVMgJ78pE+852qVg6Ms= ARC-Message-Signature: i=1; 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Wed, 23 Apr 2025 08:17:58 -0700 (PDT) From: Leo Yan To: Suzuki K Poulose , Mike Leach , James Clark , Anshuman Khandual , Alexander Shishkin , Maxime Coquelin , Alexandre Torgue , Greg Kroah-Hartman , coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Cc: Leo Yan Subject: [PATCH v2 8/9] coresight: Make clock sequence consistent Date: Wed, 23 Apr 2025 16:17:25 +0100 Message-Id: <20250423151726.372561-9-leo.yan@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250423151726.372561-1-leo.yan@arm.com> References: <20250423151726.372561-1-leo.yan@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Since atclk is enabled after pclk during the probe phase, this commit maintains the same sequence for the runtime resume flow. Signed-off-by: Leo Yan Reviewed-by: Anshuman Khandual --- drivers/hwtracing/coresight/coresight-funnel.c | 6 +++--- drivers/hwtracing/coresight/coresight-replicator.c | 6 +++--- drivers/hwtracing/coresight/coresight-stm.c | 6 +++--- drivers/hwtracing/coresight/coresight-tpiu.c | 6 +++--- 4 files changed, 12 insertions(+), 12 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-funnel.c b/drivers/hwtra= cing/coresight/coresight-funnel.c index 173fee3aaa6e..62e5125c37ad 100644 --- a/drivers/hwtracing/coresight/coresight-funnel.c +++ b/drivers/hwtracing/coresight/coresight-funnel.c @@ -296,11 +296,11 @@ static int funnel_runtime_resume(struct device *dev) { struct funnel_drvdata *drvdata =3D dev_get_drvdata(dev); =20 - if (drvdata && !IS_ERR(drvdata->atclk)) - clk_prepare_enable(drvdata->atclk); - if (drvdata && !IS_ERR_OR_NULL(drvdata->pclk)) clk_prepare_enable(drvdata->pclk); + + if (drvdata && !IS_ERR(drvdata->atclk)) + clk_prepare_enable(drvdata->atclk); return 0; } #endif diff --git a/drivers/hwtracing/coresight/coresight-replicator.c b/drivers/h= wtracing/coresight/coresight-replicator.c index 7250a2174145..56b03e6d8336 100644 --- a/drivers/hwtracing/coresight/coresight-replicator.c +++ b/drivers/hwtracing/coresight/coresight-replicator.c @@ -334,11 +334,11 @@ static int replicator_runtime_resume(struct device *d= ev) { struct replicator_drvdata *drvdata =3D dev_get_drvdata(dev); =20 - if (drvdata && !IS_ERR(drvdata->atclk)) - clk_prepare_enable(drvdata->atclk); - if (drvdata && !IS_ERR_OR_NULL(drvdata->pclk)) clk_prepare_enable(drvdata->pclk); + + if (drvdata && !IS_ERR(drvdata->atclk)) + clk_prepare_enable(drvdata->atclk); return 0; } #endif diff --git a/drivers/hwtracing/coresight/coresight-stm.c b/drivers/hwtracin= g/coresight/coresight-stm.c index 89e90e7f54de..f17986edac00 100644 --- a/drivers/hwtracing/coresight/coresight-stm.c +++ b/drivers/hwtracing/coresight/coresight-stm.c @@ -969,11 +969,11 @@ static int stm_runtime_resume(struct device *dev) { struct stm_drvdata *drvdata =3D dev_get_drvdata(dev); =20 - if (drvdata && !IS_ERR(drvdata->atclk)) - clk_prepare_enable(drvdata->atclk); - if (drvdata && !IS_ERR_OR_NULL(drvdata->pclk)) clk_prepare_enable(drvdata->pclk); + + if (drvdata && !IS_ERR(drvdata->atclk)) + clk_prepare_enable(drvdata->atclk); return 0; } #endif diff --git a/drivers/hwtracing/coresight/coresight-tpiu.c b/drivers/hwtraci= ng/coresight/coresight-tpiu.c index b3d0db0e53b9..4701b34778bd 100644 --- a/drivers/hwtracing/coresight/coresight-tpiu.c +++ b/drivers/hwtracing/coresight/coresight-tpiu.c @@ -218,11 +218,11 @@ static int tpiu_runtime_resume(struct device *dev) { struct tpiu_drvdata *drvdata =3D dev_get_drvdata(dev); =20 - if (drvdata && !IS_ERR(drvdata->atclk)) - clk_prepare_enable(drvdata->atclk); - if (drvdata && !IS_ERR_OR_NULL(drvdata->pclk)) clk_prepare_enable(drvdata->pclk); + + if (drvdata && !IS_ERR(drvdata->atclk)) + clk_prepare_enable(drvdata->atclk); return 0; } #endif --=20 2.34.1 From nobody Fri Dec 19 21:50:41 2025 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id C821D28DEF4 for ; Wed, 23 Apr 2025 15:18:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1745421485; cv=none; b=rXzzsqPqaurK8AfyYoxROmJZuqyp1a0xEVDOQye+iYrwL45F11Ki1KUJTjSlhQ72ZqIDmP2XTh3uAu0rp0sqIVRz132jH8MJlAf20NC6EY79ZWffo6bOfCJducisQRy/12PA7mFTcMCscFylqGrXAPN+nJlaIDQZSAI4becY5n8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1745421485; c=relaxed/simple; bh=L+rD1RA9qs0mxczLZFLOu8j+uSfWmGAAg2eBiGl0yfE=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=cZ77sg/vLZ0K3EfcT8rFlnfpBzTqzmQiZPwn3lmt8arrhHWz7GB8stmr/gCVCGMv4lxp36YyNzAjH3T0/yvgH5C3F8guc9j1FX6IwKc/H53tIY/j/pZlzfUPi6KlNheYXVzklTv8Lfb5MkheGcJ79FTqDRoOVHBBqblQ00QauvY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 59CB21063; Wed, 23 Apr 2025 08:17:58 -0700 (PDT) Received: from e132581.cambridge.arm.com (e132581.arm.com [10.1.196.87]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 2D0553F66E; Wed, 23 Apr 2025 08:18:01 -0700 (PDT) From: Leo Yan To: Suzuki K Poulose , Mike Leach , James Clark , Anshuman Khandual , Alexander Shishkin , Maxime Coquelin , Alexandre Torgue , Greg Kroah-Hartman , coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Cc: Leo Yan Subject: [PATCH v2 9/9] coresight: Refactor runtime PM Date: Wed, 23 Apr 2025 16:17:26 +0100 Message-Id: <20250423151726.372561-10-leo.yan@arm.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250423151726.372561-1-leo.yan@arm.com> References: <20250423151726.372561-1-leo.yan@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The validation for driver data pointers and clock pointers are redundant in the runtime PM callbacks. After a driver's probing, its driver data and clocks have been initialized successfully, this ensures it is safe to access driver data and clocks in the runtime PM callbacks. A corner case is a clock pointer is NULL, in this case, the clock core layer can handle it properly. So remove these redundant checking. In runtime resume, respect values returned from clock function and add error handling. Signed-off-by: Leo Yan --- drivers/hwtracing/coresight/coresight-cpu-debug.c | 8 +++----- drivers/hwtracing/coresight/coresight-ctcu-core.c | 8 ++------ drivers/hwtracing/coresight/coresight-etb10.c | 8 ++------ drivers/hwtracing/coresight/coresight-etm3x-core.c | 8 ++------ drivers/hwtracing/coresight/coresight-funnel.c | 21 +++++++++++-------= --- drivers/hwtracing/coresight/coresight-replicator.c | 20 +++++++++++-------= -- drivers/hwtracing/coresight/coresight-stm.c | 20 +++++++++++-------= -- drivers/hwtracing/coresight/coresight-tpiu.c | 20 +++++++++++-------= -- 8 files changed, 53 insertions(+), 60 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-cpu-debug.c b/drivers/hw= tracing/coresight/coresight-cpu-debug.c index 481ffcbed534..dff663ac7805 100644 --- a/drivers/hwtracing/coresight/coresight-cpu-debug.c +++ b/drivers/hwtracing/coresight/coresight-cpu-debug.c @@ -731,8 +731,8 @@ static int debug_runtime_suspend(struct device *dev) { struct debug_drvdata *drvdata =3D dev_get_drvdata(dev); =20 - if (drvdata && !IS_ERR_OR_NULL(drvdata->pclk)) - clk_disable_unprepare(drvdata->pclk); + clk_disable_unprepare(drvdata->pclk); + return 0; } =20 @@ -740,9 +740,7 @@ static int debug_runtime_resume(struct device *dev) { struct debug_drvdata *drvdata =3D dev_get_drvdata(dev); =20 - if (drvdata && !IS_ERR_OR_NULL(drvdata->pclk)) - clk_prepare_enable(drvdata->pclk); - return 0; + return clk_prepare_enable(drvdata->pclk); } #endif =20 diff --git a/drivers/hwtracing/coresight/coresight-ctcu-core.c b/drivers/hw= tracing/coresight/coresight-ctcu-core.c index 75b5114ef652..c586495e9a08 100644 --- a/drivers/hwtracing/coresight/coresight-ctcu-core.c +++ b/drivers/hwtracing/coresight/coresight-ctcu-core.c @@ -278,8 +278,7 @@ static int ctcu_runtime_suspend(struct device *dev) { struct ctcu_drvdata *drvdata =3D dev_get_drvdata(dev); =20 - if (drvdata && !IS_ERR_OR_NULL(drvdata->apb_clk)) - clk_disable_unprepare(drvdata->apb_clk); + clk_disable_unprepare(drvdata->apb_clk); =20 return 0; } @@ -288,10 +287,7 @@ static int ctcu_runtime_resume(struct device *dev) { struct ctcu_drvdata *drvdata =3D dev_get_drvdata(dev); =20 - if (drvdata && !IS_ERR_OR_NULL(drvdata->apb_clk)) - clk_prepare_enable(drvdata->apb_clk); - - return 0; + return clk_prepare_enable(drvdata->apb_clk); } #endif =20 diff --git a/drivers/hwtracing/coresight/coresight-etb10.c b/drivers/hwtrac= ing/coresight/coresight-etb10.c index 45c2f8f50a3f..3f3b0eb48fdb 100644 --- a/drivers/hwtracing/coresight/coresight-etb10.c +++ b/drivers/hwtracing/coresight/coresight-etb10.c @@ -807,8 +807,7 @@ static int etb_runtime_suspend(struct device *dev) { struct etb_drvdata *drvdata =3D dev_get_drvdata(dev); =20 - if (drvdata && !IS_ERR(drvdata->atclk)) - clk_disable_unprepare(drvdata->atclk); + clk_disable_unprepare(drvdata->atclk); =20 return 0; } @@ -817,10 +816,7 @@ static int etb_runtime_resume(struct device *dev) { struct etb_drvdata *drvdata =3D dev_get_drvdata(dev); =20 - if (drvdata && !IS_ERR(drvdata->atclk)) - clk_prepare_enable(drvdata->atclk); - - return 0; + return clk_prepare_enable(drvdata->atclk); } #endif =20 diff --git a/drivers/hwtracing/coresight/coresight-etm3x-core.c b/drivers/h= wtracing/coresight/coresight-etm3x-core.c index adbb134f80e6..615ff743eef0 100644 --- a/drivers/hwtracing/coresight/coresight-etm3x-core.c +++ b/drivers/hwtracing/coresight/coresight-etm3x-core.c @@ -925,8 +925,7 @@ static int etm_runtime_suspend(struct device *dev) { struct etm_drvdata *drvdata =3D dev_get_drvdata(dev); =20 - if (drvdata && !IS_ERR(drvdata->atclk)) - clk_disable_unprepare(drvdata->atclk); + clk_disable_unprepare(drvdata->atclk); =20 return 0; } @@ -935,10 +934,7 @@ static int etm_runtime_resume(struct device *dev) { struct etm_drvdata *drvdata =3D dev_get_drvdata(dev); =20 - if (drvdata && !IS_ERR(drvdata->atclk)) - clk_prepare_enable(drvdata->atclk); - - return 0; + return clk_prepare_enable(drvdata->atclk); } #endif =20 diff --git a/drivers/hwtracing/coresight/coresight-funnel.c b/drivers/hwtra= cing/coresight/coresight-funnel.c index 62e5125c37ad..6494a3b5d18e 100644 --- a/drivers/hwtracing/coresight/coresight-funnel.c +++ b/drivers/hwtracing/coresight/coresight-funnel.c @@ -283,11 +283,8 @@ static int funnel_runtime_suspend(struct device *dev) { struct funnel_drvdata *drvdata =3D dev_get_drvdata(dev); =20 - if (drvdata && !IS_ERR(drvdata->atclk)) - clk_disable_unprepare(drvdata->atclk); - - if (drvdata && !IS_ERR_OR_NULL(drvdata->pclk)) - clk_disable_unprepare(drvdata->pclk); + clk_disable_unprepare(drvdata->atclk); + clk_disable_unprepare(drvdata->pclk); =20 return 0; } @@ -295,13 +292,17 @@ static int funnel_runtime_suspend(struct device *dev) static int funnel_runtime_resume(struct device *dev) { struct funnel_drvdata *drvdata =3D dev_get_drvdata(dev); + int ret; + + ret =3D clk_prepare_enable(drvdata->pclk); + if (ret) + return ret; =20 - if (drvdata && !IS_ERR_OR_NULL(drvdata->pclk)) - clk_prepare_enable(drvdata->pclk); + ret =3D clk_prepare_enable(drvdata->atclk); + if (ret) + clk_disable_unprepare(drvdata->pclk); =20 - if (drvdata && !IS_ERR(drvdata->atclk)) - clk_prepare_enable(drvdata->atclk); - return 0; + return ret; } #endif =20 diff --git a/drivers/hwtracing/coresight/coresight-replicator.c b/drivers/h= wtracing/coresight/coresight-replicator.c index 56b03e6d8336..8595dc104795 100644 --- a/drivers/hwtracing/coresight/coresight-replicator.c +++ b/drivers/hwtracing/coresight/coresight-replicator.c @@ -322,24 +322,26 @@ static int replicator_runtime_suspend(struct device *= dev) { struct replicator_drvdata *drvdata =3D dev_get_drvdata(dev); =20 - if (drvdata && !IS_ERR(drvdata->atclk)) - clk_disable_unprepare(drvdata->atclk); + clk_disable_unprepare(drvdata->atclk); + clk_disable_unprepare(drvdata->pclk); =20 - if (drvdata && !IS_ERR_OR_NULL(drvdata->pclk)) - clk_disable_unprepare(drvdata->pclk); return 0; } =20 static int replicator_runtime_resume(struct device *dev) { struct replicator_drvdata *drvdata =3D dev_get_drvdata(dev); + int ret; =20 - if (drvdata && !IS_ERR_OR_NULL(drvdata->pclk)) - clk_prepare_enable(drvdata->pclk); + ret =3D clk_prepare_enable(drvdata->pclk); + if (ret) + return ret; =20 - if (drvdata && !IS_ERR(drvdata->atclk)) - clk_prepare_enable(drvdata->atclk); - return 0; + ret =3D clk_prepare_enable(drvdata->atclk); + if (ret) + clk_disable_unprepare(drvdata->pclk); + + return ret; } #endif =20 diff --git a/drivers/hwtracing/coresight/coresight-stm.c b/drivers/hwtracin= g/coresight/coresight-stm.c index f17986edac00..f859ab932d22 100644 --- a/drivers/hwtracing/coresight/coresight-stm.c +++ b/drivers/hwtracing/coresight/coresight-stm.c @@ -957,24 +957,26 @@ static int stm_runtime_suspend(struct device *dev) { struct stm_drvdata *drvdata =3D dev_get_drvdata(dev); =20 - if (drvdata && !IS_ERR(drvdata->atclk)) - clk_disable_unprepare(drvdata->atclk); + clk_disable_unprepare(drvdata->atclk); + clk_disable_unprepare(drvdata->pclk); =20 - if (drvdata && !IS_ERR_OR_NULL(drvdata->pclk)) - clk_disable_unprepare(drvdata->pclk); return 0; } =20 static int stm_runtime_resume(struct device *dev) { struct stm_drvdata *drvdata =3D dev_get_drvdata(dev); + int ret; =20 - if (drvdata && !IS_ERR_OR_NULL(drvdata->pclk)) - clk_prepare_enable(drvdata->pclk); + ret =3D clk_prepare_enable(drvdata->pclk); + if (ret) + return ret; =20 - if (drvdata && !IS_ERR(drvdata->atclk)) - clk_prepare_enable(drvdata->atclk); - return 0; + ret =3D clk_prepare_enable(drvdata->atclk); + if (ret) + clk_disable_unprepare(drvdata->pclk); + + return ret; } #endif =20 diff --git a/drivers/hwtracing/coresight/coresight-tpiu.c b/drivers/hwtraci= ng/coresight/coresight-tpiu.c index 4701b34778bd..a68ed6b97bf7 100644 --- a/drivers/hwtracing/coresight/coresight-tpiu.c +++ b/drivers/hwtracing/coresight/coresight-tpiu.c @@ -206,24 +206,26 @@ static int tpiu_runtime_suspend(struct device *dev) { struct tpiu_drvdata *drvdata =3D dev_get_drvdata(dev); =20 - if (drvdata && !IS_ERR(drvdata->atclk)) - clk_disable_unprepare(drvdata->atclk); + clk_disable_unprepare(drvdata->atclk); + clk_disable_unprepare(drvdata->pclk); =20 - if (drvdata && !IS_ERR_OR_NULL(drvdata->pclk)) - clk_disable_unprepare(drvdata->pclk); return 0; } =20 static int tpiu_runtime_resume(struct device *dev) { struct tpiu_drvdata *drvdata =3D dev_get_drvdata(dev); + int ret; =20 - if (drvdata && !IS_ERR_OR_NULL(drvdata->pclk)) - clk_prepare_enable(drvdata->pclk); + ret =3D clk_prepare_enable(drvdata->pclk); + if (ret) + return ret; =20 - if (drvdata && !IS_ERR(drvdata->atclk)) - clk_prepare_enable(drvdata->atclk); - return 0; + ret =3D clk_prepare_enable(drvdata->atclk); + if (ret) + clk_disable_unprepare(drvdata->pclk); + + return ret; } #endif =20 --=20 2.34.1