From nobody Tue Feb 10 05:09:55 2026 Received: from relmlie6.idc.renesas.com (relmlor2.renesas.com [210.160.252.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id D5E381E0DDC; Tue, 22 Apr 2025 17:39:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1745343599; cv=none; b=FuSolycJllFZUk6uxrCIXnn7g80OUOA2zAKrOON22dPnoeq0A++uy2gu1edF56wbStvX9YER96DUp0xQbE+JDXolTlXHn73hMTwGKURrXZD3X3G3tLqRbcw9dubmw+s9dkyT675Ufc82s1VJunoRJ0AoijXl+oenPKgVaXk/ngk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1745343599; c=relaxed/simple; bh=hM5uRm2ZzSyafoF0r32/Knq4faTcoF4fBnWkJJ6N15M=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=FLeiwYmQG5atY42EwecPbzzwaXWUgosKQG2g4ln4pgISWlrfVSZTf1nxulncKZUv0i52424xhZl9IAFY01TZ3L/zhBrydQeRaN0DVxCl3WKvE5OLfHqqeK1jr6KJSg5yc6djeZDUOCICRLYLK1h1g/yK7aoDE+uD153aNPC3iPQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com; spf=pass smtp.mailfrom=renesas.com; arc=none smtp.client-ip=210.160.252.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=renesas.com X-CSE-ConnectionGUID: LR4Od9yIRm6E4O261/rJbw== X-CSE-MsgGUID: DOQZYdAHSmS7WYuPTn3GlQ== Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie6.idc.renesas.com with ESMTP; 23 Apr 2025 02:39:55 +0900 Received: from mulinux.home (unknown [10.226.92.16]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 0BC1A4043788; Wed, 23 Apr 2025 02:39:50 +0900 (JST) From: Fabrizio Castro To: Vinod Koul , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Magnus Damm Cc: Fabrizio Castro , Biju Das , dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org, Lad Prabhakar , Conor Dooley Subject: [PATCH v6 2/6] dt-bindings: dma: rz-dmac: Document RZ/V2H(P) family of SoCs Date: Tue, 22 Apr 2025 18:39:33 +0100 Message-Id: <20250422173937.3722875-3-fabrizio.castro.jz@renesas.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250422173937.3722875-1-fabrizio.castro.jz@renesas.com> References: <20250422173937.3722875-1-fabrizio.castro.jz@renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Document the Renesas RZ/V2H(P) family of SoCs DMAC block. The Renesas RZ/V2H(P) DMAC is very similar to the one found on the Renesas RZ/G2L family of SoCs, but there are some differences: * It only uses one register area * It only uses one clock * It only uses one reset * Instead of using MID/IRD it uses REQ No * It is connected to the Interrupt Control Unit (ICU) Signed-off-by: Fabrizio Castro Acked-by: Conor Dooley Reviewed-by: Lad Prabhakar Reviewed-by: Geert Uytterhoeven Reviewed-by: Rob Herring (Arm) --- v5->v6: * Reworked the description of `#dma-cells`. * Reworked `renesas,icu` related descriptions. * Added `reg:`->`minItems: 2` for `renesas,r7s72100-dmac`. * Since the structure of the document remains the same, I have kept the tags I have received. Please let me know if that's not okay. v4->v5: * Removed ACK No from the specification of the dma cell. * I have kept the tags received as this is a minor change and the structure remains the same as v4. Please let me know if this is not okay. v3->v4: * No change. v2->v3: * No change. v1->v2: * Removed RZ/V2H DMAC example. * Improved the readability of the `if` statement. --- .../bindings/dma/renesas,rz-dmac.yaml | 101 ++++++++++++++---- 1 file changed, 82 insertions(+), 19 deletions(-) diff --git a/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml b/D= ocumentation/devicetree/bindings/dma/renesas,rz-dmac.yaml index 82de3b927479..6cdf6658b672 100644 --- a/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml +++ b/Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml @@ -11,19 +11,23 @@ maintainers: =20 properties: compatible: - items: - - enum: - - renesas,r7s72100-dmac # RZ/A1H - - renesas,r9a07g043-dmac # RZ/G2UL and RZ/Five - - renesas,r9a07g044-dmac # RZ/G2{L,LC} - - renesas,r9a07g054-dmac # RZ/V2L - - renesas,r9a08g045-dmac # RZ/G3S - - const: renesas,rz-dmac + oneOf: + - items: + - enum: + - renesas,r7s72100-dmac # RZ/A1H + - renesas,r9a07g043-dmac # RZ/G2UL and RZ/Five + - renesas,r9a07g044-dmac # RZ/G2{L,LC} + - renesas,r9a07g054-dmac # RZ/V2L + - renesas,r9a08g045-dmac # RZ/G3S + - const: renesas,rz-dmac + + - const: renesas,r9a09g057-dmac # RZ/V2H(P) =20 reg: items: - description: Control and channel register block - description: DMA extended resource selector block + minItems: 1 =20 interrupts: maxItems: 17 @@ -52,6 +56,7 @@ properties: items: - description: DMA main clock - description: DMA register access clock + minItems: 1 =20 clock-names: items: @@ -61,10 +66,10 @@ properties: '#dma-cells': const: 1 description: - The cell specifies the encoded MID/RID values of the DMAC port - connected to the DMA client and the slave channel configuration - parameters. - bits[0:9] - Specifies MID/RID value + The cell specifies the encoded MID/RID or the REQ No values of + the DMAC port connected to the DMA client and the slave channel + configuration parameters. + bits[0:9] - Specifies the MID/RID or the REQ No value bit[10] - Specifies DMA request high enable (HIEN) bit[11] - Specifies DMA request detection type (LVL) bits[12:14] - Specifies DMAACK output mode (AM) @@ -80,12 +85,26 @@ properties: items: - description: Reset for DMA ARESETN reset terminal - description: Reset for DMA RST_ASYNC reset terminal + minItems: 1 =20 reset-names: items: - const: arst - const: rst_async =20 + renesas,icu: + description: + It must contain the phandle to the ICU, and the index of the DMAC as= seen + from the ICU (e.g. parameter k from register ICU_DMkSELy). + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + - items: + - description: phandle to the ICU node. + - description: + The number of the DMAC as seen from the ICU, i.e. parameter = k from + register ICU_DMkSELy. This may differ from the actual DMAC i= nstance + number. + required: - compatible - reg @@ -98,13 +117,25 @@ allOf: - $ref: dma-controller.yaml# =20 - if: - not: - properties: - compatible: - contains: - enum: - - renesas,r7s72100-dmac + properties: + compatible: + contains: + enum: + - renesas,r9a07g043-dmac + - renesas,r9a07g044-dmac + - renesas,r9a07g054-dmac + - renesas,r9a08g045-dmac then: + properties: + reg: + minItems: 2 + clocks: + minItems: 2 + resets: + minItems: 2 + + renesas,icu: false + required: - clocks - clock-names @@ -112,13 +143,45 @@ allOf: - resets - reset-names =20 - else: + - if: + properties: + compatible: + contains: + const: renesas,r7s72100-dmac + then: properties: + reg: + minItems: 2 + clocks: false clock-names: false power-domains: false resets: false reset-names: false + renesas,icu: false + + - if: + properties: + compatible: + contains: + const: renesas,r9a09g057-dmac + then: + properties: + reg: + maxItems: 1 + clocks: + maxItems: 1 + resets: + maxItems: 1 + + clock-names: false + reset-names: false + + required: + - clocks + - power-domains + - renesas,icu + - resets =20 additionalProperties: false =20 --=20 2.34.1