From nobody Thu Dec 18 00:23:15 2025 Received: from mxout3.routing.net (mxout3.routing.net [134.0.28.8]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DD6E91F130A; Tue, 22 Apr 2025 13:24:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=134.0.28.8 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1745328301; cv=none; b=Ud4WZ24WahWvQt5L48Z0Q1GaQq7WdDU7XfVuglMGg0sAYg68+J0KcJWAPcxh4IAial+M56aC0x9zre+Pxk+ftV79daTbpBH81rP6Mf0A2wVRBX07dZEI1J6ruhDtWEJQs6mNPmZ9/SuZnVQzlRMEdV+Mf2E5sQT+oPmMNUdo5aY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1745328301; c=relaxed/simple; bh=u7PWWpWnN+JCQGAkrXpy7x5BE2/HL8HUyp74PolVQSE=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=RGo62d6rZOCRFfjTnE5OiUz2neZnAvhvnT09Y/XfQay761UcZLC476zLxyfC+IDqOQn6QM6saB1hC2K8pmrzmVbSpmKCb2zzmqUBYgQd1EtLsf6NJDCLkNVEKVA6TgTqNAjd8UWHUwWJN5zacmP6Wo3zV37gj1ZW7jcSjuelRXg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=fw-web.de; spf=pass smtp.mailfrom=fw-web.de; dkim=pass (1024-bit key) header.d=mailerdienst.de header.i=@mailerdienst.de header.b=dHL7NjiA; arc=none smtp.client-ip=134.0.28.8 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=fw-web.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=fw-web.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mailerdienst.de header.i=@mailerdienst.de header.b="dHL7NjiA" Received: from mxbox4.masterlogin.de (unknown [192.168.10.79]) by mxout3.routing.net (Postfix) with ESMTP id 2BF2561533; Tue, 22 Apr 2025 13:24:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailerdienst.de; s=20200217; t=1745328291; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=zRgDtNzjWlmBlKxgWUbFr0kAVAlRPqY5m6T9fKKPW3o=; b=dHL7NjiA8amuAFu6yBPSJyGRV2Xc4f5iapRfCA6kBrRytrXMqaXIZ5FEDM+JI9AZ1HQbXW KKbn+vRVMb4kf7g6PCIL/uPQr2uexGgzeZDsCN0VmPi73soRHtIj0t2H/hZBJKHxgBks3l yFhOGuZ4jpnPz7Y3OsBKhZIpCofp/z0= Received: from frank-u24.. (fttx-pool-217.61.156.53.bambit.de [217.61.156.53]) by mxbox4.masterlogin.de (Postfix) with ESMTPSA id 5273180318; Tue, 22 Apr 2025 13:24:50 +0000 (UTC) From: Frank Wunderlich To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lee Jones , Chunfeng Yun , Vinod Koul , Kishon Vijay Abraham I , Matthias Brugger , AngeloGioacchino Del Regno Cc: Frank Wunderlich , =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= , Daniel Golle , Sean Wang , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-phy@lists.infradead.org Subject: [PATCH v4 1/8] dt-bindings: arm: mediatek: add bpi-r4 2g5 phy variant Date: Tue, 22 Apr 2025 15:24:24 +0200 Message-ID: <20250422132438.15735-2-linux@fw-web.de> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250422132438.15735-1-linux@fw-web.de> References: <20250422132438.15735-1-linux@fw-web.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Mail-ID: 70918b30-8a60-4b29-a71b-ede4dba2605d Content-Type: text/plain; charset="utf-8" From: Frank Wunderlich Add new compatible for Bananapi R4 with 2.5G phy. Base board is compatible with existing BPI-R4 only 1 SFP is replaced by RJ45 port and use mt7988 internal phy. Signed-off-by: Frank Wunderlich Acked-by: Krzysztof Kozlowski Reviewed-by: AngeloGioacchino Del Regno --- v3: - new patch adding compatible for 2.5g variant --- Documentation/devicetree/bindings/arm/mediatek.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/mediatek.yaml b/Document= ation/devicetree/bindings/arm/mediatek.yaml index 108ae5e0185d..3aed03df0e3c 100644 --- a/Documentation/devicetree/bindings/arm/mediatek.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek.yaml @@ -104,6 +104,10 @@ properties: - enum: - bananapi,bpi-r4 - const: mediatek,mt7988a + - items: + - const: bananapi,bpi-r4-2g5 + - const: bananapi,bpi-r4 + - const: mediatek,mt7988a - items: - enum: - mediatek,mt8127-moose --=20 2.43.0 From nobody Thu Dec 18 00:23:15 2025 Received: from mxout1.routing.net (mxout1.routing.net [134.0.28.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7E54D281523; Tue, 22 Apr 2025 13:24:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=134.0.28.11 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1745328301; cv=none; b=rUgnUfAWPFYgytRtpBcukRXDs42dMkOCsnzL4i4AyAJwbFbvZTDRoZErNLPqD3LOahpAeoNShJSadH4MNbW8dAcsR/gfpAJSP3NyHCoTciiLr7fg5zlhwylsymSd+rJAnE6o+Tp2src/yE7FAlNxji5I+/2Q/N+vmq3Me2homOE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1745328301; c=relaxed/simple; bh=Fksi0DzIR+6Tqsg1PKic5X3XWZi6fPZK1y8ZzTPniSo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=EbU8jJgFg6IxS6FjnYQQYGcdMx5VpDOKXYnURJ6/hDDgt7MVQMhyva0uIciq41snDYcO+l6iGUpQ+B28lOaDp/rfQUwns2Tcssa1cZrMo9kJzpHUcx5n98+TCKfbQESapYUCZl0K6rEUkkjS4ZrFLMs8wlCmNQSYsqWgUjfGFgI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=fw-web.de; spf=pass smtp.mailfrom=fw-web.de; dkim=pass (1024-bit key) header.d=mailerdienst.de header.i=@mailerdienst.de header.b=ioO2XjTD; arc=none smtp.client-ip=134.0.28.11 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=fw-web.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=fw-web.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mailerdienst.de header.i=@mailerdienst.de header.b="ioO2XjTD" Received: from mxbox4.masterlogin.de (unknown [192.168.10.79]) by mxout1.routing.net (Postfix) with ESMTP id 1CE1C4052B; Tue, 22 Apr 2025 13:24:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailerdienst.de; s=20200217; t=1745328292; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=dxtnu9nk9uWFvcjhRZAgorwDVqNfAv/IPbc4BTnKypo=; b=ioO2XjTDhrYogZQZDK60063Ef22MfLN8GeivPCiA41Jv3w3SMR8j6a/CZUKFaw+Kx1MStL LxHSYxWTU1FkYucGQbFNUAV5w+Ny2dOGQ3y5w5MDFZkLbv249x7GV+8h3ZR8AQloICuDDt Q8F0ft/fjqU3HWNQhJ72cbKe5jCyhDQ= Received: from frank-u24.. (fttx-pool-217.61.156.53.bambit.de [217.61.156.53]) by mxbox4.masterlogin.de (Postfix) with ESMTPSA id 1D394801F5; Tue, 22 Apr 2025 13:24:51 +0000 (UTC) From: Frank Wunderlich To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lee Jones , Chunfeng Yun , Vinod Koul , Kishon Vijay Abraham I , Matthias Brugger , AngeloGioacchino Del Regno Cc: Frank Wunderlich , =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= , Daniel Golle , Sean Wang , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-phy@lists.infradead.org, Krzysztof Kozlowski Subject: [PATCH v4 2/8] arm64: dts: mediatek: mt7988a-bpi-r4: allow hw variants of bpi-r4 Date: Tue, 22 Apr 2025 15:24:25 +0200 Message-ID: <20250422132438.15735-3-linux@fw-web.de> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250422132438.15735-1-linux@fw-web.de> References: <20250422132438.15735-1-linux@fw-web.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Mail-ID: ae30c753-d289-46c3-b7e1-4d92f1d00019 Content-Type: text/plain; charset="utf-8" From: Frank Wunderlich Sinovoip has released other variants of Bananapi-R4 board. The known changes affecting only the LAN SFP+ slot which is replaced by a 2.5G phy with optional PoE. Just move the common parts to a new dtsi and keep differences (only i2c for lan-sfp) in dts. Signed-off-by: Frank Wunderlich Acked-by: Krzysztof Kozlowski Reviewed-by: AngeloGioacchino Del Regno --- v3: - move compatible to dts - added own compatible for 2g5 variant - update information in board model v2: - added basic dts for 2g5 variant - moved i2c used for sfp-lan to board dts --- arch/arm64/boot/dts/mediatek/Makefile | 2 + .../mediatek/mt7988a-bananapi-bpi-r4-2g5.dts | 11 + .../dts/mediatek/mt7988a-bananapi-bpi-r4.dts | 400 +----------------- .../dts/mediatek/mt7988a-bananapi-bpi-r4.dtsi | 399 +++++++++++++++++ 4 files changed, 417 insertions(+), 395 deletions(-) create mode 100644 arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4-2g= 5.dts create mode 100644 arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dt= si diff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/me= diatek/Makefile index 58484e830063..a1ebc9aa4ba6 100644 --- a/arch/arm64/boot/dts/mediatek/Makefile +++ b/arch/arm64/boot/dts/mediatek/Makefile @@ -22,6 +22,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt7986a-bananapi-bpi-r3-= sd.dtbo dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt7986a-rfb.dtb dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt7986b-rfb.dtb dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt7988a-bananapi-bpi-r4.dtb +dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt7988a-bananapi-bpi-r4-2g5.dtb dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt7988a-bananapi-bpi-r4-emmc.dtbo dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt7988a-bananapi-bpi-r4-sd.dtbo dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8167-pumpkin.dtb @@ -107,4 +108,5 @@ dtb-$(CONFIG_ARCH_MEDIATEK) +=3D mt8516-pumpkin.dtb DTC_FLAGS_mt7986a-bananapi-bpi-r3 :=3D -@ DTC_FLAGS_mt7986a-bananapi-bpi-r3-mini :=3D -@ DTC_FLAGS_mt7988a-bananapi-bpi-r4 :=3D -@ +DTC_FLAGS_mt7988a-bananapi-bpi-r4-2g5 :=3D -@ DTC_FLAGS_mt8395-radxa-nio-12l :=3D -@ diff --git a/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4-2g5.dts b= /arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4-2g5.dts new file mode 100644 index 000000000000..53de9c113f60 --- /dev/null +++ b/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4-2g5.dts @@ -0,0 +1,11 @@ +// SPDX-License-Identifier: GPL-2.0-only OR MIT + +/dts-v1/; + +#include "mt7988a-bananapi-bpi-r4.dtsi" + +/ { + compatible =3D "bananapi,bpi-r4-2g5", "bananapi,bpi-r4", "mediatek,mt7988= a"; + model =3D "Banana Pi BPI-R4 (1x SFP+, 1x 2.5GbE)"; + chassis-type =3D "embedded"; +}; diff --git a/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dts b/arc= h/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dts index 6623112c24c7..36bd1ef2efab 100644 --- a/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dts +++ b/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dts @@ -2,408 +2,18 @@ =20 /dts-v1/; =20 -#include -#include - -#include "mt7988a.dtsi" +#include "mt7988a-bananapi-bpi-r4.dtsi" =20 / { compatible =3D "bananapi,bpi-r4", "mediatek,mt7988a"; - model =3D "Banana Pi BPI-R4"; + model =3D "Banana Pi BPI-R4 (2x SFP+)"; chassis-type =3D "embedded"; - - chosen { - stdout-path =3D "serial0:115200n8"; - }; - - reg_1p8v: regulator-1p8v { - compatible =3D "regulator-fixed"; - regulator-name =3D "fixed-1.8V"; - regulator-min-microvolt =3D <1800000>; - regulator-max-microvolt =3D <1800000>; - regulator-boot-on; - regulator-always-on; - }; - - reg_3p3v: regulator-3p3v { - compatible =3D "regulator-fixed"; - regulator-name =3D "fixed-3.3V"; - regulator-min-microvolt =3D <3300000>; - regulator-max-microvolt =3D <3300000>; - regulator-boot-on; - regulator-always-on; - }; }; =20 -&cpu0 { - proc-supply =3D <&rt5190_buck3>; -}; - -&cpu1 { - proc-supply =3D <&rt5190_buck3>; -}; - -&cpu2 { - proc-supply =3D <&rt5190_buck3>; -}; - -&cpu3 { - proc-supply =3D <&rt5190_buck3>; -}; - -&cpu_thermal { - trips { - cpu_trip_hot: hot { - temperature =3D <120000>; - hysteresis =3D <2000>; - type =3D "hot"; - }; - - cpu_trip_active_high: active-high { - temperature =3D <115000>; - hysteresis =3D <2000>; - type =3D "active"; - }; - - cpu_trip_active_med: active-med { - temperature =3D <85000>; - hysteresis =3D <2000>; - type =3D "active"; - }; - - cpu_trip_active_low: active-low { - temperature =3D <40000>; - hysteresis =3D <2000>; - type =3D "active"; - }; - }; -}; - -&i2c0 { - pinctrl-names =3D "default"; - pinctrl-0 =3D <&i2c0_pins>; - status =3D "okay"; - - rt5190a_64: rt5190a@64 { - compatible =3D "richtek,rt5190a"; - reg =3D <0x64>; - vin2-supply =3D <&rt5190_buck1>; - vin3-supply =3D <&rt5190_buck1>; - vin4-supply =3D <&rt5190_buck1>; - - regulators { - rt5190_buck1: buck1 { - regulator-name =3D "rt5190a-buck1"; - regulator-min-microvolt =3D <5090000>; - regulator-max-microvolt =3D <5090000>; - regulator-allowed-modes =3D - , ; - regulator-boot-on; - regulator-always-on; - }; - buck2 { - regulator-name =3D "vcore"; - regulator-min-microvolt =3D <600000>; - regulator-max-microvolt =3D <1400000>; - regulator-boot-on; - regulator-always-on; - }; - rt5190_buck3: buck3 { - regulator-name =3D "vproc"; - regulator-min-microvolt =3D <600000>; - regulator-max-microvolt =3D <1400000>; - regulator-boot-on; - }; - buck4 { - regulator-name =3D "rt5190a-buck4"; - regulator-min-microvolt =3D <1800000>; - regulator-max-microvolt =3D <1800000>; - regulator-allowed-modes =3D - , ; - regulator-boot-on; - regulator-always-on; - }; - ldo { - regulator-name =3D "rt5190a-ldo"; - regulator-min-microvolt =3D <1800000>; - regulator-max-microvolt =3D <1800000>; - regulator-boot-on; - regulator-always-on; - }; - }; - }; -}; - -&i2c2 { - pinctrl-names =3D "default"; - pinctrl-0 =3D <&i2c2_1_pins>; - status =3D "okay"; - - pca9545: i2c-mux@70 { - compatible =3D "nxp,pca9545"; - reg =3D <0x70>; - reset-gpios =3D <&pio 5 GPIO_ACTIVE_LOW>; +&pca9545 { + i2c_sfp2: i2c@2 { #address-cells =3D <1>; #size-cells =3D <0>; - - i2c@0 { - #address-cells =3D <1>; - #size-cells =3D <0>; - reg =3D <0>; - - pcf8563: rtc@51 { - compatible =3D "nxp,pcf8563"; - reg =3D <0x51>; - #clock-cells =3D <0>; - }; - - eeprom@57 { - compatible =3D "atmel,24c02"; - reg =3D <0x57>; - size =3D <256>; - }; - - }; - - i2c_sfp1: i2c@1 { - #address-cells =3D <1>; - #size-cells =3D <0>; - reg =3D <1>; - }; - - i2c_sfp2: i2c@2 { - #address-cells =3D <1>; - #size-cells =3D <0>; - reg =3D <2>; - }; - }; -}; - -/* mPCIe SIM2 */ -&pcie0 { - status =3D "okay"; -}; - -/* mPCIe SIM3 */ -&pcie1 { - status =3D "okay"; -}; - -/* M.2 key-B SIM1 */ -&pcie2 { - status =3D "okay"; -}; - -/* M.2 key-M SSD */ -&pcie3 { - status =3D "okay"; -}; - -&pio { - mdio0_pins: mdio0-pins { - mux { - function =3D "eth"; - groups =3D "mdc_mdio0"; - }; - - conf { - pins =3D "SMI_0_MDC", "SMI_0_MDIO"; - drive-strength =3D <8>; - }; - }; - - i2c0_pins: i2c0-g0-pins { - mux { - function =3D "i2c"; - groups =3D "i2c0_1"; - }; - }; - - i2c1_pins: i2c1-g0-pins { - mux { - function =3D "i2c"; - groups =3D "i2c1_0"; - }; - }; - - i2c1_sfp_pins: i2c1-sfp-g0-pins { - mux { - function =3D "i2c"; - groups =3D "i2c1_sfp"; - }; - }; - - i2c2_0_pins: i2c2-g0-pins { - mux { - function =3D "i2c"; - groups =3D "i2c2_0"; - }; + reg =3D <2>; }; - - i2c2_1_pins: i2c2-g1-pins { - mux { - function =3D "i2c"; - groups =3D "i2c2_1"; - }; - }; - - gbe0_led0_pins: gbe0-led0-pins { - mux { - function =3D "led"; - groups =3D "gbe0_led0"; - }; - }; - - gbe1_led0_pins: gbe1-led0-pins { - mux { - function =3D "led"; - groups =3D "gbe1_led0"; - }; - }; - - gbe2_led0_pins: gbe2-led0-pins { - mux { - function =3D "led"; - groups =3D "gbe2_led0"; - }; - }; - - gbe3_led0_pins: gbe3-led0-pins { - mux { - function =3D "led"; - groups =3D "gbe3_led0"; - }; - }; - - gbe0_led1_pins: gbe0-led1-pins { - mux { - function =3D "led"; - groups =3D "gbe0_led1"; - }; - }; - - gbe1_led1_pins: gbe1-led1-pins { - mux { - function =3D "led"; - groups =3D "gbe1_led1"; - }; - }; - - gbe2_led1_pins: gbe2-led1-pins { - mux { - function =3D "led"; - groups =3D "gbe2_led1"; - }; - }; - - gbe3_led1_pins: gbe3-led1-pins { - mux { - function =3D "led"; - groups =3D "gbe3_led1"; - }; - }; - - i2p5gbe_led0_pins: 2p5gbe-led0-pins { - mux { - function =3D "led"; - groups =3D "2p5gbe_led0"; - }; - }; - - i2p5gbe_led1_pins: 2p5gbe-led1-pins { - mux { - function =3D "led"; - groups =3D "2p5gbe_led1"; - }; - }; - - mmc0_pins_emmc_45: mmc0-emmc-45-pins { - mux { - function =3D "flash"; - groups =3D "emmc_45"; - }; - }; - - mmc0_pins_emmc_51: mmc0-emmc-51-pins { - mux { - function =3D "flash"; - groups =3D "emmc_51"; - }; - }; - - mmc0_pins_sdcard: mmc0-sdcard-pins { - mux { - function =3D "flash"; - groups =3D "sdcard"; - }; - }; - - uart0_pins: uart0-pins { - mux { - function =3D "uart"; - groups =3D "uart0"; - }; - }; - - snfi_pins: snfi-pins { - mux { - function =3D "flash"; - groups =3D "snfi"; - }; - }; - - spi0_pins: spi0-pins { - mux { - function =3D "spi"; - groups =3D "spi0"; - }; - }; - - spi0_flash_pins: spi0-flash-pins { - mux { - function =3D "spi"; - groups =3D "spi0", "spi0_wp_hold"; - }; - }; - - spi1_pins: spi1-pins { - mux { - function =3D "spi"; - groups =3D "spi1"; - }; - }; - - spi2_pins: spi2-pins { - mux { - function =3D "spi"; - groups =3D "spi2"; - }; - }; - - spi2_flash_pins: spi2-flash-pins { - mux { - function =3D "spi"; - groups =3D "spi2", "spi2_wp_hold"; - }; - }; -}; - -&pwm { - status =3D "okay"; -}; - -&serial0 { - status =3D "okay"; -}; - -&ssusb1 { - status =3D "okay"; -}; - -&tphy { - status =3D "okay"; -}; - -&watchdog { - status =3D "okay"; }; diff --git a/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dtsi b/ar= ch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dtsi new file mode 100644 index 000000000000..0d332822971d --- /dev/null +++ b/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dtsi @@ -0,0 +1,399 @@ +// SPDX-License-Identifier: GPL-2.0-only OR MIT + +/dts-v1/; + +#include +#include + +#include "mt7988a.dtsi" + +/ { + chosen { + stdout-path =3D "serial0:115200n8"; + }; + + reg_1p8v: regulator-1p8v { + compatible =3D "regulator-fixed"; + regulator-name =3D "fixed-1.8V"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-boot-on; + regulator-always-on; + }; + + reg_3p3v: regulator-3p3v { + compatible =3D "regulator-fixed"; + regulator-name =3D "fixed-3.3V"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + regulator-boot-on; + regulator-always-on; + }; +}; + +&cpu0 { + proc-supply =3D <&rt5190_buck3>; +}; + +&cpu1 { + proc-supply =3D <&rt5190_buck3>; +}; + +&cpu2 { + proc-supply =3D <&rt5190_buck3>; +}; + +&cpu3 { + proc-supply =3D <&rt5190_buck3>; +}; + +&cpu_thermal { + trips { + cpu_trip_hot: hot { + temperature =3D <120000>; + hysteresis =3D <2000>; + type =3D "hot"; + }; + + cpu_trip_active_high: active-high { + temperature =3D <115000>; + hysteresis =3D <2000>; + type =3D "active"; + }; + + cpu_trip_active_med: active-med { + temperature =3D <85000>; + hysteresis =3D <2000>; + type =3D "active"; + }; + + cpu_trip_active_low: active-low { + temperature =3D <40000>; + hysteresis =3D <2000>; + type =3D "active"; + }; + }; +}; + +&i2c0 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&i2c0_pins>; + status =3D "okay"; + + rt5190a_64: rt5190a@64 { + compatible =3D "richtek,rt5190a"; + reg =3D <0x64>; + vin2-supply =3D <&rt5190_buck1>; + vin3-supply =3D <&rt5190_buck1>; + vin4-supply =3D <&rt5190_buck1>; + + regulators { + rt5190_buck1: buck1 { + regulator-name =3D "rt5190a-buck1"; + regulator-min-microvolt =3D <5090000>; + regulator-max-microvolt =3D <5090000>; + regulator-allowed-modes =3D + , ; + regulator-boot-on; + regulator-always-on; + }; + buck2 { + regulator-name =3D "vcore"; + regulator-min-microvolt =3D <600000>; + regulator-max-microvolt =3D <1400000>; + regulator-boot-on; + regulator-always-on; + }; + rt5190_buck3: buck3 { + regulator-name =3D "vproc"; + regulator-min-microvolt =3D <600000>; + regulator-max-microvolt =3D <1400000>; + regulator-boot-on; + }; + buck4 { + regulator-name =3D "rt5190a-buck4"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-allowed-modes =3D + , ; + regulator-boot-on; + regulator-always-on; + }; + ldo { + regulator-name =3D "rt5190a-ldo"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + regulator-boot-on; + regulator-always-on; + }; + }; + }; +}; + +&i2c2 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&i2c2_1_pins>; + status =3D "okay"; + + pca9545: i2c-mux@70 { + compatible =3D "nxp,pca9545"; + reg =3D <0x70>; + reset-gpios =3D <&pio 5 GPIO_ACTIVE_LOW>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + i2c@0 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <0>; + + pcf8563: rtc@51 { + compatible =3D "nxp,pcf8563"; + reg =3D <0x51>; + #clock-cells =3D <0>; + }; + + eeprom@57 { + compatible =3D "atmel,24c02"; + reg =3D <0x57>; + size =3D <256>; + }; + + }; + + i2c_sfp1: i2c@1 { + #address-cells =3D <1>; + #size-cells =3D <0>; + reg =3D <1>; + }; + }; +}; + +/* mPCIe SIM2 */ +&pcie0 { + status =3D "okay"; +}; + +/* mPCIe SIM3 */ +&pcie1 { + status =3D "okay"; +}; + +/* M.2 key-B SIM1 */ +&pcie2 { + status =3D "okay"; +}; + +/* M.2 key-M SSD */ +&pcie3 { + status =3D "okay"; +}; + +&pio { + mdio0_pins: mdio0-pins { + mux { + function =3D "eth"; + groups =3D "mdc_mdio0"; + }; + + conf { + pins =3D "SMI_0_MDC", "SMI_0_MDIO"; + drive-strength =3D <8>; + }; + }; + + i2c0_pins: i2c0-g0-pins { + mux { + function =3D "i2c"; + groups =3D "i2c0_1"; + }; + }; + + i2c1_pins: i2c1-g0-pins { + mux { + function =3D "i2c"; + groups =3D "i2c1_0"; + }; + }; + + i2c1_sfp_pins: i2c1-sfp-g0-pins { + mux { + function =3D "i2c"; + groups =3D "i2c1_sfp"; + }; + }; + + i2c2_0_pins: i2c2-g0-pins { + mux { + function =3D "i2c"; + groups =3D "i2c2_0"; + }; + }; + + i2c2_1_pins: i2c2-g1-pins { + mux { + function =3D "i2c"; + groups =3D "i2c2_1"; + }; + }; + + gbe0_led0_pins: gbe0-led0-pins { + mux { + function =3D "led"; + groups =3D "gbe0_led0"; + }; + }; + + gbe1_led0_pins: gbe1-led0-pins { + mux { + function =3D "led"; + groups =3D "gbe1_led0"; + }; + }; + + gbe2_led0_pins: gbe2-led0-pins { + mux { + function =3D "led"; + groups =3D "gbe2_led0"; + }; + }; + + gbe3_led0_pins: gbe3-led0-pins { + mux { + function =3D "led"; + groups =3D "gbe3_led0"; + }; + }; + + gbe0_led1_pins: gbe0-led1-pins { + mux { + function =3D "led"; + groups =3D "gbe0_led1"; + }; + }; + + gbe1_led1_pins: gbe1-led1-pins { + mux { + function =3D "led"; + groups =3D "gbe1_led1"; + }; + }; + + gbe2_led1_pins: gbe2-led1-pins { + mux { + function =3D "led"; + groups =3D "gbe2_led1"; + }; + }; + + gbe3_led1_pins: gbe3-led1-pins { + mux { + function =3D "led"; + groups =3D "gbe3_led1"; + }; + }; + + i2p5gbe_led0_pins: 2p5gbe-led0-pins { + mux { + function =3D "led"; + groups =3D "2p5gbe_led0"; + }; + }; + + i2p5gbe_led1_pins: 2p5gbe-led1-pins { + mux { + function =3D "led"; + groups =3D "2p5gbe_led1"; + }; + }; + + mmc0_pins_emmc_45: mmc0-emmc-45-pins { + mux { + function =3D "flash"; + groups =3D "emmc_45"; + }; + }; + + mmc0_pins_emmc_51: mmc0-emmc-51-pins { + mux { + function =3D "flash"; + groups =3D "emmc_51"; + }; + }; + + mmc0_pins_sdcard: mmc0-sdcard-pins { + mux { + function =3D "flash"; + groups =3D "sdcard"; + }; + }; + + uart0_pins: uart0-pins { + mux { + function =3D "uart"; + groups =3D "uart0"; + }; + }; + + snfi_pins: snfi-pins { + mux { + function =3D "flash"; + groups =3D "snfi"; + }; + }; + + spi0_pins: spi0-pins { + mux { + function =3D "spi"; + groups =3D "spi0"; + }; + }; + + spi0_flash_pins: spi0-flash-pins { + mux { + function =3D "spi"; + groups =3D "spi0", "spi0_wp_hold"; + }; + }; + + spi1_pins: spi1-pins { + mux { + function =3D "spi"; + groups =3D "spi1"; + }; + }; + + spi2_pins: spi2-pins { + mux { + function =3D "spi"; + groups =3D "spi2"; + }; + }; + + spi2_flash_pins: spi2-flash-pins { + mux { + function =3D "spi"; + groups =3D "spi2", "spi2_wp_hold"; + }; + }; +}; + +&pwm { + status =3D "okay"; +}; + +&serial0 { + status =3D "okay"; +}; + +&ssusb1 { + status =3D "okay"; +}; + +&tphy { + status =3D "okay"; +}; + +&watchdog { + status =3D "okay"; +}; --=20 2.43.0 From nobody Thu Dec 18 00:23:15 2025 Received: from mxout3.routing.net (mxout3.routing.net [134.0.28.8]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7673528151B; Tue, 22 Apr 2025 13:25:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=134.0.28.8 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; 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(fttx-pool-217.61.156.53.bambit.de [217.61.156.53]) by mxbox4.masterlogin.de (Postfix) with ESMTPSA id 11B95804E3; Tue, 22 Apr 2025 13:24:52 +0000 (UTC) From: Frank Wunderlich To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lee Jones , Chunfeng Yun , Vinod Koul , Kishon Vijay Abraham I , Matthias Brugger , AngeloGioacchino Del Regno Cc: Frank Wunderlich , =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= , Daniel Golle , Sean Wang , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-phy@lists.infradead.org Subject: [PATCH v4 3/8] dt-bindings: phy: mtk-xs-phy: Add mt7988 compatible Date: Tue, 22 Apr 2025 15:24:26 +0200 Message-ID: <20250422132438.15735-4-linux@fw-web.de> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250422132438.15735-1-linux@fw-web.de> References: <20250422132438.15735-1-linux@fw-web.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Mail-ID: d55efef2-48a6-4326-9390-880fd53eedf2 Content-Type: text/plain; charset="utf-8" From: Frank Wunderlich Add compatible for xs-phy on mt7988. Signed-off-by: Frank Wunderlich Acked-by: Krzysztof Kozlowski Reviewed-by: AngeloGioacchino Del Regno --- Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml b/Do= cumentation/devicetree/bindings/phy/mediatek,xsphy.yaml index a9e3139fd421..3b5253659e6f 100644 --- a/Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml +++ b/Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml @@ -49,6 +49,7 @@ properties: - enum: - mediatek,mt3611-xsphy - mediatek,mt3612-xsphy + - mediatek,mt7988-xsphy - const: mediatek,xsphy =20 reg: --=20 2.43.0 From nobody Thu Dec 18 00:23:15 2025 Received: from mxout4.routing.net (mxout4.routing.net [134.0.28.9]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 36EDE284697; Tue, 22 Apr 2025 13:25:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=134.0.28.9 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1745328303; cv=none; b=FbdXgxcvmMinsb3l7easiTrp2et02XeK9XoteKCSW3wXoVPm6b1q7W/VLD+yQh50nrXVYcGwK9JmXLx/p94dbFKvoeFT0N8X37tAU5LOUUkRYaAopuB1aGBGAIl2CQ76XsTEvDhz/wXeer6fmbGe6utMxi/NkNLMd/2kuQJHXtk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1745328303; c=relaxed/simple; bh=yOgvjUarO7rmEGYIRDabwo99UOdI5BoGN3q/fBYd0P0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=sYf7BEglzMuLBwtoLPVoPNCQqkImqa9zePpwHQa2jGqQGWUQeOI5wYuQMBBTIUlVbwTJzs+PGGCxOWiENwOBcZYVi7ynIATRe6fERFC8CWbAaRFzsm9ocmY+h2+B3dddzkN5lxVDTyGT3ihKyD44CeKsCCOUmN6DgQE2IJNSb60= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=fw-web.de; spf=pass smtp.mailfrom=fw-web.de; dkim=pass (1024-bit key) header.d=mailerdienst.de header.i=@mailerdienst.de header.b=t+33jZHA; arc=none smtp.client-ip=134.0.28.9 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=fw-web.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=fw-web.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mailerdienst.de header.i=@mailerdienst.de header.b="t+33jZHA" Received: from mxbox4.masterlogin.de (unknown [192.168.10.79]) by mxout4.routing.net (Postfix) with ESMTP id BB7981005F7; Tue, 22 Apr 2025 13:24:53 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailerdienst.de; s=20200217; t=1745328293; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=5RcZIjIwx1s6Wcv16nJayJJUai7Sa7nACbdnFD1drq0=; b=t+33jZHAliVR9d3XvK+repuuoaox4NEdkjDkAw8/cmKob5ZBzZ6R2zsFgJDhq1ZKLaOUAf 5HjfW0FrfQ9BqLBXEFKl2ZqIziRN/NuzCoBodkWoMYscXdN2k/tTP5NGMxGh2XaSCjlr0Y oVoZxw3DzF6R5Vu2Vg4L3/Rz/uNJD+c= Received: from frank-u24.. (fttx-pool-217.61.156.53.bambit.de [217.61.156.53]) by mxbox4.masterlogin.de (Postfix) with ESMTPSA id D86A980318; Tue, 22 Apr 2025 13:24:52 +0000 (UTC) From: Frank Wunderlich To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lee Jones , Chunfeng Yun , Vinod Koul , Kishon Vijay Abraham I , Matthias Brugger , AngeloGioacchino Del Regno Cc: Frank Wunderlich , =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= , Daniel Golle , Sean Wang , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-phy@lists.infradead.org Subject: [PATCH v4 4/8] dt-bindings: phy: mtk-xs-phy: support type switch by pericfg Date: Tue, 22 Apr 2025 15:24:27 +0200 Message-ID: <20250422132438.15735-5-linux@fw-web.de> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250422132438.15735-1-linux@fw-web.de> References: <20250422132438.15735-1-linux@fw-web.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Mail-ID: e0e4b4d5-9fca-452c-b776-a545c7a43a4d Content-Type: text/plain; charset="utf-8" From: Frank Wunderlich Add support for type switch by pericfg register between USB3/PCIe. Signed-off-by: Frank Wunderlich Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Krzysztof Kozlowski --- v4: - changes based on comments from Krzysztof - change to phy type configuration controller/register --- .../devicetree/bindings/phy/mediatek,xsphy.yaml | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml b/Do= cumentation/devicetree/bindings/phy/mediatek,xsphy.yaml index 3b5253659e6f..0bed847bb4ad 100644 --- a/Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml +++ b/Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml @@ -151,6 +151,21 @@ patternProperties: minimum: 1 maximum: 31 =20 + mediatek,syscon-type: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: + A phandle to syscon used to access the register of type switch, + the field should always be 3 cells long. + items: + - items: + - description: + Phandle to phy type configuration system controller + - description: + Phy type configuration register offset + - description: + Index of config segment + enum: [0, 1, 2, 3] + required: - reg - clocks --=20 2.43.0 From nobody Thu Dec 18 00:23:15 2025 Received: from mxout1.routing.net (mxout1.routing.net [134.0.28.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CEF2528CF5E; Tue, 22 Apr 2025 13:25:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=134.0.28.11 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1745328304; cv=none; b=gbRMiRcCcslu8dWqa2Ylz8uMNTOJhkhVDHI1GfcIsIUYNuk4Hxi8HUHhKTDT5hCjHivM6OWRtdorEe0pyPCRknyGTiSmx8IegasPwQbKh6lPmIuKG+EJSbJJojunv5FaW6Jr8bH+89B0pzCKojiZqnvJyDhhCx4tpG7dJTLGMes= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1745328304; c=relaxed/simple; bh=urMTbZlNGsHBI5M2IFITv7N1SGHd3JWNjUImPd8kywA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=FICjK+CLmXId4Owi4Ym00I9AeTk1l7FHHbLya7/U+wf5bPH/+qjiM5p5aVnW0RxyoD4O63Afb0g8TXsQljp+7ObTzSglBThVPgsTp8pDzKC/lVxsFtLI1MRbcRzyomF4inv/w7bJd2FbvW5C1cSA98naN971Q+5BR8v0TfsYep0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=fw-web.de; spf=pass smtp.mailfrom=fw-web.de; dkim=pass (1024-bit key) header.d=mailerdienst.de header.i=@mailerdienst.de header.b=VqK3lDo8; arc=none smtp.client-ip=134.0.28.11 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=fw-web.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=fw-web.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mailerdienst.de header.i=@mailerdienst.de header.b="VqK3lDo8" Received: from mxbox4.masterlogin.de (unknown [192.168.10.79]) by mxout1.routing.net (Postfix) with ESMTP id 9154A3FEAB; Tue, 22 Apr 2025 13:24:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailerdienst.de; s=20200217; t=1745328294; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=T4cXuAtgUs1MzeQPNLofj0xLDBzZAy2dVcqVMZRNRe8=; b=VqK3lDo8PVhYpULBdkKMU4E6PXwrIZj4LSWhXDcNiP24772PkxdJqo9vQn9ZC4jmK2tw8g f4qBw+UJHpRKnS+9BYifvFSGYysl+xCYp1FD22g4ZeZMdwnI+7K/lpQmkghWOKFAUaeWyd bc1svMrCnNlPQYKu/lGtpVZXjJxoIVQ= Received: from frank-u24.. (fttx-pool-217.61.156.53.bambit.de [217.61.156.53]) by mxbox4.masterlogin.de (Postfix) with ESMTPSA id ABAC6801F5; Tue, 22 Apr 2025 13:24:53 +0000 (UTC) From: Frank Wunderlich To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lee Jones , Chunfeng Yun , Vinod Koul , Kishon Vijay Abraham I , Matthias Brugger , AngeloGioacchino Del Regno Cc: Frank Wunderlich , =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= , Daniel Golle , Sean Wang , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-phy@lists.infradead.org Subject: [PATCH v4 5/8] dt-bindings: mfd: syscon: Add mt7988-topmisc Date: Tue, 22 Apr 2025 15:24:28 +0200 Message-ID: <20250422132438.15735-6-linux@fw-web.de> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250422132438.15735-1-linux@fw-web.de> References: <20250422132438.15735-1-linux@fw-web.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Mail-ID: b8e8432c-90f6-4c86-b7f0-98af8c167af7 Content-Type: text/plain; charset="utf-8" From: Frank Wunderlich Add compatible for Mediatek mt7988 topmisc syscon. This hardware block contains 2 functional blocks - a powercontroller which is not needed (switched by atf) - a multiplexer for high-speed Combo-Phy This compatible is only for the multiplexer part. Signed-off-by: Frank Wunderlich Acked-by: Krzysztof Kozlowski Reviewed-by: AngeloGioacchino Del Regno --- Documentation/devicetree/bindings/mfd/syscon.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentat= ion/devicetree/bindings/mfd/syscon.yaml index c6bbb19c3e3e..4f3d522bc3de 100644 --- a/Documentation/devicetree/bindings/mfd/syscon.yaml +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml @@ -84,6 +84,7 @@ select: - mediatek,mt2701-pctl-a-syscfg - mediatek,mt2712-pctl-a-syscfg - mediatek,mt6397-pctl-pmic-syscfg + - mediatek,mt7988-topmisc - mediatek,mt8135-pctl-a-syscfg - mediatek,mt8135-pctl-b-syscfg - mediatek,mt8173-pctl-a-syscfg @@ -187,6 +188,7 @@ properties: - mediatek,mt2701-pctl-a-syscfg - mediatek,mt2712-pctl-a-syscfg - mediatek,mt6397-pctl-pmic-syscfg + - mediatek,mt7988-topmisc - mediatek,mt8135-pctl-a-syscfg - mediatek,mt8135-pctl-b-syscfg - mediatek,mt8173-pctl-a-syscfg --=20 2.43.0 From nobody Thu Dec 18 00:23:15 2025 Received: from mxout3.routing.net (mxout3.routing.net [134.0.28.8]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E5AF728CF65; Tue, 22 Apr 2025 13:25:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=134.0.28.8 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1745328305; cv=none; b=PAbuR8z5Ke44F9fIaLH4FvIpE6pjW8GZ9rwNoSGjgq2UrawbXeauysIoXop7T4zeNCtHtK+UTj4Kg6jlfuFpupAOcCOYybxfEX25H/7NBObrqKZk2+xkArCntdoARQ3/aYdeq4D52NJ3dKBhSSvkiEB/2oiPKcOzaeSjUclgXsU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1745328305; c=relaxed/simple; bh=75LJ2+MGXPl3iHbcC0Ozkg40P53VaqzfB8RywROL95A=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=IixTjcnAw5/1VjoUM9bCCuzXDgOsux8fLWs0fP4ivhB/TZTydNU9dCmInIUrbuDAL57BubpVIWAzlqiLuzc+kflqE7fRD0y9tMs1ogEn+OWNDQZ/BN26IIU3gXjiTIAeA3ID2yd5zge9DkHc+5nQ8yty0+RpCe7+NocQ8C4FX+4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=fw-web.de; spf=pass smtp.mailfrom=fw-web.de; dkim=pass (1024-bit key) header.d=mailerdienst.de header.i=@mailerdienst.de header.b=lqQpi2Ur; arc=none smtp.client-ip=134.0.28.8 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=fw-web.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=fw-web.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mailerdienst.de header.i=@mailerdienst.de header.b="lqQpi2Ur" Received: from mxbox4.masterlogin.de (unknown [192.168.10.79]) by mxout3.routing.net (Postfix) with ESMTP id 6159F61560; Tue, 22 Apr 2025 13:24:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailerdienst.de; s=20200217; t=1745328295; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=WwQBx5fEB+uvLYfypIdunG+zLMu/9QNNGo72DjZopiw=; b=lqQpi2Ury/h+25PHTojKuxA7jEmpzU3C05jQBvrCjcI5dWKKCKUrE/pMgjdX/XYA7H1eLL wK4IrFTiz93EZum0Q06FRH85xHJe66q8U/70GcMHjscqZQaO9LUR7UZDCm1n9sFA6bFXBq 5Hppy+kmVtUsNqVKkPBAvFolA39JUQk= Received: from frank-u24.. (fttx-pool-217.61.156.53.bambit.de [217.61.156.53]) by mxbox4.masterlogin.de (Postfix) with ESMTPSA id 81EC780318; Tue, 22 Apr 2025 13:24:54 +0000 (UTC) From: Frank Wunderlich To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lee Jones , Chunfeng Yun , Vinod Koul , Kishon Vijay Abraham I , Matthias Brugger , AngeloGioacchino Del Regno Cc: Frank Wunderlich , =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= , Daniel Golle , Sean Wang , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-phy@lists.infradead.org Subject: [PATCH v4 6/8] phy: mediatek: xsphy: support type switch by pericfg Date: Tue, 22 Apr 2025 15:24:29 +0200 Message-ID: <20250422132438.15735-7-linux@fw-web.de> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250422132438.15735-1-linux@fw-web.de> References: <20250422132438.15735-1-linux@fw-web.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Mail-ID: 814a2e1d-e4bb-4860-9157-67475ebe6d0c Content-Type: text/plain; charset="utf-8" From: Daniel Golle Patch from Sam Shih found in MediaTek SDK released under GPL. Get syscon and use it to set the PHY type. Extend support to PCIe and SGMII mode in addition to USB2 and USB3. Signed-off-by: Daniel Golle Signed-off-by: Frank Wunderlich Reviewed-by: AngeloGioacchino Del Regno --- drivers/phy/mediatek/phy-mtk-xsphy.c | 85 +++++++++++++++++++++++++++- 1 file changed, 84 insertions(+), 1 deletion(-) diff --git a/drivers/phy/mediatek/phy-mtk-xsphy.c b/drivers/phy/mediatek/ph= y-mtk-xsphy.c index 7c248f5cfca5..c0ddb9273cc3 100644 --- a/drivers/phy/mediatek/phy-mtk-xsphy.c +++ b/drivers/phy/mediatek/phy-mtk-xsphy.c @@ -11,10 +11,12 @@ #include #include #include +#include #include #include #include #include +#include =20 #include "phy-mtk-io.h" =20 @@ -81,12 +83,22 @@ #define XSP_SR_COEF_DIVISOR 1000 #define XSP_FM_DET_CYCLE_CNT 1024 =20 +/* PHY switch between pcie/usb3/sgmii */ +#define USB_PHY_SWITCH_CTRL 0x0 +#define RG_PHY_SW_TYPE GENMASK(3, 0) +#define RG_PHY_SW_PCIE 0x0 +#define RG_PHY_SW_USB3 0x1 +#define RG_PHY_SW_SGMII 0x2 + struct xsphy_instance { struct phy *phy; void __iomem *port_base; struct clk *ref_clk; /* reference clock of anolog phy */ u32 index; u32 type; + struct regmap *type_sw; + u32 type_sw_reg; + u32 type_sw_index; /* only for HQA test */ int efuse_intr; int efuse_tx_imp; @@ -259,6 +271,10 @@ static void phy_parse_property(struct mtk_xsphy *xsphy, inst->efuse_intr, inst->efuse_tx_imp, inst->efuse_rx_imp); break; + case PHY_TYPE_PCIE: + case PHY_TYPE_SGMII: + /* nothing to do */ + break; default: dev_err(xsphy->dev, "incompatible phy type\n"); return; @@ -305,6 +321,62 @@ static void u3_phy_props_set(struct mtk_xsphy *xsphy, RG_XTP_LN0_RX_IMPSEL, inst->efuse_rx_imp); } =20 +/* type switch for usb3/pcie/sgmii */ +static int phy_type_syscon_get(struct xsphy_instance *instance, + struct device_node *dn) +{ + struct of_phandle_args args; + int ret; + + /* type switch function is optional */ + if (!of_property_present(dn, "mediatek,syscon-type")) + return 0; + + ret =3D of_parse_phandle_with_fixed_args(dn, "mediatek,syscon-type", + 2, 0, &args); + if (ret) + return ret; + + instance->type_sw_reg =3D args.args[0]; + instance->type_sw_index =3D args.args[1] & 0x3; /* <=3D3 */ + instance->type_sw =3D syscon_node_to_regmap(args.np); + of_node_put(args.np); + dev_info(&instance->phy->dev, "type_sw - reg %#x, index %d\n", + instance->type_sw_reg, instance->type_sw_index); + + return PTR_ERR_OR_ZERO(instance->type_sw); +} + +static int phy_type_set(struct xsphy_instance *instance) +{ + int type; + u32 offset; + + if (!instance->type_sw) + return 0; + + switch (instance->type) { + case PHY_TYPE_USB3: + type =3D RG_PHY_SW_USB3; + break; + case PHY_TYPE_PCIE: + type =3D RG_PHY_SW_PCIE; + break; + case PHY_TYPE_SGMII: + type =3D RG_PHY_SW_SGMII; + break; + case PHY_TYPE_USB2: + default: + return 0; + } + + offset =3D instance->type_sw_index * BITS_PER_BYTE; + regmap_update_bits(instance->type_sw, instance->type_sw_reg, + RG_PHY_SW_TYPE << offset, type << offset); + + return 0; +} + static int mtk_phy_init(struct phy *phy) { struct xsphy_instance *inst =3D phy_get_drvdata(phy); @@ -325,6 +397,10 @@ static int mtk_phy_init(struct phy *phy) case PHY_TYPE_USB3: u3_phy_props_set(xsphy, inst); break; + case PHY_TYPE_PCIE: + case PHY_TYPE_SGMII: + /* nothing to do, only used to set type */ + break; default: dev_err(xsphy->dev, "incompatible phy type\n"); clk_disable_unprepare(inst->ref_clk); @@ -403,12 +479,15 @@ static struct phy *mtk_phy_xlate(struct device *dev, =20 inst->type =3D args->args[0]; if (!(inst->type =3D=3D PHY_TYPE_USB2 || - inst->type =3D=3D PHY_TYPE_USB3)) { + inst->type =3D=3D PHY_TYPE_USB3 || + inst->type =3D=3D PHY_TYPE_PCIE || + inst->type =3D=3D PHY_TYPE_SGMII)) { dev_err(dev, "unsupported phy type: %d\n", inst->type); return ERR_PTR(-EINVAL); } =20 phy_parse_property(xsphy, inst); + phy_type_set(inst); =20 return inst->phy; } @@ -510,6 +589,10 @@ static int mtk_xsphy_probe(struct platform_device *pde= v) dev_err(dev, "failed to get ref_clk(id-%d)\n", port); return PTR_ERR(inst->ref_clk); } + + retval =3D phy_type_syscon_get(inst, child_np); + if (retval) + return retval; } =20 provider =3D devm_of_phy_provider_register(dev, mtk_phy_xlate); --=20 2.43.0 From nobody Thu Dec 18 00:23:15 2025 Received: from mxout4.routing.net (mxout4.routing.net [134.0.28.9]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6179028CF73; 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(fttx-pool-217.61.156.53.bambit.de [217.61.156.53]) by mxbox4.masterlogin.de (Postfix) with ESMTPSA id 504B0801F5; Tue, 22 Apr 2025 13:24:55 +0000 (UTC) From: Frank Wunderlich To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lee Jones , Chunfeng Yun , Vinod Koul , Kishon Vijay Abraham I , Matthias Brugger , AngeloGioacchino Del Regno Cc: Frank Wunderlich , =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= , Daniel Golle , Sean Wang , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-phy@lists.infradead.org Subject: [PATCH v4 7/8] arm64: dts: mediatek: mt7988: Add xsphy for ssusb0/pcie2 Date: Tue, 22 Apr 2025 15:24:30 +0200 Message-ID: <20250422132438.15735-8-linux@fw-web.de> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250422132438.15735-1-linux@fw-web.de> References: <20250422132438.15735-1-linux@fw-web.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Mail-ID: 3df57c91-f0e1-43d9-be6f-95cea4f19eca Content-Type: text/plain; charset="utf-8" From: Frank Wunderlich First usb and third pcie controller on mt7988 need a xs-phy to work properly. Signed-off-by: Frank Wunderlich Reviewed-by: AngeloGioacchino Del Regno --- v3: - drop unneeded properties and compatibles from topmisc - change offset to have clean syscon (without power controller) v4: - fix unit adress of topmisc --- arch/arm64/boot/dts/mediatek/mt7988a.dtsi | 36 +++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt7988a.dtsi b/arch/arm64/boot/dt= s/mediatek/mt7988a.dtsi index 88b56a24efca..a59f8708f0ef 100644 --- a/arch/arm64/boot/dts/mediatek/mt7988a.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt7988a.dtsi @@ -334,6 +334,8 @@ usb@11190000 { <&infracfg CLK_INFRA_133M_USB_HCK>, <&infracfg CLK_INFRA_USB_XHCI>; clock-names =3D "sys_ck", "ref_ck", "mcu_ck", "dma_ck", "xhci_ck"; + phys =3D <&xphyu2port0 PHY_TYPE_USB2>, + <&xphyu3port0 PHY_TYPE_USB3>; status =3D "disabled"; }; =20 @@ -398,6 +400,9 @@ pcie2: pcie@11280000 { pinctrl-0 =3D <&pcie2_pins>; status =3D "disabled"; =20 + phys =3D <&xphyu3port0 PHY_TYPE_PCIE>; + phy-names =3D "pcie-phy"; + #interrupt-cells =3D <1>; interrupt-map-mask =3D <0 0 0 0x7>; interrupt-map =3D <0 0 0 1 &pcie_intc2 0>, @@ -548,6 +553,37 @@ tphyu3port0: usb-phy@11c50700 { }; }; =20 + + topmisc: system-controller@11d10084 { + compatible =3D "mediatek,mt7988-topmisc", + "syscon"; + reg =3D <0 0x11d10084 0 0xff80>; + }; + + xs-phy@11e10000 { + compatible =3D "mediatek,mt7988-xsphy", + "mediatek,xsphy"; + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + status =3D "disabled"; + + xphyu2port0: usb-phy@11e10000 { + reg =3D <0 0x11e10000 0 0x400>; + clocks =3D <&infracfg CLK_INFRA_USB_UTMI>; + clock-names =3D "ref"; + #phy-cells =3D <1>; + }; + + xphyu3port0: usb-phy@11e13000 { + reg =3D <0 0x11e13400 0 0x500>; + clocks =3D <&infracfg CLK_INFRA_USB_PIPE>; + clock-names =3D "ref"; + #phy-cells =3D <1>; + mediatek,syscon-type =3D <&topmisc 0x194 0>; + }; + }; + clock-controller@11f40000 { compatible =3D "mediatek,mt7988-xfi-pll"; reg =3D <0 0x11f40000 0 0x1000>; --=20 2.43.0 From nobody Thu Dec 18 00:23:15 2025 Received: from mxout3.routing.net (mxout3.routing.net [134.0.28.8]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E077928D820; Tue, 22 Apr 2025 13:25:03 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=134.0.28.8 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1745328305; cv=none; b=Rldw9jIMGvKTx1uJDI/Mu0CsDd7wv9oqWVQ6nACnqOn1Tt3+aUvDQvpPmSZB6JLK+sNt/a/5IEm88V/nZ1JYH7cfI7hHTicahQ6DXxNshR++ccY28x+lfETWLcZo5usHrThOhMkLRie9uhoc1qn/VbOqfLOmr9joOMHwR/t/R/0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1745328305; c=relaxed/simple; bh=21eAx4qdovnFQdUocuHwoDbkCn3gioL4y3Mbe12E8Gg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=NCnVE/alwYbS5AvovwblVDyM/MQYFyMtWO58NtUyM0kv4yRMhIUNbMlVopvtH/thSofuCMDscGrBia3b7VUKbn5MaJOrT0Opd99gskcRqTHHFjD9h6tRGeFSK75BXok71BBfDIEdTw7L4GUXjvhIbIHch7NmdtqKEcNZe+0D2ec= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=fw-web.de; spf=pass smtp.mailfrom=fw-web.de; dkim=pass (1024-bit key) header.d=mailerdienst.de header.i=@mailerdienst.de header.b=yFWNV9qO; arc=none smtp.client-ip=134.0.28.8 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=fw-web.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=fw-web.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mailerdienst.de header.i=@mailerdienst.de header.b="yFWNV9qO" Received: from mxbox4.masterlogin.de (unknown [192.168.10.79]) by mxout3.routing.net (Postfix) with ESMTP id E85A661561; Tue, 22 Apr 2025 13:24:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mailerdienst.de; s=20200217; t=1745328297; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=lAaZA5qK/vVGDqno3S4/pNWQHPXmaevDq5rdyc2qK0A=; b=yFWNV9qOzdoT1XGn0n3XyUIxew8wXFVlrFYhQQVNxnGDgCHGh7EFeF6eV2R0U+rILyQ9Oq 6ijwGR1h6xvjGIWgOpw1gvnYM3L9vLwD9Va5AIaCZ58c1NvZhF0e7ul08r5s+6VoetfqL8 oT9E8q76HEy7ZvKEB4Zfc/gaoDTiln8= Received: from frank-u24.. (fttx-pool-217.61.156.53.bambit.de [217.61.156.53]) by mxbox4.masterlogin.de (Postfix) with ESMTPSA id 21BE4812E1; Tue, 22 Apr 2025 13:24:56 +0000 (UTC) From: Frank Wunderlich To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Lee Jones , Chunfeng Yun , Vinod Koul , Kishon Vijay Abraham I , Matthias Brugger , AngeloGioacchino Del Regno Cc: Frank Wunderlich , =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= , Daniel Golle , Sean Wang , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-phy@lists.infradead.org Subject: [PATCH v4 8/8] arm64: dts: mediatek: mt7988a-bpi-r4: enable xsphy Date: Tue, 22 Apr 2025 15:24:31 +0200 Message-ID: <20250422132438.15735-9-linux@fw-web.de> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250422132438.15735-1-linux@fw-web.de> References: <20250422132438.15735-1-linux@fw-web.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Mail-ID: 0bf218eb-9965-4df4-aefb-1c24f469b40a Content-Type: text/plain; charset="utf-8" From: Frank Wunderlich Enable XS-Phy on Bananapi R4 for pcie2. Signed-off-by: Frank Wunderlich Reviewed-by: AngeloGioacchino Del Regno --- arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dtsi | 4 ++++ arch/arm64/boot/dts/mediatek/mt7988a.dtsi | 2 +- 2 files changed, 5 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dtsi b/ar= ch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dtsi index 0d332822971d..37e541a98ee1 100644 --- a/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt7988a-bananapi-bpi-r4.dtsi @@ -397,3 +397,7 @@ &tphy { &watchdog { status =3D "okay"; }; + +&xsphy { + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/mediatek/mt7988a.dtsi b/arch/arm64/boot/dt= s/mediatek/mt7988a.dtsi index a59f8708f0ef..8f6d1dfae24a 100644 --- a/arch/arm64/boot/dts/mediatek/mt7988a.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt7988a.dtsi @@ -560,7 +560,7 @@ topmisc: system-controller@11d10084 { reg =3D <0 0x11d10084 0 0xff80>; }; =20 - xs-phy@11e10000 { + xsphy: xs-phy@11e10000 { compatible =3D "mediatek,mt7988-xsphy", "mediatek,xsphy"; #address-cells =3D <2>; --=20 2.43.0