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Mon, 21 Apr 2025 02:44:58 -0700 (PDT) From: Nylon Chen To: Conor Dooley , Rob Herring , Krzysztof Kozlowski , Paul Walmsley , Palmer Dabbelt , Albert Ou , Samuel Holland , =?UTF-8?q?Uwe=20Kleine-K=C3=B6nig?= Cc: linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pwm@vger.kernel.org, Nylon Chen , Zong Li Subject: [PATCH v11 5/5] pwm: sifive: clarify inverted compare logic in comments Date: Mon, 21 Apr 2025 17:55:21 +0800 Message-Id: <20250421095521.1500427-6-nylon.chen@sifive.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250421095521.1500427-1-nylon.chen@sifive.com> References: <20250421095521.1500427-1-nylon.chen@sifive.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable The FU740=E2=80=91C000 manual says =E2=80=9Cpwms =E2=89=A5 pwmcmpX -> HIGH= =E2=80=9D, but in Figure=C2=A029 pwmcmpXcenter is forced to=C2=A00 via an XOR, so hardware actually outputs HIGH when pwms= < pwmcmpX. Thus pwmcmp holds the off=E2=80=91period count, and the driver must invert = it to expose a normal active=E2=80=91high interface. Co-developed-by: Zong Li Signed-off-by: Zong Li Signed-off-by: Nylon Chen --- drivers/pwm/pwm-sifive.c | 22 +++++++++++++++++++++- 1 file changed, 21 insertions(+), 1 deletion(-) diff --git a/drivers/pwm/pwm-sifive.c b/drivers/pwm/pwm-sifive.c index 1404c383461d..fd1660e16a4c 100644 --- a/drivers/pwm/pwm-sifive.c +++ b/drivers/pwm/pwm-sifive.c @@ -4,11 +4,28 @@ * For SiFive's PWM IP block documentation please refer Chapter 14 of * Reference Manual : https://static.dev.sifive.com/FU540-C000-v1.0.pdf * + * PWM output inversion: According to the SiFive Reference manual + * the output of each comparator is high whenever the value of pwms is + * greater than or equal to the corresponding pwmcmpX[Reference Manual]. + * + * Figure=C2=A029 in the same manual shows that the pwmcmpXcenter bit is + * hard=E2=80=91tied to 0 (XNOR), which effectively inverts the comparison= so that + * the output goes HIGH when `pwms < pwmcmpX`. + * + * In other words, each pwmcmp register actually defines the **inactive** + * (low) period of the pulse, not the active time exactly opposite to what + * the documentation text implies. + * + * To compensate, this driver always **inverts** the duty value when readi= ng + * or writing pwmcmp registers , so that users interact with a conventional + * **active=E2=80=91high** PWM interface. + * + * * Limitations: * - When changing both duty cycle and period, we cannot prevent in * software that the output might produce a period with mixed * settings (new period length and old duty cycle). - * - The hardware cannot generate a 100% duty cycle. + * - The hardware cannot generate a 0% duty cycle. * - The hardware generates only inverted output. */ #include @@ -113,6 +130,8 @@ static int pwm_sifive_get_state(struct pwm_chip *chip, = struct pwm_device *pwm, u32 duty, val, inactive; =20 inactive =3D readl(ddata->regs + PWM_SIFIVE_PWMCMP(pwm->hwpwm)); + /* PWM hardware uses 'inactive' counts in pwmcmp, so invert to get actual= duty. + * Here, 'inactive' is the low time and we compute duty as max_count - in= active. */ duty =3D (1U << PWM_SIFIVE_CMPWIDTH) - 1 - inactive; =20 state->enabled =3D duty > 0; @@ -160,6 +179,7 @@ static int pwm_sifive_apply(struct pwm_chip *chip, stru= ct pwm_device *pwm, frac =3D num / state->period; /* The hardware cannot generate a 0% duty cycle */ frac =3D min(frac, (1U << PWM_SIFIVE_CMPWIDTH) - 1); + /* pwmcmp register must be loaded with the inactive - time count (invert = the duty) */ inactive =3D (1U << PWM_SIFIVE_CMPWIDTH) - 1 - frac; =20 mutex_lock(&ddata->lock); --=20 2.34.1