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Sun, 20 Apr 2025 09:44:54 -0700 (PDT) X-Relaying-Domain: purestorage.com Received: from dev-csander.dev.purestorage.com (dev-csander.dev.purestorage.com [10.7.70.37]) by c7-smtp-2023.dev.purestorage.com (Postfix) with ESMTP id 6E32F340193; Sun, 20 Apr 2025 10:44:53 -0600 (MDT) Received: by dev-csander.dev.purestorage.com (Postfix, from userid 1557716354) id 68494E411CC; Sun, 20 Apr 2025 10:44:53 -0600 (MDT) From: Caleb Sander Mateos To: Keith Busch , Jens Axboe , Christoph Hellwig , Sagi Grimberg Cc: Caleb Sander Mateos , linux-nvme@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH] nvme/pci: make PRP list DMA pools per-NUMA-node Date: Sun, 20 Apr 2025 10:44:48 -0600 Message-ID: <20250420164450.1144416-1-csander@purestorage.com> X-Mailer: git-send-email 2.45.2 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" NVMe commands with more than 4 KB of data allocate PRP list pages from the per-nvme_device dma_pool prp_page_pool or prp_small_pool. Each call to dma_pool_alloc() and dma_pool_free() takes the per-dma_pool spinlock. These device-global spinlocks are a significant source of contention when many CPUs are submitting to the same NVMe devices. On a workload issuing 32 KB reads from 16 CPUs (8 hypertwin pairs) across 2 NUMA nodes to 23 NVMe devices, we observed 2.4% of CPU time spent in _raw_spin_lock_irqsave called from dma_pool_alloc and dma_pool_free. Ideally, the dma_pools would be per-hctx to minimize contention. But that could impose considerable resource costs in a system with many NVMe devices and CPUs. As a compromise, allocate per-NUMA-node PRP list DMA pools. Map each nvme_queue to the set of DMA pools corresponding to its device and its hctx's NUMA node. This reduces the _raw_spin_lock_irqsave overhead by about half, to 1.2%. Preventing the sharing of PRP list pages across NUMA nodes also makes them cheaper to initialize. Link: https://lists.infradead.org/pipermail/linux-nvme/2025-April/055376.ht= ml Signed-off-by: Caleb Sander Mateos --- drivers/nvme/host/pci.c | 140 +++++++++++++++++++++++----------------- 1 file changed, 81 insertions(+), 59 deletions(-) diff --git a/drivers/nvme/host/pci.c b/drivers/nvme/host/pci.c index b178d52eac1b..a07815574e93 100644 --- a/drivers/nvme/host/pci.c +++ b/drivers/nvme/host/pci.c @@ -110,21 +110,25 @@ struct nvme_queue; =20 static void nvme_dev_disable(struct nvme_dev *dev, bool shutdown); static void nvme_delete_io_queues(struct nvme_dev *dev); static void nvme_update_attrs(struct nvme_dev *dev); =20 +struct nvme_prp_dma_pools { + struct dma_pool *large; + struct dma_pool *small; +}; + /* * Represents an NVM Express device. Each nvme_dev is a PCI function. */ struct nvme_dev { struct nvme_queue *queues; struct blk_mq_tag_set tagset; struct blk_mq_tag_set admin_tagset; u32 __iomem *dbs; struct device *dev; - struct dma_pool *prp_page_pool; - struct dma_pool *prp_small_pool; + struct nvme_prp_dma_pools prp_pools[MAX_NUMNODES]; unsigned online_queues; unsigned max_qid; unsigned io_queues[HCTX_MAX_TYPES]; unsigned int num_vecs; u32 q_depth; @@ -189,10 +193,11 @@ static inline struct nvme_dev *to_nvme_dev(struct nvm= e_ctrl *ctrl) * An NVM Express queue. Each device has at least two (one for admin * commands and one for I/O commands). */ struct nvme_queue { struct nvme_dev *dev; + struct nvme_prp_dma_pools prp_pools; spinlock_t sq_lock; void *sq_cmds; /* only used for poll queues: */ spinlock_t cq_poll_lock ____cacheline_aligned_in_smp; struct nvme_completion *cqes; @@ -408,17 +413,66 @@ static int nvme_admin_init_hctx(struct blk_mq_hw_ctx = *hctx, void *data, =20 hctx->driver_data =3D nvmeq; return 0; } =20 +static struct nvme_prp_dma_pools * +nvme_setup_prp_pools(struct nvme_dev *dev, unsigned numa_node) +{ + struct nvme_prp_dma_pools *prp_pools =3D &dev->prp_pools[numa_node]; + size_t small_align =3D 256; + + if (prp_pools->small) + return prp_pools; /* already initialized */ + + prp_pools->large =3D dma_pool_create("prp list page", dev->dev, + NVME_CTRL_PAGE_SIZE, + NVME_CTRL_PAGE_SIZE, 0); + if (!prp_pools->large) + return ERR_PTR(-ENOMEM); + + if (dev->ctrl.quirks & NVME_QUIRK_DMAPOOL_ALIGN_512) + small_align =3D 512; + + /* Optimisation for I/Os between 4k and 128k */ + prp_pools->small =3D dma_pool_create("prp list 256", dev->dev, + 256, small_align, 0); + if (!prp_pools->small) { + dma_pool_destroy(prp_pools->large); + return ERR_PTR(-ENOMEM); + } + + return prp_pools; +} + +static void nvme_release_prp_pools(struct nvme_dev *dev) +{ + struct nvme_prp_dma_pools *pools_end =3D dev->prp_pools + MAX_NUMNODES; + struct nvme_prp_dma_pools *prp_pools; + + for (prp_pools =3D dev->prp_pools; prp_pools < pools_end; prp_pools++) { + if (!prp_pools->small) + continue; + + dma_pool_destroy(prp_pools->large); + dma_pool_destroy(prp_pools->small); + } +} + static int nvme_init_hctx(struct blk_mq_hw_ctx *hctx, void *data, unsigned int hctx_idx) { struct nvme_dev *dev =3D to_nvme_dev(data); struct nvme_queue *nvmeq =3D &dev->queues[hctx_idx + 1]; + struct nvme_prp_dma_pools *prp_pools; =20 WARN_ON(dev->tagset.tags[hctx_idx] !=3D hctx->tags); + prp_pools =3D nvme_setup_prp_pools(dev, hctx->numa_node); + if (IS_ERR(prp_pools)) + return PTR_ERR(prp_pools); + + nvmeq->prp_pools =3D *prp_pools; hctx->driver_data =3D nvmeq; return 0; } =20 static int nvme_pci_init_request(struct blk_mq_tag_set *set, @@ -535,27 +589,28 @@ static inline bool nvme_pci_use_sgls(struct nvme_dev = *dev, struct request *req, if (!sgl_threshold || avg_seg_size < sgl_threshold) return nvme_req(req)->flags & NVME_REQ_USERCMD; return true; } =20 -static void nvme_free_prps(struct nvme_dev *dev, struct request *req) +static void nvme_free_prps(struct nvme_queue *nvmeq, struct request *req) { const int last_prp =3D NVME_CTRL_PAGE_SIZE / sizeof(__le64) - 1; struct nvme_iod *iod =3D blk_mq_rq_to_pdu(req); dma_addr_t dma_addr =3D iod->first_dma; int i; =20 for (i =3D 0; i < iod->nr_allocations; i++) { __le64 *prp_list =3D iod->list[i].prp_list; dma_addr_t next_dma_addr =3D le64_to_cpu(prp_list[last_prp]); =20 - dma_pool_free(dev->prp_page_pool, prp_list, dma_addr); + dma_pool_free(nvmeq->prp_pools.large, prp_list, dma_addr); dma_addr =3D next_dma_addr; } } =20 -static void nvme_unmap_data(struct nvme_dev *dev, struct request *req) +static void nvme_unmap_data(struct nvme_dev *dev, struct nvme_queue *nvmeq, + struct request *req) { struct nvme_iod *iod =3D blk_mq_rq_to_pdu(req); =20 if (iod->dma_len) { dma_unmap_page(dev->dev, iod->first_dma, iod->dma_len, @@ -566,17 +621,17 @@ static void nvme_unmap_data(struct nvme_dev *dev, str= uct request *req) WARN_ON_ONCE(!iod->sgt.nents); =20 dma_unmap_sgtable(dev->dev, &iod->sgt, rq_dma_dir(req), 0); =20 if (iod->nr_allocations =3D=3D 0) - dma_pool_free(dev->prp_small_pool, iod->list[0].sg_list, + dma_pool_free(nvmeq->prp_pools.small, iod->list[0].sg_list, iod->first_dma); else if (iod->nr_allocations =3D=3D 1) - dma_pool_free(dev->prp_page_pool, iod->list[0].sg_list, + dma_pool_free(nvmeq->prp_pools.large, iod->list[0].sg_list, iod->first_dma); else - nvme_free_prps(dev, req); + nvme_free_prps(nvmeq, req); mempool_free(iod->sgt.sgl, dev->iod_mempool); } =20 static void nvme_print_sgl(struct scatterlist *sgl, int nents) { @@ -590,11 +645,11 @@ static void nvme_print_sgl(struct scatterlist *sgl, i= nt nents) i, &phys, sg->offset, sg->length, &sg_dma_address(sg), sg_dma_len(sg)); } } =20 -static blk_status_t nvme_pci_setup_prps(struct nvme_dev *dev, +static blk_status_t nvme_pci_setup_prps(struct nvme_queue *nvmeq, struct request *req, struct nvme_rw_command *cmnd) { struct nvme_iod *iod =3D blk_mq_rq_to_pdu(req); struct dma_pool *pool; int length =3D blk_rq_payload_bytes(req); @@ -626,14 +681,14 @@ static blk_status_t nvme_pci_setup_prps(struct nvme_d= ev *dev, goto done; } =20 nprps =3D DIV_ROUND_UP(length, NVME_CTRL_PAGE_SIZE); if (nprps <=3D (256 / 8)) { - pool =3D dev->prp_small_pool; + pool =3D nvmeq->prp_pools.small; iod->nr_allocations =3D 0; } else { - pool =3D dev->prp_page_pool; + pool =3D nvmeq->prp_pools.large; iod->nr_allocations =3D 1; } =20 prp_list =3D dma_pool_alloc(pool, GFP_ATOMIC, &prp_dma); if (!prp_list) { @@ -671,11 +726,11 @@ static blk_status_t nvme_pci_setup_prps(struct nvme_d= ev *dev, done: cmnd->dptr.prp1 =3D cpu_to_le64(sg_dma_address(iod->sgt.sgl)); cmnd->dptr.prp2 =3D cpu_to_le64(iod->first_dma); return BLK_STS_OK; free_prps: - nvme_free_prps(dev, req); + nvme_free_prps(nvmeq, req); return BLK_STS_RESOURCE; bad_sgl: WARN(DO_ONCE(nvme_print_sgl, iod->sgt.sgl, iod->sgt.nents), "Invalid SGL for payload:%d nents:%d\n", blk_rq_payload_bytes(req), iod->sgt.nents); @@ -696,11 +751,11 @@ static void nvme_pci_sgl_set_seg(struct nvme_sgl_desc= *sge, sge->addr =3D cpu_to_le64(dma_addr); sge->length =3D cpu_to_le32(entries * sizeof(*sge)); sge->type =3D NVME_SGL_FMT_LAST_SEG_DESC << 4; } =20 -static blk_status_t nvme_pci_setup_sgls(struct nvme_dev *dev, +static blk_status_t nvme_pci_setup_sgls(struct nvme_queue *nvmeq, struct request *req, struct nvme_rw_command *cmd) { struct nvme_iod *iod =3D blk_mq_rq_to_pdu(req); struct dma_pool *pool; struct nvme_sgl_desc *sg_list; @@ -716,14 +771,14 @@ static blk_status_t nvme_pci_setup_sgls(struct nvme_d= ev *dev, nvme_pci_sgl_set_data(&cmd->dptr.sgl, sg); return BLK_STS_OK; } =20 if (entries <=3D (256 / sizeof(struct nvme_sgl_desc))) { - pool =3D dev->prp_small_pool; + pool =3D nvmeq->prp_pools.small; iod->nr_allocations =3D 0; } else { - pool =3D dev->prp_page_pool; + pool =3D nvmeq->prp_pools.large; iod->nr_allocations =3D 1; } =20 sg_list =3D dma_pool_alloc(pool, GFP_ATOMIC, &sgl_dma); if (!sg_list) { @@ -783,16 +838,16 @@ static blk_status_t nvme_setup_sgl_simple(struct nvme= _dev *dev, } =20 static blk_status_t nvme_map_data(struct nvme_dev *dev, struct request *re= q, struct nvme_command *cmnd) { + struct nvme_queue *nvmeq =3D req->mq_hctx->driver_data; struct nvme_iod *iod =3D blk_mq_rq_to_pdu(req); blk_status_t ret =3D BLK_STS_RESOURCE; int rc; =20 if (blk_rq_nr_phys_segments(req) =3D=3D 1) { - struct nvme_queue *nvmeq =3D req->mq_hctx->driver_data; struct bio_vec bv =3D req_bvec(req); =20 if (!is_pci_p2pdma_page(bv.bv_page)) { if (!nvme_pci_metadata_use_sgls(dev, req) && (bv.bv_offset & (NVME_CTRL_PAGE_SIZE - 1)) + @@ -823,13 +878,13 @@ static blk_status_t nvme_map_data(struct nvme_dev *de= v, struct request *req, ret =3D BLK_STS_TARGET; goto out_free_sg; } =20 if (nvme_pci_use_sgls(dev, req, iod->sgt.nents)) - ret =3D nvme_pci_setup_sgls(dev, req, &cmnd->rw); + ret =3D nvme_pci_setup_sgls(nvmeq, req, &cmnd->rw); else - ret =3D nvme_pci_setup_prps(dev, req, &cmnd->rw); + ret =3D nvme_pci_setup_prps(nvmeq, req, &cmnd->rw); if (ret !=3D BLK_STS_OK) goto out_unmap_sg; return BLK_STS_OK; =20 out_unmap_sg: @@ -840,10 +895,11 @@ static blk_status_t nvme_map_data(struct nvme_dev *de= v, struct request *req, } =20 static blk_status_t nvme_pci_setup_meta_sgls(struct nvme_dev *dev, struct request *req) { + struct nvme_queue *nvmeq =3D req->mq_hctx->driver_data; struct nvme_iod *iod =3D blk_mq_rq_to_pdu(req); struct nvme_rw_command *cmnd =3D &iod->cmd.rw; struct nvme_sgl_desc *sg_list; struct scatterlist *sgl, *sg; unsigned int entries; @@ -863,11 +919,11 @@ static blk_status_t nvme_pci_setup_meta_sgls(struct n= vme_dev *dev, rc =3D dma_map_sgtable(dev->dev, &iod->meta_sgt, rq_dma_dir(req), DMA_ATTR_NO_WARN); if (rc) goto out_free_sg; =20 - sg_list =3D dma_pool_alloc(dev->prp_small_pool, GFP_ATOMIC, &sgl_dma); + sg_list =3D dma_pool_alloc(nvmeq->prp_pools.small, GFP_ATOMIC, &sgl_dma); if (!sg_list) goto out_unmap_sg; =20 entries =3D iod->meta_sgt.nents; iod->meta_list.sg_list =3D sg_list; @@ -945,11 +1001,11 @@ static blk_status_t nvme_prep_rq(struct nvme_dev *de= v, struct request *req) =20 nvme_start_request(req); return BLK_STS_OK; out_unmap_data: if (blk_rq_nr_phys_segments(req)) - nvme_unmap_data(dev, req); + nvme_unmap_data(dev, req->mq_hctx->driver_data, req); out_free_cmd: nvme_cleanup_cmd(req); return ret; } =20 @@ -1035,10 +1091,11 @@ static void nvme_queue_rqs(struct rq_list *rqlist) nvme_submit_cmds(nvmeq, &submit_list); *rqlist =3D requeue_list; } =20 static __always_inline void nvme_unmap_metadata(struct nvme_dev *dev, + struct nvme_queue *nvmeq, struct request *req) { struct nvme_iod *iod =3D blk_mq_rq_to_pdu(req); =20 if (!iod->meta_sgt.nents) { @@ -1046,11 +1103,11 @@ static __always_inline void nvme_unmap_metadata(str= uct nvme_dev *dev, rq_integrity_vec(req).bv_len, rq_dma_dir(req)); return; } =20 - dma_pool_free(dev->prp_small_pool, iod->meta_list.sg_list, + dma_pool_free(nvmeq->prp_pools.small, iod->meta_list.sg_list, iod->meta_dma); dma_unmap_sgtable(dev->dev, &iod->meta_sgt, rq_dma_dir(req), 0); mempool_free(iod->meta_sgt.sgl, dev->iod_meta_mempool); } =20 @@ -1058,14 +1115,14 @@ static __always_inline void nvme_pci_unmap_rq(struc= t request *req) { struct nvme_queue *nvmeq =3D req->mq_hctx->driver_data; struct nvme_dev *dev =3D nvmeq->dev; =20 if (blk_integrity_rq(req)) - nvme_unmap_metadata(dev, req); + nvme_unmap_metadata(dev, nvmeq, req); =20 if (blk_rq_nr_phys_segments(req)) - nvme_unmap_data(dev, req); + nvme_unmap_data(dev, nvmeq, req); } =20 static void nvme_pci_complete_rq(struct request *req) { nvme_pci_unmap_rq(req); @@ -2838,39 +2895,10 @@ static int nvme_disable_prepare_reset(struct nvme_d= ev *dev, bool shutdown) return -EBUSY; nvme_dev_disable(dev, shutdown); return 0; } =20 -static int nvme_setup_prp_pools(struct nvme_dev *dev) -{ - size_t small_align =3D 256; - - dev->prp_page_pool =3D dma_pool_create("prp list page", dev->dev, - NVME_CTRL_PAGE_SIZE, - NVME_CTRL_PAGE_SIZE, 0); - if (!dev->prp_page_pool) - return -ENOMEM; - - if (dev->ctrl.quirks & NVME_QUIRK_DMAPOOL_ALIGN_512) - small_align =3D 512; - - /* Optimisation for I/Os between 4k and 128k */ - dev->prp_small_pool =3D dma_pool_create("prp list 256", dev->dev, - 256, small_align, 0); - if (!dev->prp_small_pool) { - dma_pool_destroy(dev->prp_page_pool); - return -ENOMEM; - } - return 0; -} - -static void nvme_release_prp_pools(struct nvme_dev *dev) -{ - dma_pool_destroy(dev->prp_page_pool); - dma_pool_destroy(dev->prp_small_pool); -} - static int nvme_pci_alloc_iod_mempool(struct nvme_dev *dev) { size_t meta_size =3D sizeof(struct scatterlist) * (NVME_MAX_META_SEGS + 1= ); size_t alloc_size =3D sizeof(struct scatterlist) * NVME_MAX_SEGS; =20 @@ -3256,17 +3284,13 @@ static int nvme_probe(struct pci_dev *pdev, const s= truct pci_device_id *id) =20 result =3D nvme_dev_map(dev); if (result) goto out_uninit_ctrl; =20 - result =3D nvme_setup_prp_pools(dev); - if (result) - goto out_dev_unmap; - result =3D nvme_pci_alloc_iod_mempool(dev); if (result) - goto out_release_prp_pools; + goto out_dev_unmap; =20 dev_info(dev->ctrl.device, "pci function %s\n", dev_name(&pdev->dev)); =20 result =3D nvme_pci_enable(dev); if (result) @@ -3338,12 +3362,10 @@ static int nvme_probe(struct pci_dev *pdev, const s= truct pci_device_id *id) nvme_dbbuf_dma_free(dev); nvme_free_queues(dev, 0); out_release_iod_mempool: mempool_destroy(dev->iod_mempool); mempool_destroy(dev->iod_meta_mempool); -out_release_prp_pools: - nvme_release_prp_pools(dev); out_dev_unmap: nvme_dev_unmap(dev); out_uninit_ctrl: nvme_uninit_ctrl(&dev->ctrl); out_put_ctrl: --=20 2.45.2