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[87.15.70.119]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4406d6db117sm31044565e9.26.2025.04.18.11.39.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 18 Apr 2025 11:39:04 -0700 (PDT) From: Angelo Dureghello X-Google-Original-From: Angelo Dureghello Date: Fri, 18 Apr 2025 20:37:53 +0200 Subject: [PATCH v3] iio: adc: ad7606: fix serial register access Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250418-wip-bl-ad7606-fix-reg-access-v3-1-d5eeb440c738@baylibre.com> X-B4-Tracking: v=1; b=H4sIAACcAmgC/43NTQ6CMBCG4auQrh3TKT+trryHcVGGAZogkNagh HB3CyvjRpfvl8kziwjsHQdxThbheXLBDX2M9JAIam3fMLgqtlBS5TJDDU83QtmBrXQhC6jdCzw 3YIk4BNDqRAozbSqsRSRGz/Fi56+32K0Lj8HP+7cJt/VPeEJAkMRphnVKNaWX0s6dKz0fabiLz Z7Up2d+eCp6pkRbcaEZTf7lrev6BotFIgMbAQAA X-Change-ID: 20250417-wip-bl-ad7606-fix-reg-access-729c21478d1f To: Lars-Peter Clausen , Michael Hennerich , Jonathan Cameron , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , Andy Shevchenko , Beniamin Bia Cc: Jonathan Cameron , linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, Angelo Dureghello X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1587; i=adureghello@baylibre.com; h=from:subject:message-id; bh=xDLDsBY+0buT4niZ2UTLenrevFoj/yl6I/WTIFIhTHE=; b=owGbwMvMwCXGf3bn1e/btlsznlZLYshgmsP4u1lm3beujIUdU/Z2dtl4rzwYlR76I+fqBOXSx Avx5i3/OkpZGMS4GGTFFFnqEiNMQm+HSikvYJwNM4eVCWQIAxenAExk32VGhmeTJv3Vsb5WJCfU fOivUN+GuO1SP1m/rbnzaVG2lVfQw0OMDB0fd0aes757MIeb9cy8piOyx5gyTARP7p0SOk1D/F/ tR1YA X-Developer-Key: i=adureghello@baylibre.com; a=openpgp; fpr=703CDFAD8B573EB00850E38366D1CB9419AF3953 From: Angelo Dureghello Fix register read/write routine as per datasheet. When reading multiple consecutive registers, only the first one is read properly. This is due to missing chip select deassert and assert again between first and second 16bit transfer, as shown in the datasheet AD7606C-16, rev 0, figure 110. Fixes: f2a22e1e172f ("iio: adc: ad7606: Add support for software mode for a= d7616") Reviewed-by: David Lechner Signed-off-by: Angelo Dureghello --- Changes in v3: - fix typo in commit descritpion. - Link to v2: https://lore.kernel.org/r/20250418-wip-bl-ad7606-fix-reg-acce= ss-v2-1-8b1ade67e185@baylibre.com Changes in v2: - improve bug description. - Link to v1: https://lore.kernel.org/r/20250417-wip-bl-ad7606-fix-reg-acce= ss-v1-1-0ce341f3cfc3@baylibre.com --- drivers/iio/adc/ad7606_spi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/iio/adc/ad7606_spi.c b/drivers/iio/adc/ad7606_spi.c index 997be483ebb93293481b922e13ece4edb47e940a..bd05357a542cf7234d5bb6b7188= 29d6b720262cd 100644 --- a/drivers/iio/adc/ad7606_spi.c +++ b/drivers/iio/adc/ad7606_spi.c @@ -103,7 +103,7 @@ static int ad7606_spi_reg_read(struct ad7606_state *st,= unsigned int addr) { .tx_buf =3D &st->d16[0], .len =3D 2, - .cs_change =3D 0, + .cs_change =3D 1, }, { .rx_buf =3D &st->d16[1], .len =3D 2, --- base-commit: 8dc6b228d746b1a900bed28568defb2266fa4c43 change-id: 20250417-wip-bl-ad7606-fix-reg-access-729c21478d1f Best regards, --=20 Angelo Dureghello