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Fri, 18 Apr 2025 12:59:44 -0700 (PDT) From: David Lechner Date: Fri, 18 Apr 2025 14:58:20 -0500 Subject: [PATCH 01/10] iio: accel: sca3300: use struct with aligned_s64 timestamp Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250418-iio-prefer-aligned_s64-timestamp-v1-1-4c6080710516@baylibre.com> References: <20250418-iio-prefer-aligned_s64-timestamp-v1-0-4c6080710516@baylibre.com> In-Reply-To: <20250418-iio-prefer-aligned_s64-timestamp-v1-0-4c6080710516@baylibre.com> To: Jonathan Cameron , =?utf-8?q?Nuno_S=C3=A1?= , Andy Shevchenko , Eugen Hristev , Nicolas Ferre , Alexandre Belloni , Claudiu Beznea , Andreas Klinger , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Maxime Coquelin , Alexandre Torgue Cc: linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, imx@lists.linux.dev, linux-stm32@st-md-mailman.stormreply.com, David Lechner X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; 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This makes it easier to see the correctness of the size and alignment of the buffer. Changing the array part to s16 insted of u8 also lets us drop the cast when it is used. Signed-off-by: David Lechner --- drivers/iio/accel/sca3300.c | 18 ++++++------------ 1 file changed, 6 insertions(+), 12 deletions(-) diff --git a/drivers/iio/accel/sca3300.c b/drivers/iio/accel/sca3300.c index 1132bbaba75bcca525fac2f3e19f63546380fd4f..f04ad523f48abd598b1b2df37c5= 1da894c0ce796 100644 --- a/drivers/iio/accel/sca3300.c +++ b/drivers/iio/accel/sca3300.c @@ -58,15 +58,6 @@ enum sca3300_scan_indexes { SCA3300_SCAN_MAX }; =20 -/* - * Buffer size max case: - * Three accel channels, two bytes per channel. - * Temperature channel, two bytes. - * Three incli channels, two bytes per channel. - * Timestamp channel, eight bytes. - */ -#define SCA3300_MAX_BUFFER_SIZE (ALIGN(sizeof(s16) * SCA3300_SCAN_MAX, siz= eof(s64)) + sizeof(s64)) - #define SCA3300_ACCEL_CHANNEL(index, reg, axis) { \ .type =3D IIO_ACCEL, \ .address =3D reg, \ @@ -203,7 +194,10 @@ struct sca3300_data { struct spi_device *spi; struct mutex lock; const struct sca3300_chip_info *chip; - u8 buffer[SCA3300_MAX_BUFFER_SIZE] __aligned(sizeof(s64)); + struct { + s16 channels[SCA3300_SCAN_MAX]; + aligned_s64 timestamp; + } buffer; u8 txbuf[4] __aligned(IIO_DMA_MINALIGN); u8 rxbuf[4]; }; @@ -492,7 +486,7 @@ static irqreturn_t sca3300_trigger_handler(int irq, voi= d *p) struct iio_dev *indio_dev =3D pf->indio_dev; struct sca3300_data *data =3D iio_priv(indio_dev); int bit, ret, val, i =3D 0; - s16 *channels =3D (s16 *)data->buffer; + s16 *channels =3D data->buffer.channels; =20 iio_for_each_active_channel(indio_dev, bit) { ret =3D sca3300_read_reg(data, indio_dev->channels[bit].address, &val); @@ -505,7 +499,7 @@ static irqreturn_t sca3300_trigger_handler(int irq, voi= d *p) channels[i++] =3D val; } =20 - iio_push_to_buffers_with_ts(indio_dev, data->buffer, + iio_push_to_buffers_with_ts(indio_dev, &data->buffer, sizeof(data->buffer), iio_get_time_ns(indio_dev)); out: --=20 2.43.0 From nobody Sun Dec 14 12:11:01 2025 Received: from mail-oo1-f41.google.com (mail-oo1-f41.google.com [209.85.161.41]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9A9CE22FAFD for ; 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This makes it easier to see the correctness of the size and alignment of the buffer. Signed-off-by: David Lechner --- drivers/iio/adc/at91-sama5d2_adc.c | 25 ++++++++++--------------- 1 file changed, 10 insertions(+), 15 deletions(-) diff --git a/drivers/iio/adc/at91-sama5d2_adc.c b/drivers/iio/adc/at91-sama= 5d2_adc.c index 414610afcb2c4128a63cf76767803c32cb01ac5e..07ced924f7a6ae36fe538021a45= adbf7d76c2e69 100644 --- a/drivers/iio/adc/at91-sama5d2_adc.c +++ b/drivers/iio/adc/at91-sama5d2_adc.c @@ -21,6 +21,7 @@ #include #include #include +#include #include #include #include @@ -586,15 +587,6 @@ struct at91_adc_temp { u16 saved_oversampling; }; =20 -/* - * Buffer size requirements: - * No channels * bytes_per_channel(2) + timestamp bytes (8) - * Divided by 2 because we need half words. - * We assume 32 channels for now, has to be increased if needed. - * Nobody minds a buffer being too big. - */ -#define AT91_BUFFER_MAX_HWORDS ((32 * 2 + 8) / 2) - struct at91_adc_state { void __iomem *base; int irq; @@ -617,7 +609,10 @@ struct at91_adc_state { struct iio_dev *indio_dev; struct device *dev; /* Ensure naturally aligned timestamp */ - u16 buffer[AT91_BUFFER_MAX_HWORDS] __aligned(8); + struct { + u16 data[32]; + aligned_s64 timestamp; + } buffer; /* * lock to prevent concurrent 'single conversion' requests through * sysfs. @@ -1481,14 +1476,14 @@ static void at91_adc_trigger_handler_nodma(struct i= io_dev *indio_dev, if (chan->type =3D=3D IIO_VOLTAGE) { val =3D at91_adc_read_chan(st, chan->address); at91_adc_adjust_val_osr(st, &val); - st->buffer[i] =3D val; + st->buffer.data[i] =3D val; } else { - st->buffer[i] =3D 0; + st->buffer.data[i] =3D 0; WARN(true, "This trigger cannot handle this type of channel"); } i++; } - iio_push_to_buffers_with_timestamp(indio_dev, st->buffer, + iio_push_to_buffers_with_timestamp(indio_dev, &st->buffer, pf->timestamp); } =20 @@ -1643,7 +1638,7 @@ static void at91_adc_touch_data_handler(struct iio_de= v *indio_dev) at91_adc_read_pressure(st, chan->channel, &val); else continue; - st->buffer[i] =3D val; + st->buffer.data[i] =3D val; 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This makes it easier to see the correctness of the size and alignment of the buffer. Signed-off-by: David Lechner --- drivers/iio/adc/hx711.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/drivers/iio/adc/hx711.c b/drivers/iio/adc/hx711.c index 8da0419ecfa3575aa54a93707c681ec8ced28be8..7235fa9e13d57c693751757c5d4= 0e8a799622f17 100644 --- a/drivers/iio/adc/hx711.c +++ b/drivers/iio/adc/hx711.c @@ -87,7 +87,10 @@ struct hx711_data { * triggered buffer * 2x32-bit channel + 64-bit naturally aligned timestamp */ - u32 buffer[4] __aligned(8); + struct { + u32 channel[2]; + aligned_s64 timestamp; + } buffer; /* * delay after a rising edge on SCK until the data is ready DOUT * this is dependent on the hx711 where the datasheet tells a @@ -361,15 +364,15 @@ static irqreturn_t hx711_trigger(int irq, void *p) =20 mutex_lock(&hx711_data->lock); =20 - memset(hx711_data->buffer, 0, sizeof(hx711_data->buffer)); + memset(&hx711_data->buffer, 0, sizeof(hx711_data->buffer)); =20 iio_for_each_active_channel(indio_dev, i) { - hx711_data->buffer[j] =3D hx711_reset_read(hx711_data, + hx711_data->buffer.channel[j] =3D hx711_reset_read(hx711_data, indio_dev->channels[i].channel); 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This makes it easier to see the correctness of the size and alignment of the buffer. Signed-off-by: David Lechner --- drivers/iio/adc/mxs-lradc-adc.c | 13 ++++++++----- 1 file changed, 8 insertions(+), 5 deletions(-) diff --git a/drivers/iio/adc/mxs-lradc-adc.c b/drivers/iio/adc/mxs-lradc-ad= c.c index 92baf3f5f5601b863c694eb03b6d8f287e4fe6ab..73e42f0ebcaeaaa437ba5c64ecd= d7759a1191e6c 100644 --- a/drivers/iio/adc/mxs-lradc-adc.c +++ b/drivers/iio/adc/mxs-lradc-adc.c @@ -116,7 +116,10 @@ struct mxs_lradc_adc { =20 void __iomem *base; /* Maximum of 8 channels + 8 byte ts */ - u32 buffer[10] __aligned(8); + struct { + u32 data[8]; + aligned_u64 ts; + } buffer; struct iio_trigger *trig; struct completion completion; spinlock_t lock; @@ -418,14 +421,14 @@ static irqreturn_t mxs_lradc_adc_trigger_handler(int = irq, void *p) unsigned int i, j =3D 0; =20 for_each_set_bit(i, iio->active_scan_mask, LRADC_MAX_TOTAL_CHANS) { - adc->buffer[j] =3D readl(adc->base + LRADC_CH(j)); + adc->buffer.data[j] =3D readl(adc->base + LRADC_CH(j)); writel(chan_value, adc->base + LRADC_CH(j)); - adc->buffer[j] &=3D LRADC_CH_VALUE_MASK; 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This makes it easier to see the correctness of the size and alignment of the buffer. Signed-off-by: David Lechner --- drivers/iio/adc/stm32-adc.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/drivers/iio/adc/stm32-adc.c b/drivers/iio/adc/stm32-adc.c index 5159908a2a6100b62e5e64b2b469378ad778c35d..81df0d45784553c87c929959348= 84138939ac899 100644 --- a/drivers/iio/adc/stm32-adc.c +++ b/drivers/iio/adc/stm32-adc.c @@ -27,6 +27,7 @@ #include #include #include +#include =20 #include "stm32-adc-core.h" =20 @@ -261,7 +262,10 @@ struct stm32_adc { u32 offset; const struct stm32_adc_cfg *cfg; struct completion completion; - u16 buffer[STM32_ADC_MAX_SQ + 4] __aligned(8); + struct { + u16 data[STM32_ADC_MAX_SQ]; + aligned_s64 timestamp; + } buffer; struct clk *clk; int irq; spinlock_t lock; /* interrupt lock */ @@ -1447,7 +1451,7 @@ static int stm32_adc_single_conv(struct iio_dev *indi= o_dev, } else if (time_left < 0) { ret =3D time_left; } else { - *res =3D adc->buffer[0]; + *res =3D adc->buffer.data[0]; ret =3D IIO_VAL_INT; } =20 @@ -1559,7 +1563,7 @@ static irqreturn_t stm32_adc_isr(int irq, void *data) =20 if (status & regs->isr_eoc.mask) { /* Reading DR also clears EOC status flag */ - adc->buffer[adc->bufi] =3D stm32_adc_readw(adc, regs->dr); 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This makes it easier to see the correctness of the size and alignment of the buffer. Signed-off-by: David Lechner --- drivers/iio/adc/ti-adc0832.c | 15 +++++++-------- 1 file changed, 7 insertions(+), 8 deletions(-) diff --git a/drivers/iio/adc/ti-adc0832.c b/drivers/iio/adc/ti-adc0832.c index cfcdafbe284b103a069857028886411bc72dea4f..f508f7113faa2610a2889f3c36c= 5a679fa72264d 100644 --- a/drivers/iio/adc/ti-adc0832.c +++ b/drivers/iio/adc/ti-adc0832.c @@ -10,6 +10,7 @@ #include #include #include +#include #include #include #include @@ -29,12 +30,10 @@ struct adc0832 { struct regulator *reg; struct mutex lock; u8 mux_bits; - /* - * Max size needed: 16x 1 byte ADC data + 8 bytes timestamp - * May be shorter if not all channels are enabled subject - * to the timestamp remaining 8 byte aligned. - */ - u8 data[24] __aligned(8); + struct { + u8 data[16]; + aligned_s64 timestamp; + } buffer; =20 u8 tx_buf[2] __aligned(IIO_DMA_MINALIGN); u8 rx_buf[2]; @@ -222,10 +221,10 @@ static irqreturn_t adc0832_trigger_handler(int irq, v= oid *p) goto out; } =20 - adc->data[i] =3D ret; + adc->buffer.data[i] =3D ret; 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This makes it easier to see the correctness of the size and alignment of the buffer. Signed-off-by: David Lechner --- drivers/iio/adc/ti-adc12138.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/drivers/iio/adc/ti-adc12138.c b/drivers/iio/adc/ti-adc12138.c index 9dc465a10ffc8d9f596e34215af685999235d690..27cafc2954e8956fbd674eb2bc3= 2c59980ffb746 100644 --- a/drivers/iio/adc/ti-adc12138.c +++ b/drivers/iio/adc/ti-adc12138.c @@ -19,6 +19,7 @@ #include #include #include +#include =20 #define ADC12138_MODE_AUTO_CAL 0x08 #define ADC12138_MODE_READ_STATUS 0x0c @@ -53,7 +54,10 @@ struct adc12138 { * Less may be need if not all channels are enabled, as long as * the 8 byte alignment of the timestamp is maintained. */ - __be16 data[20] __aligned(8); + struct { + __be16 data[16]; + aligned_s64 timestamp; + } buffer; =20 u8 tx_buf[2] __aligned(IIO_DMA_MINALIGN); u8 rx_buf[2]; @@ -351,7 +355,7 @@ static irqreturn_t adc12138_trigger_handler(int irq, vo= id *p) reinit_completion(&adc->complete); =20 ret =3D adc12138_start_and_read_conv(adc, scan_chan, - i ? &adc->data[i - 1] : &trash); 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This makes it easier to see the correctness of the size and alignment of the buffer. Signed-off-by: David Lechner --- drivers/iio/adc/ti-ads124s08.c | 18 +++++++----------- 1 file changed, 7 insertions(+), 11 deletions(-) diff --git a/drivers/iio/adc/ti-ads124s08.c b/drivers/iio/adc/ti-ads124s08.c index 8ea1269f74db09427a4a8d434ba1d63e7c63d038..ecaffe83fcc911f99afbeae7ef5= 1440d150bef73 100644 --- a/drivers/iio/adc/ti-ads124s08.c +++ b/drivers/iio/adc/ti-ads124s08.c @@ -98,14 +98,10 @@ struct ads124s_private { struct gpio_desc *reset_gpio; struct spi_device *spi; struct mutex lock; - /* - * Used to correctly align data. - * Ensure timestamp is naturally aligned. - * Note that the full buffer length may not be needed if not - * all channels are enabled, as long as the alignment of the - * timestamp is maintained. - */ - u32 buffer[ADS124S08_MAX_CHANNELS + sizeof(s64)/sizeof(u32)] __aligned(8); + struct { + u32 data[ADS124S08_MAX_CHANNELS]; + aligned_s64 timestamp; + } buffer; u8 data[5] __aligned(IIO_DMA_MINALIGN); }; =20 @@ -289,7 +285,7 @@ static irqreturn_t ads124s_trigger_handler(int irq, voi= d *p) if (ret) dev_err(&priv->spi->dev, "Start ADC conversions failed\n"); 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This makes it easier to see the correctness of the size and alignment of the buffer. Changed from struct initializer to memset() in case the size ever changes and there could be holes in the struct. The compiler generally optimizes calls to memset() anyway. Signed-off-by: David Lechner --- drivers/iio/adc/ti-ads8688.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/drivers/iio/adc/ti-ads8688.c b/drivers/iio/adc/ti-ads8688.c index b0bf46cae0b69eb1fe8d7734c8a32ac642c5d0cd..2a9cb7d9bbfae4b282682d75599= 2acd47fb88b99 100644 --- a/drivers/iio/adc/ti-ads8688.c +++ b/drivers/iio/adc/ti-ads8688.c @@ -380,16 +380,20 @@ static irqreturn_t ads8688_trigger_handler(int irq, v= oid *p) { struct iio_poll_func *pf =3D p; struct iio_dev *indio_dev =3D pf->indio_dev; - /* Ensure naturally aligned timestamp */ - u16 buffer[ADS8688_MAX_CHANNELS + sizeof(s64)/sizeof(u16)] __aligned(8) = =3D { }; + struct { + u16 data[ADS8688_MAX_CHANNELS]; + aligned_s64 timestamp; + } buffer; int i, j =3D 0; =20 + memset(&buffer, 0, sizeof(buffer)); + iio_for_each_active_channel(indio_dev, i) { - buffer[j] =3D ads8688_read(indio_dev, i); + buffer.data[j] =3D ads8688_read(indio_dev, i); j++; } =20 - iio_push_to_buffers_with_ts(indio_dev, buffer, sizeof(buffer), + iio_push_to_buffers_with_ts(indio_dev, &buffer, sizeof(buffer), iio_get_time_ns(indio_dev)); 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Fri, 18 Apr 2025 13:00:07 -0700 (PDT) From: David Lechner Date: Fri, 18 Apr 2025 14:58:29 -0500 Subject: [PATCH 10/10] iio: chemical: atlas-sensor: use struct with aligned_s64 timestamp Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20250418-iio-prefer-aligned_s64-timestamp-v1-10-4c6080710516@baylibre.com> References: <20250418-iio-prefer-aligned_s64-timestamp-v1-0-4c6080710516@baylibre.com> In-Reply-To: <20250418-iio-prefer-aligned_s64-timestamp-v1-0-4c6080710516@baylibre.com> To: Jonathan Cameron , =?utf-8?q?Nuno_S=C3=A1?= , Andy Shevchenko , Eugen Hristev , Nicolas Ferre , Alexandre Belloni , Claudiu Beznea , Andreas Klinger , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Maxime Coquelin , Alexandre Torgue Cc: linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, imx@lists.linux.dev, linux-stm32@st-md-mailman.stormreply.com, David Lechner X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1731; i=dlechner@baylibre.com; h=from:subject:message-id; bh=anywE7XPQeNCDKeK0PUagrE9N3D2Cd5D3ok+OCQfyOY=; b=owEBbQGS/pANAwAKAcLMIAH/AY/AAcsmYgBoAq8nzp0+Cmfo0t99KU1QNh1dT37rrLQG2SzNH U5outJwJB6JATMEAAEKAB0WIQTsGNmeYg6D1pzYaJjCzCAB/wGPwAUCaAKvJwAKCRDCzCAB/wGP wKuNB/9sC6Bs/gHTswHlJCsOQM/Cjv9JBeFqLqwPG/EH6lPVnuMM2r0CjXLaKZ6Sod/kwk+E4pt PNtFh4rt+VvxCpXg1H0wPTud1mMFV0tkDA7sJwxDGX3Z94mw+p7WvzEoCCCx9HSBkorH5YUMaBP FCGeNDyvZQ9+L3skA4biUuoQKswoX/yqxNlCaGcY5dG++zXclH3PsId+6ITHnGlrGoHnpFcs0Tk 2lRJbQaIhxof9SiZNt0q9xABQZsm6NFC63JdQGq9OgxSD7qaa/0W45hSH8XuZCCJndZw/VVEDwj Yi1sy0l4M68NpXKzIiV1vXzyy+beWErhT1Jlka5PNTGLOmpl X-Developer-Key: i=dlechner@baylibre.com; a=openpgp; fpr=8A73D82A6A1F509907F373881F8AF88C82F77C03 Use a struct with aligned s64_timestamp instead of a padded array for the buffer used for iio_push_to_buffers_with_ts(). This makes it easier to see the correctness of the size and alignment of the buffer. Signed-off-by: David Lechner --- drivers/iio/chemical/atlas-sensor.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/drivers/iio/chemical/atlas-sensor.c b/drivers/iio/chemical/atl= as-sensor.c index cb6662b9213740f4a88b8412e6a0f01bc5a314d6..a67783ce7f1b68135e05d3afc05= 533d400d4a052 100644 --- a/drivers/iio/chemical/atlas-sensor.c +++ b/drivers/iio/chemical/atlas-sensor.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include #include @@ -91,8 +92,10 @@ struct atlas_data { struct regmap *regmap; struct irq_work work; unsigned int interrupt_enabled; - /* 96-bit data + 32-bit pad + 64-bit timestamp */ - __be32 buffer[6] __aligned(8); + struct { + __be32 data[3]; + aligned_s64 timestamp; + } buffer; }; =20 static const struct regmap_config atlas_regmap_config =3D { @@ -455,10 +458,10 @@ static irqreturn_t atlas_trigger_handler(int irq, voi= d *private) int ret; =20 ret =3D regmap_bulk_read(data->regmap, data->chip->data_reg, - &data->buffer, sizeof(__be32) * channels); + data->buffer.data, sizeof(__be32) * channels); =20 if (!ret) - iio_push_to_buffers_with_ts(indio_dev, data->buffer, + iio_push_to_buffers_with_ts(indio_dev, &data->buffer, sizeof(data->buffer), iio_get_time_ns(indio_dev)); =20 --=20 2.43.0