From nobody Sun Dec 14 19:28:16 2025 Received: from fllvem-ot04.ext.ti.com (fllvem-ot04.ext.ti.com [198.47.19.246]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 811D01DF260; Thu, 17 Apr 2025 23:30:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.246 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744932648; cv=none; b=YwZcYFNDm8UkBMYDOpTT2wNRQun8XqN+9e4AmyWdUUQcAya0Wp3ukqiVUDMT4SzfnyH50/2blNnfH4rRZgEHQVdXJwpXP+y/MVRvTQmg2p78H4or3WFuGCTgoAX8OSSuN47sKcqBAjneklQlTqikskcwBgk5gNnzVKXmsIvZM7Q= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1744932648; c=relaxed/simple; bh=5zsOBMyKDRrYus2KS6jpmLIaZ3RdH7jmamJy8CjOZZ8=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=EP0sQIXZ1BvZVGho69bfw0B54VHWS9DM45hYoQDbxVajGRDiEiTNgouxTOMsMWYeRi5CIQMbbHTvcizzkwrdAG27mQUP1AbA8VQGNb8Cr/F3opyoZqZE/RcB40o+yH4OimI7+141HPDZCsaJ3bYd60zOuRbX4Z+bgUQayhVuleo= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=NC4wC3iA; arc=none smtp.client-ip=198.47.19.246 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="NC4wC3iA" Received: from fllv0034.itg.ti.com ([10.64.40.246]) by fllvem-ot04.ext.ti.com (8.15.2/8.15.2) with ESMTPS id 53HNUeWv781174 (version=TLSv1.2 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 17 Apr 2025 18:30:40 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1744932640; bh=LlfNYEA3GcNF5ETHru+TFzjorIT8qkTiM1wG+X+ViQo=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=NC4wC3iAOVY5D0vY+Zm9YDvjshgfXj3KKiSscRdf/SBQqbmVZH3Bjhmbedp/RVbLL l/BIBhMmZP+9Pa2FrQ9Dj1xpITcZM+gfE9QyXZ2Zgtf8A/EyvWixvsEE7tC3YHD+Ts puh8nEE0TTEz/cPRY/LPHXZkUSnJh9/foQKttKa8= Received: from DFLE114.ent.ti.com (dfle114.ent.ti.com [10.64.6.35]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 53HNUekk003887 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 17 Apr 2025 18:30:40 -0500 Received: from DFLE112.ent.ti.com (10.64.6.33) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23; Thu, 17 Apr 2025 18:30:40 -0500 Received: from lelvsmtp5.itg.ti.com (10.180.75.250) by DFLE112.ent.ti.com (10.64.6.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.23 via Frontend Transport; Thu, 17 Apr 2025 18:30:40 -0500 Received: from judy-hp.dhcp.ti.com (judy-hp.dhcp.ti.com [128.247.81.105]) by lelvsmtp5.itg.ti.com (8.15.2/8.15.2) with ESMTP id 53HNUePh023286; Thu, 17 Apr 2025 18:30:40 -0500 From: Judith Mendez To: Nishanth Menon , Vignesh Raghavendra CC: Tero Kristo , Rob Herring , Krzysztof Kozlowski , Conor Dooley , , , , Moteen Shah Subject: [PATCH v2 3/5] arm64: dts: ti: k3-am65-main: Add missing taps to sdhci0 Date: Thu, 17 Apr 2025 18:30:38 -0500 Message-ID: <20250417233040.3658761-4-jm@ti.com> X-Mailer: git-send-email 2.49.0 In-Reply-To: <20250417233040.3658761-1-jm@ti.com> References: <20250417233040.3658761-1-jm@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" For am65x, add missing ITAPDLYSEL values for Default Speed and High Speed SDR modes to sdhci0 node according to the device datasheet [0]. Fixes: eac99d38f861 ("arm64: dts: ti: k3-am654-main: Update otap-del-sel va= lues") [0] https://www.ti.com/lit/gpn/am6548 Signed-off-by: Judith Mendez Reviewed-by: Moteen Shah --- arch/arm64/boot/dts/ti/k3-am65-main.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts= /ti/k3-am65-main.dtsi index 94a812a1355ba..5ebf7ada6e485 100644 --- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi @@ -449,6 +449,8 @@ sdhci0: mmc@4f80000 { ti,otap-del-sel-mmc-hs =3D <0x0>; ti,otap-del-sel-ddr52 =3D <0x5>; ti,otap-del-sel-hs200 =3D <0x5>; + ti,itap-del-sel-legacy =3D <0xa>; + ti,itap-del-sel-mmc-hs =3D <0x1>; ti,itap-del-sel-ddr52 =3D <0x0>; dma-coherent; status =3D "disabled"; --=20 2.49.0